14fef0565SLucas Tanure// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 24fef0565SLucas Tanure/* 34fef0565SLucas Tanure * Copyright (c) 2019 Amlogic, Inc. All rights reserved. 44fef0565SLucas Tanure */ 54fef0565SLucas Tanure 64fef0565SLucas Tanure#include <dt-bindings/interrupt-controller/arm-gic.h> 75355699dSxianwei.zhao#include <dt-bindings/power/amlogic,t7-pwrc.h> 8a42f2e9bSZelong Dong#include "amlogic-t7-reset.h" 94fef0565SLucas Tanure 104fef0565SLucas Tanure/ { 114fef0565SLucas Tanure interrupt-parent = <&gic>; 124fef0565SLucas Tanure #address-cells = <2>; 134fef0565SLucas Tanure #size-cells = <2>; 144fef0565SLucas Tanure 154fef0565SLucas Tanure cpus { 164fef0565SLucas Tanure #address-cells = <0x2>; 174fef0565SLucas Tanure #size-cells = <0x0>; 184fef0565SLucas Tanure 194fef0565SLucas Tanure cpu-map { 204fef0565SLucas Tanure cluster0 { 214fef0565SLucas Tanure core0 { 224fef0565SLucas Tanure cpu = <&cpu100>; 234fef0565SLucas Tanure }; 244fef0565SLucas Tanure core1 { 254fef0565SLucas Tanure cpu = <&cpu101>; 264fef0565SLucas Tanure }; 274fef0565SLucas Tanure core2 { 284fef0565SLucas Tanure cpu = <&cpu102>; 294fef0565SLucas Tanure }; 304fef0565SLucas Tanure core3 { 314fef0565SLucas Tanure cpu = <&cpu103>; 324fef0565SLucas Tanure }; 334fef0565SLucas Tanure }; 344fef0565SLucas Tanure 354fef0565SLucas Tanure cluster1 { 364fef0565SLucas Tanure core0 { 374fef0565SLucas Tanure cpu = <&cpu0>; 384fef0565SLucas Tanure }; 394fef0565SLucas Tanure core1 { 404fef0565SLucas Tanure cpu = <&cpu1>; 414fef0565SLucas Tanure }; 424fef0565SLucas Tanure core2 { 434fef0565SLucas Tanure cpu = <&cpu2>; 444fef0565SLucas Tanure }; 454fef0565SLucas Tanure core3 { 464fef0565SLucas Tanure cpu = <&cpu3>; 474fef0565SLucas Tanure }; 484fef0565SLucas Tanure }; 494fef0565SLucas Tanure }; 504fef0565SLucas Tanure 514fef0565SLucas Tanure cpu100: cpu@100 { 524fef0565SLucas Tanure device_type = "cpu"; 534fef0565SLucas Tanure compatible = "arm,cortex-a53"; 544fef0565SLucas Tanure reg = <0x0 0x100>; 554fef0565SLucas Tanure enable-method = "psci"; 564fef0565SLucas Tanure }; 574fef0565SLucas Tanure 584fef0565SLucas Tanure cpu101: cpu@101 { 594fef0565SLucas Tanure device_type = "cpu"; 604fef0565SLucas Tanure compatible = "arm,cortex-a53"; 614fef0565SLucas Tanure reg = <0x0 0x101>; 624fef0565SLucas Tanure enable-method = "psci"; 634fef0565SLucas Tanure }; 644fef0565SLucas Tanure 654fef0565SLucas Tanure cpu102: cpu@102 { 664fef0565SLucas Tanure device_type = "cpu"; 674fef0565SLucas Tanure compatible = "arm,cortex-a53"; 684fef0565SLucas Tanure reg = <0x0 0x102>; 694fef0565SLucas Tanure enable-method = "psci"; 704fef0565SLucas Tanure }; 714fef0565SLucas Tanure 724fef0565SLucas Tanure cpu103: cpu@103 { 734fef0565SLucas Tanure device_type = "cpu"; 744fef0565SLucas Tanure compatible = "arm,cortex-a53"; 754fef0565SLucas Tanure reg = <0x0 0x103>; 764fef0565SLucas Tanure enable-method = "psci"; 774fef0565SLucas Tanure }; 784fef0565SLucas Tanure 794fef0565SLucas Tanure cpu0: cpu@0 { 804fef0565SLucas Tanure device_type = "cpu"; 814fef0565SLucas Tanure compatible = "arm,cortex-a73"; 824fef0565SLucas Tanure reg = <0x0 0x0>; 834fef0565SLucas Tanure enable-method = "psci"; 844fef0565SLucas Tanure }; 854fef0565SLucas Tanure 864fef0565SLucas Tanure cpu1: cpu@1 { 874fef0565SLucas Tanure device_type = "cpu"; 884fef0565SLucas Tanure compatible = "arm,cortex-a73"; 894fef0565SLucas Tanure reg = <0x0 0x1>; 904fef0565SLucas Tanure enable-method = "psci"; 914fef0565SLucas Tanure }; 924fef0565SLucas Tanure 934fef0565SLucas Tanure cpu2: cpu@2 { 944fef0565SLucas Tanure device_type = "cpu"; 954fef0565SLucas Tanure compatible = "arm,cortex-a73"; 964fef0565SLucas Tanure reg = <0x0 0x2>; 974fef0565SLucas Tanure enable-method = "psci"; 984fef0565SLucas Tanure }; 994fef0565SLucas Tanure 1004fef0565SLucas Tanure cpu3: cpu@3 { 1014fef0565SLucas Tanure device_type = "cpu"; 1024fef0565SLucas Tanure compatible = "arm,cortex-a73"; 1034fef0565SLucas Tanure reg = <0x0 0x3>; 1044fef0565SLucas Tanure enable-method = "psci"; 1054fef0565SLucas Tanure }; 1064fef0565SLucas Tanure }; 1074fef0565SLucas Tanure 1084fef0565SLucas Tanure timer { 1094fef0565SLucas Tanure compatible = "arm,armv8-timer"; 1104fef0565SLucas Tanure interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 1114fef0565SLucas Tanure <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 1124fef0565SLucas Tanure <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 1134fef0565SLucas Tanure <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 1144fef0565SLucas Tanure }; 1154fef0565SLucas Tanure 1164fef0565SLucas Tanure psci { 1174fef0565SLucas Tanure compatible = "arm,psci-1.0"; 1184fef0565SLucas Tanure method = "smc"; 1194fef0565SLucas Tanure }; 1204fef0565SLucas Tanure 1214fef0565SLucas Tanure sm: secure-monitor { 1224fef0565SLucas Tanure compatible = "amlogic,meson-gxbb-sm"; 1235355699dSxianwei.zhao 1245355699dSxianwei.zhao pwrc: power-controller { 1255355699dSxianwei.zhao compatible = "amlogic,t7-pwrc"; 1265355699dSxianwei.zhao #power-domain-cells = <1>; 1275355699dSxianwei.zhao }; 1284fef0565SLucas Tanure }; 1294fef0565SLucas Tanure 1304fef0565SLucas Tanure soc { 1314fef0565SLucas Tanure compatible = "simple-bus"; 1324fef0565SLucas Tanure #address-cells = <2>; 1334fef0565SLucas Tanure #size-cells = <2>; 1344fef0565SLucas Tanure ranges; 1354fef0565SLucas Tanure 1364fef0565SLucas Tanure gic: interrupt-controller@fff01000 { 1374fef0565SLucas Tanure compatible = "arm,gic-400"; 1384fef0565SLucas Tanure #interrupt-cells = <3>; 1394fef0565SLucas Tanure #address-cells = <0>; 1404fef0565SLucas Tanure interrupt-controller; 1414fef0565SLucas Tanure reg = <0x0 0xfff01000 0 0x1000>, 1424fef0565SLucas Tanure <0x0 0xfff02000 0 0x0100>; 1434fef0565SLucas Tanure interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 1444fef0565SLucas Tanure }; 1454fef0565SLucas Tanure 1464fef0565SLucas Tanure apb4: bus@fe000000 { 1474fef0565SLucas Tanure compatible = "simple-bus"; 1484fef0565SLucas Tanure reg = <0x0 0xfe000000 0x0 0x480000>; 1494fef0565SLucas Tanure #address-cells = <2>; 1504fef0565SLucas Tanure #size-cells = <2>; 1514fef0565SLucas Tanure ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>; 1524fef0565SLucas Tanure 153a42f2e9bSZelong Dong reset: reset-controller@2000 { 154a42f2e9bSZelong Dong compatible = "amlogic,t7-reset"; 155a42f2e9bSZelong Dong reg = <0x0 0x2000 0x0 0x98>; 156a42f2e9bSZelong Dong #reset-cells = <1>; 157a42f2e9bSZelong Dong }; 158a42f2e9bSZelong Dong 1598a63d221SHuqiang Qin watchdog@2100 { 1608a63d221SHuqiang Qin compatible = "amlogic,t7-wdt"; 1618a63d221SHuqiang Qin reg = <0x0 0x2100 0x0 0x10>; 1628a63d221SHuqiang Qin clocks = <&xtal>; 1638a63d221SHuqiang Qin }; 1648a63d221SHuqiang Qin 165d0f3a19aSHuqiang Qin periphs_pinctrl: pinctrl@4000 { 166d0f3a19aSHuqiang Qin compatible = "amlogic,t7-periphs-pinctrl"; 167d0f3a19aSHuqiang Qin #address-cells = <2>; 168d0f3a19aSHuqiang Qin #size-cells = <2>; 169d0f3a19aSHuqiang Qin ranges; 170d0f3a19aSHuqiang Qin 171d0f3a19aSHuqiang Qin gpio: bank@4000 { 172d0f3a19aSHuqiang Qin reg = <0x0 0x4000 0x0 0x0064>, 173d0f3a19aSHuqiang Qin <0x0 0x40c0 0x0 0x0220>; 174d0f3a19aSHuqiang Qin reg-names = "mux", "gpio"; 175d0f3a19aSHuqiang Qin gpio-controller; 176d0f3a19aSHuqiang Qin #gpio-cells = <2>; 177d0f3a19aSHuqiang Qin gpio-ranges = <&periphs_pinctrl 0 0 157>; 178d0f3a19aSHuqiang Qin }; 179d0f3a19aSHuqiang Qin }; 180d0f3a19aSHuqiang Qin 1813f734564SHuqiang Qin gpio_intc: interrupt-controller@4080 { 1823f734564SHuqiang Qin compatible = "amlogic,t7-gpio-intc", 1833f734564SHuqiang Qin "amlogic,meson-gpio-intc"; 1843f734564SHuqiang Qin reg = <0x0 0x4080 0x0 0x20>; 1853f734564SHuqiang Qin interrupt-controller; 1863f734564SHuqiang Qin #interrupt-cells = <2>; 1873f734564SHuqiang Qin amlogic,channel-interrupts = 1883f734564SHuqiang Qin <10 11 12 13 14 15 16 17 18 19 20 21>; 1893f734564SHuqiang Qin }; 1903f734564SHuqiang Qin 1914fef0565SLucas Tanure uart_a: serial@78000 { 1924fef0565SLucas Tanure compatible = "amlogic,t7-uart", "amlogic,meson-s4-uart"; 1934fef0565SLucas Tanure reg = <0x0 0x78000 0x0 0x18>; 1944fef0565SLucas Tanure interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>; 1954fef0565SLucas Tanure status = "disabled"; 1964fef0565SLucas Tanure }; 1974c23177cSXianwei Zhao 1984c23177cSXianwei Zhao sec_ao: ao-secure@10220 { 1994c23177cSXianwei Zhao compatible = "amlogic,t7-ao-secure", 2004c23177cSXianwei Zhao "amlogic,meson-gx-ao-secure", 2014c23177cSXianwei Zhao "syscon"; 2024c23177cSXianwei Zhao reg = <0x0 0x10220 0x0 0x140>; 2034c23177cSXianwei Zhao amlogic,has-chip-id; 2044c23177cSXianwei Zhao }; 2054fef0565SLucas Tanure }; 2064fef0565SLucas Tanure 2074fef0565SLucas Tanure }; 2084fef0565SLucas Tanure}; 209