xref: /linux/arch/arm/mach-lpc32xx/common.c (revision 2f4c53349961c8ca480193e47da4d44fdb8335a8)
1*c942fddfSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2fc982e1cSKevin Wells /*
3fc982e1cSKevin Wells  * arch/arm/mach-lpc32xx/common.c
4fc982e1cSKevin Wells  *
5fc982e1cSKevin Wells  * Author: Kevin Wells <kevin.wells@nxp.com>
6fc982e1cSKevin Wells  *
7fc982e1cSKevin Wells  * Copyright (C) 2010 NXP Semiconductors
8fc982e1cSKevin Wells  */
9fc982e1cSKevin Wells 
10fc982e1cSKevin Wells #include <linux/init.h>
11fc982e1cSKevin Wells 
12fc982e1cSKevin Wells #include <asm/mach/map.h>
13e39942f5SAlexandre Pereira da Silva #include <asm/system_info.h>
14fc982e1cSKevin Wells 
15fc982e1cSKevin Wells #include <mach/hardware.h>
16fc982e1cSKevin Wells #include <mach/platform.h>
17fc982e1cSKevin Wells #include "common.h"
18fc982e1cSKevin Wells 
19fc982e1cSKevin Wells /*
20fc982e1cSKevin Wells  * Returns the unique ID for the device
21fc982e1cSKevin Wells  */
22fc982e1cSKevin Wells void lpc32xx_get_uid(u32 devid[4])
23fc982e1cSKevin Wells {
24fc982e1cSKevin Wells 	int i;
25fc982e1cSKevin Wells 
26fc982e1cSKevin Wells 	for (i = 0; i < 4; i++)
27fc982e1cSKevin Wells 		devid[i] = __raw_readl(LPC32XX_CLKPWR_DEVID(i << 2));
28fc982e1cSKevin Wells }
29fc982e1cSKevin Wells 
30fc982e1cSKevin Wells /*
31fc982e1cSKevin Wells  * Detects and returns IRAM size for the device variation
32fc982e1cSKevin Wells  */
33fc982e1cSKevin Wells #define LPC32XX_IRAM_BANK_SIZE SZ_128K
34fc982e1cSKevin Wells static u32 iram_size;
35fc982e1cSKevin Wells u32 lpc32xx_return_iram_size(void)
36fc982e1cSKevin Wells {
37fc982e1cSKevin Wells 	if (iram_size == 0) {
38fc982e1cSKevin Wells 		u32 savedval1, savedval2;
39fc982e1cSKevin Wells 		void __iomem *iramptr1, *iramptr2;
40fc982e1cSKevin Wells 
41fc982e1cSKevin Wells 		iramptr1 = io_p2v(LPC32XX_IRAM_BASE);
42fc982e1cSKevin Wells 		iramptr2 = io_p2v(LPC32XX_IRAM_BASE + LPC32XX_IRAM_BANK_SIZE);
43fc982e1cSKevin Wells 		savedval1 = __raw_readl(iramptr1);
44fc982e1cSKevin Wells 		savedval2 = __raw_readl(iramptr2);
45fc982e1cSKevin Wells 
46fc982e1cSKevin Wells 		if (savedval1 == savedval2) {
47fc982e1cSKevin Wells 			__raw_writel(savedval2 + 1, iramptr2);
48fc982e1cSKevin Wells 			if (__raw_readl(iramptr1) == savedval2 + 1)
49fc982e1cSKevin Wells 				iram_size = LPC32XX_IRAM_BANK_SIZE;
50fc982e1cSKevin Wells 			else
51fc982e1cSKevin Wells 				iram_size = LPC32XX_IRAM_BANK_SIZE * 2;
52fc982e1cSKevin Wells 			__raw_writel(savedval2, iramptr2);
53fc982e1cSKevin Wells 		} else
54fc982e1cSKevin Wells 			iram_size = LPC32XX_IRAM_BANK_SIZE * 2;
55fc982e1cSKevin Wells 	}
56fc982e1cSKevin Wells 
57fc982e1cSKevin Wells 	return iram_size;
58fc982e1cSKevin Wells }
5922833d55SArnd Bergmann EXPORT_SYMBOL_GPL(lpc32xx_return_iram_size);
60fc982e1cSKevin Wells 
61fc982e1cSKevin Wells static struct map_desc lpc32xx_io_desc[] __initdata = {
62fc982e1cSKevin Wells 	{
63df38b24fSArnd Bergmann 		.virtual	= (unsigned long)IO_ADDRESS(LPC32XX_AHB0_START),
64fc982e1cSKevin Wells 		.pfn		= __phys_to_pfn(LPC32XX_AHB0_START),
65fc982e1cSKevin Wells 		.length		= LPC32XX_AHB0_SIZE,
66fc982e1cSKevin Wells 		.type		= MT_DEVICE
67fc982e1cSKevin Wells 	},
68fc982e1cSKevin Wells 	{
69df38b24fSArnd Bergmann 		.virtual	= (unsigned long)IO_ADDRESS(LPC32XX_AHB1_START),
70fc982e1cSKevin Wells 		.pfn		= __phys_to_pfn(LPC32XX_AHB1_START),
71fc982e1cSKevin Wells 		.length		= LPC32XX_AHB1_SIZE,
72fc982e1cSKevin Wells 		.type		= MT_DEVICE
73fc982e1cSKevin Wells 	},
74fc982e1cSKevin Wells 	{
75df38b24fSArnd Bergmann 		.virtual	= (unsigned long)IO_ADDRESS(LPC32XX_FABAPB_START),
76fc982e1cSKevin Wells 		.pfn		= __phys_to_pfn(LPC32XX_FABAPB_START),
77fc982e1cSKevin Wells 		.length		= LPC32XX_FABAPB_SIZE,
78fc982e1cSKevin Wells 		.type		= MT_DEVICE
79fc982e1cSKevin Wells 	},
80fc982e1cSKevin Wells 	{
81df38b24fSArnd Bergmann 		.virtual	= (unsigned long)IO_ADDRESS(LPC32XX_IRAM_BASE),
82fc982e1cSKevin Wells 		.pfn		= __phys_to_pfn(LPC32XX_IRAM_BASE),
83fc982e1cSKevin Wells 		.length		= (LPC32XX_IRAM_BANK_SIZE * 2),
84fc982e1cSKevin Wells 		.type		= MT_DEVICE
85fc982e1cSKevin Wells 	},
86fc982e1cSKevin Wells };
87fc982e1cSKevin Wells 
88fc982e1cSKevin Wells void __init lpc32xx_map_io(void)
89fc982e1cSKevin Wells {
90fc982e1cSKevin Wells 	iotable_init(lpc32xx_io_desc, ARRAY_SIZE(lpc32xx_io_desc));
91fc982e1cSKevin Wells }
92b23fcd90SRussell King 
93e39942f5SAlexandre Pereira da Silva static int __init lpc32xx_check_uid(void)
94be20dbc8SRoland Stigge {
95be20dbc8SRoland Stigge 	u32 uid[4];
96be20dbc8SRoland Stigge 
97be20dbc8SRoland Stigge 	lpc32xx_get_uid(uid);
98be20dbc8SRoland Stigge 
99be20dbc8SRoland Stigge 	printk(KERN_INFO "LPC32XX unique ID: %08x%08x%08x%08x\n",
100be20dbc8SRoland Stigge 		uid[3], uid[2], uid[1], uid[0]);
101be20dbc8SRoland Stigge 
102e39942f5SAlexandre Pereira da Silva 	if (!system_serial_low && !system_serial_high) {
103e39942f5SAlexandre Pereira da Silva 		system_serial_low = uid[0];
104e39942f5SAlexandre Pereira da Silva 		system_serial_high = uid[1];
105e39942f5SAlexandre Pereira da Silva 	}
106e39942f5SAlexandre Pereira da Silva 
107be20dbc8SRoland Stigge 	return 1;
108be20dbc8SRoland Stigge }
109e39942f5SAlexandre Pereira da Silva arch_initcall(lpc32xx_check_uid);
110