xref: /linux/arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dts (revision c771600c6af14749609b49565ffb4cac2959710d)
16192cf8aSPhilip Oberfichtner// SPDX-License-Identifier: GPL-2.0
26192cf8aSPhilip Oberfichtner/*
36192cf8aSPhilip Oberfichtner * Support for the i.MX6-based Bosch ACC board.
46192cf8aSPhilip Oberfichtner *
56192cf8aSPhilip Oberfichtner * Copyright (C) 2016 Garz & Fricke GmbH
66192cf8aSPhilip Oberfichtner * Copyright (C) 2018 DENX Software Engineering GmbH, Heiko Schocher <hs@denx.de>
76192cf8aSPhilip Oberfichtner * Copyright (C) 2018 DENX Software Engineering GmbH, Niel Fourie <lusus@denx.de>
86192cf8aSPhilip Oberfichtner * Copyright (C) 2019-2021 Bosch Thermotechnik GmbH, Matthias Winker <matthias.winker@bosch.com>
96192cf8aSPhilip Oberfichtner * Copyright (C) 2022 DENX Software Engineering GmbH, Philip Oberfichtner <pro@denx.de>
106192cf8aSPhilip Oberfichtner */
116192cf8aSPhilip Oberfichtner
126192cf8aSPhilip Oberfichtner/dts-v1/;
136192cf8aSPhilip Oberfichtner
146192cf8aSPhilip Oberfichtner#include <dt-bindings/gpio/gpio.h>
156192cf8aSPhilip Oberfichtner#include <dt-bindings/leds/common.h>
166192cf8aSPhilip Oberfichtner#include "imx6q.dtsi"
176192cf8aSPhilip Oberfichtner
186192cf8aSPhilip Oberfichtner/ {
196192cf8aSPhilip Oberfichtner	model = "Bosch ACC";
206192cf8aSPhilip Oberfichtner	compatible = "bosch,imx6q-acc", "fsl,imx6q";
216192cf8aSPhilip Oberfichtner
226192cf8aSPhilip Oberfichtner	aliases {
236192cf8aSPhilip Oberfichtner		i2c0 = &i2c1;
246192cf8aSPhilip Oberfichtner		i2c1 = &i2c2;
256192cf8aSPhilip Oberfichtner		i2c2 = &i2c3;
266192cf8aSPhilip Oberfichtner		mmc0 = &usdhc4;
276192cf8aSPhilip Oberfichtner		mmc1 = &usdhc2;
286192cf8aSPhilip Oberfichtner		serial0 = &uart2;
296192cf8aSPhilip Oberfichtner		serial1 = &uart1;
306192cf8aSPhilip Oberfichtner	};
316192cf8aSPhilip Oberfichtner
326192cf8aSPhilip Oberfichtner	memory@10000000 {
336192cf8aSPhilip Oberfichtner		device_type = "memory";
346192cf8aSPhilip Oberfichtner		reg = <0x10000000 0x40000000>;
356192cf8aSPhilip Oberfichtner	};
366192cf8aSPhilip Oberfichtner
376192cf8aSPhilip Oberfichtner	backlight_lvds: backlight-lvds {
386192cf8aSPhilip Oberfichtner		compatible = "pwm-backlight";
39fa86e545SUwe Kleine-König		pwms = <&pwm1 0 200000 0>;
406192cf8aSPhilip Oberfichtner		brightness-levels = <0 61 499 1706 4079 8022 13938 22237 33328 47623 65535>;
416192cf8aSPhilip Oberfichtner		num-interpolated-steps = <10>;
426192cf8aSPhilip Oberfichtner		default-brightness-level = <60>;
436192cf8aSPhilip Oberfichtner		power-supply = <&reg_lcd>;
446192cf8aSPhilip Oberfichtner	};
456192cf8aSPhilip Oberfichtner
466192cf8aSPhilip Oberfichtner	panel {
476192cf8aSPhilip Oberfichtner		compatible = "dataimage,fg1001l0dsswmg01";
486192cf8aSPhilip Oberfichtner		backlight = <&backlight_lvds>;
496192cf8aSPhilip Oberfichtner
506192cf8aSPhilip Oberfichtner		port {
516192cf8aSPhilip Oberfichtner			panel_in: endpoint {
526192cf8aSPhilip Oberfichtner				remote-endpoint = <&lvds0_out>;
536192cf8aSPhilip Oberfichtner			};
546192cf8aSPhilip Oberfichtner		};
556192cf8aSPhilip Oberfichtner	};
566192cf8aSPhilip Oberfichtner
576192cf8aSPhilip Oberfichtner	refclk: refclk {
586192cf8aSPhilip Oberfichtner		compatible = "fixed-factor-clock";
596192cf8aSPhilip Oberfichtner		#clock-cells = <0>;
606192cf8aSPhilip Oberfichtner		clocks = <&clks IMX6QDL_CLK_CKO2>;
616192cf8aSPhilip Oberfichtner		clock-div = <1>;
626192cf8aSPhilip Oberfichtner		clock-mult = <1>;
636192cf8aSPhilip Oberfichtner		clock-output-names = "12mhz_refclk";
646192cf8aSPhilip Oberfichtner		assigned-clocks = <&clks IMX6QDL_CLK_CKO>,
656192cf8aSPhilip Oberfichtner				  <&clks IMX6QDL_CLK_CKO2>,
666192cf8aSPhilip Oberfichtner				  <&clks IMX6QDL_CLK_CKO2_SEL>;
676192cf8aSPhilip Oberfichtner		assigned-clock-parents = <&clks IMX6QDL_CLK_CKO2>,
686192cf8aSPhilip Oberfichtner					 <&clks IMX6QDL_CLK_CKO2_PODF>,
696192cf8aSPhilip Oberfichtner					 <&clks IMX6QDL_CLK_OSC>;
706192cf8aSPhilip Oberfichtner		assigned-clock-rates = <0>, <12000000>, <0>;
716192cf8aSPhilip Oberfichtner	};
726192cf8aSPhilip Oberfichtner
736192cf8aSPhilip Oberfichtner	cpus {
746192cf8aSPhilip Oberfichtner		cpu0: cpu@0 {
756192cf8aSPhilip Oberfichtner			operating-points = <
766192cf8aSPhilip Oberfichtner				/* kHz    uV */
776192cf8aSPhilip Oberfichtner				1200000 1275000
786192cf8aSPhilip Oberfichtner				996000  1225000
796192cf8aSPhilip Oberfichtner				852000  1225000
806192cf8aSPhilip Oberfichtner				792000  1150000
816192cf8aSPhilip Oberfichtner				396000  950000
826192cf8aSPhilip Oberfichtner			>;
836192cf8aSPhilip Oberfichtner			fsl,soc-operating-points = <
846192cf8aSPhilip Oberfichtner				/* ARM kHz  SOC-PU uV */
856192cf8aSPhilip Oberfichtner				1200000 1225000
866192cf8aSPhilip Oberfichtner				996000	1175000
876192cf8aSPhilip Oberfichtner				852000	1175000
886192cf8aSPhilip Oberfichtner				792000	1150000
896192cf8aSPhilip Oberfichtner				396000	1150000
906192cf8aSPhilip Oberfichtner			>;
916192cf8aSPhilip Oberfichtner		};
926192cf8aSPhilip Oberfichtner
936192cf8aSPhilip Oberfichtner		cpu1: cpu@1 {
946192cf8aSPhilip Oberfichtner			operating-points = <
956192cf8aSPhilip Oberfichtner				/* kHz    uV */
966192cf8aSPhilip Oberfichtner				1200000 1275000
976192cf8aSPhilip Oberfichtner				996000  1225000
986192cf8aSPhilip Oberfichtner				852000  1225000
996192cf8aSPhilip Oberfichtner				792000  1150000
1006192cf8aSPhilip Oberfichtner				396000  950000
1016192cf8aSPhilip Oberfichtner			>;
1026192cf8aSPhilip Oberfichtner			fsl,soc-operating-points = <
1036192cf8aSPhilip Oberfichtner				/* ARM kHz  SOC-PU uV */
1046192cf8aSPhilip Oberfichtner				1200000 1225000
1056192cf8aSPhilip Oberfichtner				996000	1175000
1066192cf8aSPhilip Oberfichtner				852000	1175000
1076192cf8aSPhilip Oberfichtner				792000	1150000
1086192cf8aSPhilip Oberfichtner				396000	1150000
1096192cf8aSPhilip Oberfichtner			>;
1106192cf8aSPhilip Oberfichtner		};
1116192cf8aSPhilip Oberfichtner	};
1126192cf8aSPhilip Oberfichtner
1136192cf8aSPhilip Oberfichtner	pwm-leds {
1146192cf8aSPhilip Oberfichtner		compatible = "pwm-leds";
1156192cf8aSPhilip Oberfichtner
1166192cf8aSPhilip Oberfichtner		led_red: led-0 {
1176192cf8aSPhilip Oberfichtner			color = <LED_COLOR_ID_RED>;
1186192cf8aSPhilip Oberfichtner			max-brightness = <248>;
1196192cf8aSPhilip Oberfichtner			default-state = "off";
120fa86e545SUwe Kleine-König			pwms = <&pwm2 0 500000 0>;
1216192cf8aSPhilip Oberfichtner		};
1226192cf8aSPhilip Oberfichtner
1236192cf8aSPhilip Oberfichtner		led_white: led-1 {
1246192cf8aSPhilip Oberfichtner			color = <LED_COLOR_ID_WHITE>;
1256192cf8aSPhilip Oberfichtner			max-brightness = <248>;
1266192cf8aSPhilip Oberfichtner			default-state = "off";
127fa86e545SUwe Kleine-König			pwms = <&pwm3 0 500000 0>;
1286192cf8aSPhilip Oberfichtner			linux,default-trigger = "heartbeat";
1296192cf8aSPhilip Oberfichtner		};
1306192cf8aSPhilip Oberfichtner	};
1316192cf8aSPhilip Oberfichtner
1326192cf8aSPhilip Oberfichtner	gpio-leds {
1336192cf8aSPhilip Oberfichtner		compatible = "gpio-leds";
1346192cf8aSPhilip Oberfichtner		pinctrl-names = "default";
1356192cf8aSPhilip Oberfichtner		pinctrl-0 = <&pinctrl_reset_gpio_led>;
1366192cf8aSPhilip Oberfichtner
1376192cf8aSPhilip Oberfichtner		led-2 {
1386192cf8aSPhilip Oberfichtner			color = <LED_COLOR_ID_RED>;
1396192cf8aSPhilip Oberfichtner			gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
1406192cf8aSPhilip Oberfichtner			default-state = "off";
1416192cf8aSPhilip Oberfichtner		};
1426192cf8aSPhilip Oberfichtner	};
1436192cf8aSPhilip Oberfichtner
1446192cf8aSPhilip Oberfichtner	reg_5p0: regulator-5p0 {
1456192cf8aSPhilip Oberfichtner		compatible = "regulator-fixed";
1466192cf8aSPhilip Oberfichtner		regulator-name = "5p0";
1476192cf8aSPhilip Oberfichtner	};
1486192cf8aSPhilip Oberfichtner
1496192cf8aSPhilip Oberfichtner	reg_vin: regulator-vin {
1506192cf8aSPhilip Oberfichtner		compatible = "regulator-fixed";
1516192cf8aSPhilip Oberfichtner		regulator-name = "VIN";
1526192cf8aSPhilip Oberfichtner		regulator-min-microvolt = <4500000>;
1536192cf8aSPhilip Oberfichtner		regulator-max-microvolt = <4500000>;
1546192cf8aSPhilip Oberfichtner		regulator-always-on;
1556192cf8aSPhilip Oberfichtner		vin-supply = <&reg_5p0>;
1566192cf8aSPhilip Oberfichtner	};
1576192cf8aSPhilip Oberfichtner
1586192cf8aSPhilip Oberfichtner	reg_usb_otg_vbus: regulator-usb-otg-vbus {
1596192cf8aSPhilip Oberfichtner		compatible = "regulator-fixed";
1606192cf8aSPhilip Oberfichtner		regulator-name = "usb_otg_vbus";
1616192cf8aSPhilip Oberfichtner		regulator-min-microvolt = <5000000>;
1626192cf8aSPhilip Oberfichtner		regulator-max-microvolt = <5000000>;
1636192cf8aSPhilip Oberfichtner	};
1646192cf8aSPhilip Oberfichtner
1656192cf8aSPhilip Oberfichtner	reg_usb_h1_vbus: regulator-usb-h1-vbus {
1666192cf8aSPhilip Oberfichtner		compatible = "regulator-fixed";
1676192cf8aSPhilip Oberfichtner		regulator-name = "usb_h1_vbus";
1686192cf8aSPhilip Oberfichtner		regulator-min-microvolt = <5000000>;
1696192cf8aSPhilip Oberfichtner		regulator-max-microvolt = <5000000>;
1706192cf8aSPhilip Oberfichtner		regulator-always-on;
1716192cf8aSPhilip Oberfichtner		vin-supply = <&reg_5p0>;
1726192cf8aSPhilip Oberfichtner	};
1736192cf8aSPhilip Oberfichtner
1746192cf8aSPhilip Oberfichtner	reg_usb_h2_vbus: regulator-usb-h2-vbus {
1756192cf8aSPhilip Oberfichtner		compatible = "regulator-fixed";
1766192cf8aSPhilip Oberfichtner		regulator-name = "usb_h2_vbus";
1776192cf8aSPhilip Oberfichtner		regulator-min-microvolt = <5000000>;
1786192cf8aSPhilip Oberfichtner		regulator-max-microvolt = <5000000>;
1796192cf8aSPhilip Oberfichtner		vin-supply = <&reg_5p0> ;
1806192cf8aSPhilip Oberfichtner		regulator-always-on;
1816192cf8aSPhilip Oberfichtner	};
1826192cf8aSPhilip Oberfichtner
1836192cf8aSPhilip Oberfichtner	reg_vsnvs: regulator-vsnvs {
1846192cf8aSPhilip Oberfichtner		compatible = "regulator-fixed";
1856192cf8aSPhilip Oberfichtner		regulator-name = "VSNVS_3V0";
1866192cf8aSPhilip Oberfichtner		regulator-min-microvolt = <3000000>;
1876192cf8aSPhilip Oberfichtner		regulator-max-microvolt = <3000000>;
1886192cf8aSPhilip Oberfichtner		regulator-always-on;
1896192cf8aSPhilip Oberfichtner		vin-supply = <&reg_5p0>;
1906192cf8aSPhilip Oberfichtner	};
1916192cf8aSPhilip Oberfichtner
1926192cf8aSPhilip Oberfichtner	reg_lcd: regulator-lcd {
1936192cf8aSPhilip Oberfichtner		compatible = "regulator-fixed";
1946192cf8aSPhilip Oberfichtner		regulator-name = "LCD0 POWER";
1956192cf8aSPhilip Oberfichtner		regulator-min-microvolt = <5000000>;
1966192cf8aSPhilip Oberfichtner		regulator-max-microvolt = <5000000>;
1976192cf8aSPhilip Oberfichtner		pinctrl-names = "default";
1986192cf8aSPhilip Oberfichtner		pinctrl-0 = <&pinctrl_lcd_enable>;
1996192cf8aSPhilip Oberfichtner		gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>;
2006192cf8aSPhilip Oberfichtner		enable-active-high;
2016192cf8aSPhilip Oberfichtner		regulator-boot-on;
2026192cf8aSPhilip Oberfichtner	};
2036192cf8aSPhilip Oberfichtner
2046192cf8aSPhilip Oberfichtner	reg_dac: regulator-dac {
2056192cf8aSPhilip Oberfichtner		compatible = "regulator-fixed";
2066192cf8aSPhilip Oberfichtner		regulator-name = "vref_dac";
2076192cf8aSPhilip Oberfichtner		regulator-min-microvolt = <20000>;
2086192cf8aSPhilip Oberfichtner		regulator-max-microvolt = <20000>;
2096192cf8aSPhilip Oberfichtner		vin-supply = <&reg_5p0> ;
2106192cf8aSPhilip Oberfichtner		regulator-boot-on;
2116192cf8aSPhilip Oberfichtner	};
2126192cf8aSPhilip Oberfichtner
2136192cf8aSPhilip Oberfichtner	reg_sw4: regulator-sw4 {
2146192cf8aSPhilip Oberfichtner		compatible = "regulator-fixed";
2156192cf8aSPhilip Oberfichtner		regulator-name = "SW4_3V3";
2166192cf8aSPhilip Oberfichtner		regulator-min-microvolt = <3300000>;
2176192cf8aSPhilip Oberfichtner		regulator-max-microvolt = <3300000>;
2186192cf8aSPhilip Oberfichtner		regulator-always-on;
2196192cf8aSPhilip Oberfichtner		vin-supply = <&reg_5p0>;
2206192cf8aSPhilip Oberfichtner	};
2216192cf8aSPhilip Oberfichtner
2226192cf8aSPhilip Oberfichtner	reg_sys: regulator-sys {
2236192cf8aSPhilip Oberfichtner		compatible = "regulator-fixed";
2246192cf8aSPhilip Oberfichtner		regulator-name = "SYS_4V2";
2256192cf8aSPhilip Oberfichtner		regulator-min-microvolt = <4200000>;
2266192cf8aSPhilip Oberfichtner		regulator-max-microvolt = <4200000>;
2276192cf8aSPhilip Oberfichtner		regulator-always-on;
2286192cf8aSPhilip Oberfichtner		vin-supply = <&reg_5p0>;
2296192cf8aSPhilip Oberfichtner	};
2306192cf8aSPhilip Oberfichtner};
2316192cf8aSPhilip Oberfichtner
2326192cf8aSPhilip Oberfichtner&reg_arm {
2336192cf8aSPhilip Oberfichtner	vin-supply = <&sw2_reg>;
2346192cf8aSPhilip Oberfichtner};
2356192cf8aSPhilip Oberfichtner
2366192cf8aSPhilip Oberfichtner&reg_soc {
2376192cf8aSPhilip Oberfichtner	vin-supply = <&sw1c_reg>;
2386192cf8aSPhilip Oberfichtner};
2396192cf8aSPhilip Oberfichtner
2406192cf8aSPhilip Oberfichtner&reg_vdd1p1 {
2416192cf8aSPhilip Oberfichtner	vin-supply = <&reg_vsnvs>;
2426192cf8aSPhilip Oberfichtner};
2436192cf8aSPhilip Oberfichtner
2446192cf8aSPhilip Oberfichtner&reg_vdd2p5 {
2456192cf8aSPhilip Oberfichtner	vin-supply = <&reg_vsnvs>;
2466192cf8aSPhilip Oberfichtner};
2476192cf8aSPhilip Oberfichtner
2486192cf8aSPhilip Oberfichtner&reg_vdd3p0 {
2496192cf8aSPhilip Oberfichtner	vin-supply = <&reg_vsnvs>;
2506192cf8aSPhilip Oberfichtner};
2516192cf8aSPhilip Oberfichtner
2526192cf8aSPhilip Oberfichtner&fec {
2536192cf8aSPhilip Oberfichtner	pinctrl-names = "default";
2546192cf8aSPhilip Oberfichtner	pinctrl-0 = <&pinctrl_enet>;
2556192cf8aSPhilip Oberfichtner	clocks = <&clks IMX6QDL_CLK_ENET>,
2566192cf8aSPhilip Oberfichtner		<&clks IMX6QDL_CLK_ENET>,
2576192cf8aSPhilip Oberfichtner		<&clks IMX6QDL_CLK_ENET>,
2586192cf8aSPhilip Oberfichtner		<&clks IMX6QDL_CLK_ENET_REF>;
2596192cf8aSPhilip Oberfichtner	clock-names = "ipg", "ahb", "ptp", "enet_out";
2606192cf8aSPhilip Oberfichtner	phy-mode = "rmii";
2616192cf8aSPhilip Oberfichtner	phy-supply = <&reg_sw4>;
2626192cf8aSPhilip Oberfichtner	phy-handle = <&ethphy>;
2636192cf8aSPhilip Oberfichtner	status = "okay";
2646192cf8aSPhilip Oberfichtner
2656192cf8aSPhilip Oberfichtner	mdio {
2666192cf8aSPhilip Oberfichtner		#address-cells = <1>;
2676192cf8aSPhilip Oberfichtner		#size-cells = <0>;
2686192cf8aSPhilip Oberfichtner
2696192cf8aSPhilip Oberfichtner		ethphy: ethernet-phy@0 {
2706192cf8aSPhilip Oberfichtner			compatible = "ethernet-phy-ieee802.3-c22";
2716192cf8aSPhilip Oberfichtner			reg = <0>;
2726192cf8aSPhilip Oberfichtner			interrupt-parent = <&gpio1>;
2736192cf8aSPhilip Oberfichtner			interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
2746192cf8aSPhilip Oberfichtner			smsc,disable-energy-detect;
2756192cf8aSPhilip Oberfichtner		};
2766192cf8aSPhilip Oberfichtner	};
2776192cf8aSPhilip Oberfichtner};
2786192cf8aSPhilip Oberfichtner
2796192cf8aSPhilip Oberfichtner&gpu_vg {
2806192cf8aSPhilip Oberfichtner	status = "disabled";
2816192cf8aSPhilip Oberfichtner};
2826192cf8aSPhilip Oberfichtner
2836192cf8aSPhilip Oberfichtner&gpu_2d {
2846192cf8aSPhilip Oberfichtner	status = "disabled";
2856192cf8aSPhilip Oberfichtner};
2866192cf8aSPhilip Oberfichtner
2876192cf8aSPhilip Oberfichtner&i2c1 {
2886192cf8aSPhilip Oberfichtner	pinctrl-names = "default";
2896192cf8aSPhilip Oberfichtner	pinctrl-0 = <&pinctrl_i2c1>;
2906192cf8aSPhilip Oberfichtner	clock-frequency = <400000>;
2916192cf8aSPhilip Oberfichtner	status = "okay";
2926192cf8aSPhilip Oberfichtner
2936192cf8aSPhilip Oberfichtner	pmic: pmic@8 {
2946192cf8aSPhilip Oberfichtner		compatible = "fsl,pfuze100";
2956192cf8aSPhilip Oberfichtner		reg = <0x08>;
2966192cf8aSPhilip Oberfichtner
2976192cf8aSPhilip Oberfichtner		regulators {
2986192cf8aSPhilip Oberfichtner			sw1c_reg: sw1c {
2996192cf8aSPhilip Oberfichtner				regulator-name = "VDD_SOC (sw1abc)";
3006192cf8aSPhilip Oberfichtner				regulator-min-microvolt = <1275000>;
3016192cf8aSPhilip Oberfichtner				regulator-max-microvolt = <1500000>;
3026192cf8aSPhilip Oberfichtner				regulator-boot-on;
3036192cf8aSPhilip Oberfichtner				regulator-always-on;
3046192cf8aSPhilip Oberfichtner				regulator-ramp-delay = <6250>;
3056192cf8aSPhilip Oberfichtner			};
3066192cf8aSPhilip Oberfichtner
3076192cf8aSPhilip Oberfichtner			sw2_reg: sw2 {
3086192cf8aSPhilip Oberfichtner				regulator-name = "VDD_ARM (sw2)";
3096192cf8aSPhilip Oberfichtner				regulator-min-microvolt = <1050000>;
3106192cf8aSPhilip Oberfichtner				regulator-max-microvolt = <1500000>;
3116192cf8aSPhilip Oberfichtner				regulator-boot-on;
3126192cf8aSPhilip Oberfichtner				regulator-always-on;
3136192cf8aSPhilip Oberfichtner				regulator-ramp-delay = <6250>;
3146192cf8aSPhilip Oberfichtner			};
3156192cf8aSPhilip Oberfichtner
3166192cf8aSPhilip Oberfichtner			sw3a_reg: sw3a {
3176192cf8aSPhilip Oberfichtner				regulator-name = "DDR_1V5a";
3186192cf8aSPhilip Oberfichtner				regulator-boot-on;
3196192cf8aSPhilip Oberfichtner				regulator-always-on;
3206192cf8aSPhilip Oberfichtner
3216192cf8aSPhilip Oberfichtner			};
3226192cf8aSPhilip Oberfichtner
3236192cf8aSPhilip Oberfichtner			sw3b_reg: sw3b {
3246192cf8aSPhilip Oberfichtner				regulator-name = "DDR_1V5b";
3256192cf8aSPhilip Oberfichtner				regulator-boot-on;
3266192cf8aSPhilip Oberfichtner				regulator-always-on;
3276192cf8aSPhilip Oberfichtner
3286192cf8aSPhilip Oberfichtner			};
3296192cf8aSPhilip Oberfichtner
3306192cf8aSPhilip Oberfichtner			sw4_reg: sw4 {
3316192cf8aSPhilip Oberfichtner				regulator-name = "AUX 3V15 (sw4)";
3326192cf8aSPhilip Oberfichtner				regulator-min-microvolt = <800000>;
3336192cf8aSPhilip Oberfichtner				regulator-max-microvolt = <3300000>;
3346192cf8aSPhilip Oberfichtner			};
3356192cf8aSPhilip Oberfichtner
3366192cf8aSPhilip Oberfichtner			swbst_reg: swbst {
3376192cf8aSPhilip Oberfichtner				regulator-min-microvolt = <5000000>;
3386192cf8aSPhilip Oberfichtner				regulator-max-microvolt = <5150000>;
3396192cf8aSPhilip Oberfichtner				regulator-boot-on;
3406192cf8aSPhilip Oberfichtner				regulator-always-on;
3416192cf8aSPhilip Oberfichtner				status = "disabled";
3426192cf8aSPhilip Oberfichtner			};
3436192cf8aSPhilip Oberfichtner
3446192cf8aSPhilip Oberfichtner			snvs_reg: vsnvs {
3456192cf8aSPhilip Oberfichtner				regulator-min-microvolt = <1200000>;
3466192cf8aSPhilip Oberfichtner				regulator-max-microvolt = <3000000>;
3476192cf8aSPhilip Oberfichtner				regulator-boot-on;
3486192cf8aSPhilip Oberfichtner				regulator-always-on;
3496192cf8aSPhilip Oberfichtner			};
3506192cf8aSPhilip Oberfichtner
3516192cf8aSPhilip Oberfichtner			vref_reg: vrefddr {
3526192cf8aSPhilip Oberfichtner				regulator-boot-on;
3536192cf8aSPhilip Oberfichtner				regulator-always-on;
3546192cf8aSPhilip Oberfichtner			};
3556192cf8aSPhilip Oberfichtner
3566192cf8aSPhilip Oberfichtner			vgen1_reg: vgen1 {
3576192cf8aSPhilip Oberfichtner				regulator-min-microvolt = <800000>;
3586192cf8aSPhilip Oberfichtner				regulator-max-microvolt = <1550000>;
3596192cf8aSPhilip Oberfichtner				regulator-always-on;
3606192cf8aSPhilip Oberfichtner			};
3616192cf8aSPhilip Oberfichtner
3626192cf8aSPhilip Oberfichtner			vgen2_reg: vgen2 {
3636192cf8aSPhilip Oberfichtner				regulator-min-microvolt = <800000>;
3646192cf8aSPhilip Oberfichtner				regulator-max-microvolt = <1550000>;
3656192cf8aSPhilip Oberfichtner				regulator-always-on;
3666192cf8aSPhilip Oberfichtner			};
3676192cf8aSPhilip Oberfichtner
3686192cf8aSPhilip Oberfichtner			vgen3_reg: vgen3 {
3696192cf8aSPhilip Oberfichtner				regulator-min-microvolt = <1800000>;
3706192cf8aSPhilip Oberfichtner				regulator-max-microvolt = <3300000>;
3716192cf8aSPhilip Oberfichtner				regulator-always-on;
3726192cf8aSPhilip Oberfichtner			};
3736192cf8aSPhilip Oberfichtner
3746192cf8aSPhilip Oberfichtner			vgen4_reg: vgen4 {
3756192cf8aSPhilip Oberfichtner				regulator-min-microvolt = <1800000>;
3766192cf8aSPhilip Oberfichtner				regulator-max-microvolt = <3300000>;
3776192cf8aSPhilip Oberfichtner				regulator-always-on;
3786192cf8aSPhilip Oberfichtner				regulator-boot-on;
3796192cf8aSPhilip Oberfichtner			};
3806192cf8aSPhilip Oberfichtner
3816192cf8aSPhilip Oberfichtner			vgen5_reg: vgen5 {
3826192cf8aSPhilip Oberfichtner				regulator-min-microvolt = <1800000>;
3836192cf8aSPhilip Oberfichtner				regulator-max-microvolt = <3300000>;
3846192cf8aSPhilip Oberfichtner				regulator-always-on;
3856192cf8aSPhilip Oberfichtner				regulator-boot-on;
3866192cf8aSPhilip Oberfichtner			};
3876192cf8aSPhilip Oberfichtner
3886192cf8aSPhilip Oberfichtner			vgen6_reg: vgen6 {
3896192cf8aSPhilip Oberfichtner				regulator-min-microvolt = <1800000>;
3906192cf8aSPhilip Oberfichtner				regulator-max-microvolt = <3300000>;
3916192cf8aSPhilip Oberfichtner				regulator-always-on;
3926192cf8aSPhilip Oberfichtner			};
3936192cf8aSPhilip Oberfichtner		};
3946192cf8aSPhilip Oberfichtner	};
3956192cf8aSPhilip Oberfichtner
3966192cf8aSPhilip Oberfichtner	lm75: sensor@49 {
3976192cf8aSPhilip Oberfichtner		compatible = "national,lm75b";
3986192cf8aSPhilip Oberfichtner		pinctrl-names = "default";
3996192cf8aSPhilip Oberfichtner		pinctrl-0 = <&pinctrl_lm75>;
4006192cf8aSPhilip Oberfichtner		reg = <0x49>;
4016192cf8aSPhilip Oberfichtner	};
4026192cf8aSPhilip Oberfichtner
4036192cf8aSPhilip Oberfichtner	eeprom: eeprom@50 {
4046192cf8aSPhilip Oberfichtner		compatible = "atmel,24c32";
4056192cf8aSPhilip Oberfichtner		reg = <0x50>;
4066192cf8aSPhilip Oberfichtner		pagesize = <32>;
4076192cf8aSPhilip Oberfichtner	};
4086192cf8aSPhilip Oberfichtner
4096192cf8aSPhilip Oberfichtner	rtc: rtc@51 {
4106192cf8aSPhilip Oberfichtner		pinctrl-names = "default";
4116192cf8aSPhilip Oberfichtner		pinctrl-0 = <&pinctrl_rtc>;
4126192cf8aSPhilip Oberfichtner		compatible = "nxp,pcf8563";
4136192cf8aSPhilip Oberfichtner		reg = <0x51>;
4146192cf8aSPhilip Oberfichtner	};
4156192cf8aSPhilip Oberfichtner};
4166192cf8aSPhilip Oberfichtner
4176192cf8aSPhilip Oberfichtner&i2c2 {
4186192cf8aSPhilip Oberfichtner	pinctrl-names = "default";
4196192cf8aSPhilip Oberfichtner	pinctrl-0 = <&pinctrl_i2c2>;
4206192cf8aSPhilip Oberfichtner	clock-frequency = <100000>;
4216192cf8aSPhilip Oberfichtner	status = "okay";
4226192cf8aSPhilip Oberfichtner
4236192cf8aSPhilip Oberfichtner	eeprom_ext: eeprom@50 {
4246192cf8aSPhilip Oberfichtner		compatible = "atmel,24c32";
4256192cf8aSPhilip Oberfichtner		reg = <0x50>;
4266192cf8aSPhilip Oberfichtner		pagesize = <32>;
4276192cf8aSPhilip Oberfichtner	};
4286192cf8aSPhilip Oberfichtner};
4296192cf8aSPhilip Oberfichtner
4306192cf8aSPhilip Oberfichtner&i2c3 {
4316192cf8aSPhilip Oberfichtner	pinctrl-names = "default";
4326192cf8aSPhilip Oberfichtner	pinctrl-0 = <&pinctrl_i2c3>;
4336192cf8aSPhilip Oberfichtner	clock-frequency = <400000>;
4346192cf8aSPhilip Oberfichtner	status = "okay";
4356192cf8aSPhilip Oberfichtner
4366192cf8aSPhilip Oberfichtner	usb3503: usb@8 {
4376192cf8aSPhilip Oberfichtner		compatible = "smsc,usb3503";
4386192cf8aSPhilip Oberfichtner		pinctrl-names = "default";
4396192cf8aSPhilip Oberfichtner		pinctrl-0 = <&pinctrl_usb3503>;
4406192cf8aSPhilip Oberfichtner		reg = <0x08>;
4416192cf8aSPhilip Oberfichtner		connect-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; /* Old: 0, SS: HIGH */
4426192cf8aSPhilip Oberfichtner		intn-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; /* Old: 1, SS: HIGH */
4436192cf8aSPhilip Oberfichtner		reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>; /* Old: 0, SS: HIGH */
4446192cf8aSPhilip Oberfichtner		initial-mode = <1>;
4456192cf8aSPhilip Oberfichtner		clocks = <&refclk>;
4466192cf8aSPhilip Oberfichtner		clock-names = "refclk";
4476192cf8aSPhilip Oberfichtner		refclk-frequency = <12000000>;
4486192cf8aSPhilip Oberfichtner	};
4496192cf8aSPhilip Oberfichtner
4506192cf8aSPhilip Oberfichtner	exc3000: touchscreen@2a {
4516192cf8aSPhilip Oberfichtner		compatible = "eeti,exc3000";
4526192cf8aSPhilip Oberfichtner		reg = <0x2a>;
4536192cf8aSPhilip Oberfichtner		pinctrl-names = "default";
4546192cf8aSPhilip Oberfichtner		pinctrl-0 = <&pinctrl_ctouch>;
4556192cf8aSPhilip Oberfichtner		interrupt-parent = <&gpio4>;
4566192cf8aSPhilip Oberfichtner		interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
4576192cf8aSPhilip Oberfichtner		touchscreen-size-x = <4096>;
4586192cf8aSPhilip Oberfichtner		touchscreen-size-y = <4096>;
4596192cf8aSPhilip Oberfichtner	};
4606192cf8aSPhilip Oberfichtner
4616192cf8aSPhilip Oberfichtner	vcnl4035: light-sensor@60 {
4626192cf8aSPhilip Oberfichtner		compatible = "vishay,vcnl4035";
4636192cf8aSPhilip Oberfichtner		pinctrl-names = "default";
4646192cf8aSPhilip Oberfichtner		pinctrl-0 = <&pinctrl_proximity>;
4656192cf8aSPhilip Oberfichtner		reg = <0x60>;
4666192cf8aSPhilip Oberfichtner	};
4676192cf8aSPhilip Oberfichtner};
4686192cf8aSPhilip Oberfichtner
4696192cf8aSPhilip Oberfichtner&ldb {
4706192cf8aSPhilip Oberfichtner	status = "okay";
4716192cf8aSPhilip Oberfichtner
4726192cf8aSPhilip Oberfichtner	lvds0: lvds-channel@0 {
4736192cf8aSPhilip Oberfichtner		fsl,data-mapping = "spwg";
4746192cf8aSPhilip Oberfichtner		fsl,data-width = <24>;
4756192cf8aSPhilip Oberfichtner
4766192cf8aSPhilip Oberfichtner		port@4 {
4776192cf8aSPhilip Oberfichtner			reg = <4>;
4786192cf8aSPhilip Oberfichtner
4796192cf8aSPhilip Oberfichtner			lvds0_out: endpoint {
4806192cf8aSPhilip Oberfichtner				remote-endpoint = <&panel_in>;
4816192cf8aSPhilip Oberfichtner			};
4826192cf8aSPhilip Oberfichtner		};
4836192cf8aSPhilip Oberfichtner	};
4846192cf8aSPhilip Oberfichtner};
4856192cf8aSPhilip Oberfichtner
4866192cf8aSPhilip Oberfichtner&pwm1 {
4876192cf8aSPhilip Oberfichtner	pinctrl-names = "default";
4886192cf8aSPhilip Oberfichtner	pinctrl-0 = <&pinctrl_pwm1>;
4896192cf8aSPhilip Oberfichtner	status = "okay";
4906192cf8aSPhilip Oberfichtner};
4916192cf8aSPhilip Oberfichtner
4926192cf8aSPhilip Oberfichtner&pwm2 {
4936192cf8aSPhilip Oberfichtner	pinctrl-names = "default";
4946192cf8aSPhilip Oberfichtner	pinctrl-0 = <&pinctrl_pwm2>;
4956192cf8aSPhilip Oberfichtner	status = "okay";
4966192cf8aSPhilip Oberfichtner};
4976192cf8aSPhilip Oberfichtner
4986192cf8aSPhilip Oberfichtner&pwm3 {
4996192cf8aSPhilip Oberfichtner	pinctrl-names = "default";
5006192cf8aSPhilip Oberfichtner	pinctrl-0 = <&pinctrl_pwm3>;
5016192cf8aSPhilip Oberfichtner	status = "okay";
5026192cf8aSPhilip Oberfichtner};
5036192cf8aSPhilip Oberfichtner
5046192cf8aSPhilip Oberfichtner&pwm4 {
5056192cf8aSPhilip Oberfichtner	pinctrl-names = "default";
5066192cf8aSPhilip Oberfichtner	pinctrl-0 = <&pinctrl_pwm4>;
5076192cf8aSPhilip Oberfichtner	status = "okay";
5086192cf8aSPhilip Oberfichtner};
5096192cf8aSPhilip Oberfichtner
5106192cf8aSPhilip Oberfichtner&uart1 {
5116192cf8aSPhilip Oberfichtner	pinctrl-names = "default";
5126192cf8aSPhilip Oberfichtner	pinctrl-0 = <&pinctrl_uart1>;
5136192cf8aSPhilip Oberfichtner	rts-gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
5146192cf8aSPhilip Oberfichtner	linux,rs485-enabled-at-boot-time;
5156192cf8aSPhilip Oberfichtner	rs485-rx-during-tx;
5166192cf8aSPhilip Oberfichtner	status = "okay";
5176192cf8aSPhilip Oberfichtner};
5186192cf8aSPhilip Oberfichtner
5196192cf8aSPhilip Oberfichtner&uart2 {
5206192cf8aSPhilip Oberfichtner	pinctrl-names = "default";
5216192cf8aSPhilip Oberfichtner	pinctrl-0 = <&pinctrl_uart2>;
5226192cf8aSPhilip Oberfichtner	uart-has-rtscts;
5236192cf8aSPhilip Oberfichtner	status = "okay";
5246192cf8aSPhilip Oberfichtner};
5256192cf8aSPhilip Oberfichtner
5266192cf8aSPhilip Oberfichtner&usbh1 {
5276192cf8aSPhilip Oberfichtner	vbus-supply = <&reg_usb_h1_vbus>;
5286192cf8aSPhilip Oberfichtner	status = "okay";
5296192cf8aSPhilip Oberfichtner};
5306192cf8aSPhilip Oberfichtner
5316192cf8aSPhilip Oberfichtner&usbh2 {
5326192cf8aSPhilip Oberfichtner	pinctrl-names = "idle", "active";
5336192cf8aSPhilip Oberfichtner	pinctrl-0 = <&pinctrl_usbh2_idle>;
5346192cf8aSPhilip Oberfichtner	pinctrl-1 = <&pinctrl_usbh2_active>;
5356192cf8aSPhilip Oberfichtner	vbus-supply = <&reg_usb_h2_vbus>;
5366192cf8aSPhilip Oberfichtner	status = "okay";
5376192cf8aSPhilip Oberfichtner};
5386192cf8aSPhilip Oberfichtner
5396192cf8aSPhilip Oberfichtner&usbotg {
5406192cf8aSPhilip Oberfichtner	pinctrl-names = "default";
5416192cf8aSPhilip Oberfichtner	pinctrl-0 = <&pinctrl_usbotg>;
5426192cf8aSPhilip Oberfichtner	vbus-supply = <&reg_usb_otg_vbus>;
5436192cf8aSPhilip Oberfichtner	disable-over-current;
5446192cf8aSPhilip Oberfichtner	dr_mode = "otg";
5456192cf8aSPhilip Oberfichtner	srp-disable;
5466192cf8aSPhilip Oberfichtner	hnp-disable;
5476192cf8aSPhilip Oberfichtner	adp-disable;
5486192cf8aSPhilip Oberfichtner	status = "okay";
5496192cf8aSPhilip Oberfichtner};
5506192cf8aSPhilip Oberfichtner
5516192cf8aSPhilip Oberfichtner&usbphynop1 {
5526192cf8aSPhilip Oberfichtner	clocks = <&clks IMX6QDL_CLK_USBPHY1>;
5536192cf8aSPhilip Oberfichtner	clock-names = "main_clk";
5546192cf8aSPhilip Oberfichtner	vcc-supply = <&reg_usb_h1_vbus>;
5556192cf8aSPhilip Oberfichtner};
5566192cf8aSPhilip Oberfichtner
5576192cf8aSPhilip Oberfichtner&usbphynop2 {
5586192cf8aSPhilip Oberfichtner	vcc-supply = <&reg_usb_h2_vbus>;
5596192cf8aSPhilip Oberfichtner};
5606192cf8aSPhilip Oberfichtner
5616192cf8aSPhilip Oberfichtner&usdhc2 {
5626192cf8aSPhilip Oberfichtner	pinctrl-names = "default";
5636192cf8aSPhilip Oberfichtner	pinctrl-0 = <&pinctrl_usdhc2>;
5646192cf8aSPhilip Oberfichtner	cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
5656192cf8aSPhilip Oberfichtner	no-1-8-v;
5666192cf8aSPhilip Oberfichtner	keep-power-in-suspend;
56701f8d921SFabio Estevam	wakeup-source;
5686192cf8aSPhilip Oberfichtner	voltage-ranges = <3300 3300>;
5696192cf8aSPhilip Oberfichtner	vmmc-supply = <&reg_sw4>;
5706192cf8aSPhilip Oberfichtner	fsl,wp-controller;
5716192cf8aSPhilip Oberfichtner	status = "okay";
5726192cf8aSPhilip Oberfichtner};
5736192cf8aSPhilip Oberfichtner
5746192cf8aSPhilip Oberfichtner&usdhc4 {
5756192cf8aSPhilip Oberfichtner	pinctrl-names = "default";
5766192cf8aSPhilip Oberfichtner	pinctrl-0 = <&pinctrl_usdhc4>;
5776192cf8aSPhilip Oberfichtner	bus-width = <8>;
5786192cf8aSPhilip Oberfichtner	non-removable;
5796192cf8aSPhilip Oberfichtner	no-1-8-v;
5806192cf8aSPhilip Oberfichtner	keep-power-in-suspend;
5816192cf8aSPhilip Oberfichtner	voltage-ranges = <3300 3300>;
5826192cf8aSPhilip Oberfichtner	vmmc-supply = <&reg_sw4>;
5836192cf8aSPhilip Oberfichtner	fsl,wp-controller;
5846192cf8aSPhilip Oberfichtner	status = "okay";
5856192cf8aSPhilip Oberfichtner};
5866192cf8aSPhilip Oberfichtner
5876192cf8aSPhilip Oberfichtner&wdog1 {
5886192cf8aSPhilip Oberfichtner	pinctrl-names = "default";
5896192cf8aSPhilip Oberfichtner	pinctrl-0 = <&pinctrl_wdog1>;
5906192cf8aSPhilip Oberfichtner	fsl,ext-reset-output;
5916192cf8aSPhilip Oberfichtner	timeout-sec = <10>;
5926192cf8aSPhilip Oberfichtner	status = "okay";
5936192cf8aSPhilip Oberfichtner};
5946192cf8aSPhilip Oberfichtner
5956192cf8aSPhilip Oberfichtner&iomuxc {
5966192cf8aSPhilip Oberfichtner	pinctrl_enet: enetgrp {
5976192cf8aSPhilip Oberfichtner		fsl,pins = <
5986192cf8aSPhilip Oberfichtner			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
5996192cf8aSPhilip Oberfichtner			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
6006192cf8aSPhilip Oberfichtner			MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN	0x1b0b0
6016192cf8aSPhilip Oberfichtner			MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23	0x1b0b0	/* FEC INT */
6026192cf8aSPhilip Oberfichtner			MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER	0x1b0b0
6036192cf8aSPhilip Oberfichtner			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x0001b098
6046192cf8aSPhilip Oberfichtner			MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0	0x1b0b0
6056192cf8aSPhilip Oberfichtner			MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1	0x1b0b0
6066192cf8aSPhilip Oberfichtner			MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1	0x0001b098
6076192cf8aSPhilip Oberfichtner			MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0	0x0001b098
6086192cf8aSPhilip Oberfichtner			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
6096192cf8aSPhilip Oberfichtner		>;
6106192cf8aSPhilip Oberfichtner	};
6116192cf8aSPhilip Oberfichtner
6126192cf8aSPhilip Oberfichtner	pinctrl_reset_gpio_led: reset-gpio-led-grp {
6136192cf8aSPhilip Oberfichtner		fsl,pins = <
6146192cf8aSPhilip Oberfichtner			MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18		0x1b0b0
6156192cf8aSPhilip Oberfichtner		>;
6166192cf8aSPhilip Oberfichtner	};
6176192cf8aSPhilip Oberfichtner
6186192cf8aSPhilip Oberfichtner	pinctrl_i2c1: i2c1grp {
6196192cf8aSPhilip Oberfichtner		fsl,pins = <
6206192cf8aSPhilip Oberfichtner			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
6216192cf8aSPhilip Oberfichtner			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
6226192cf8aSPhilip Oberfichtner		>;
6236192cf8aSPhilip Oberfichtner	};
6246192cf8aSPhilip Oberfichtner
6256192cf8aSPhilip Oberfichtner	pinctrl_i2c2: i2c2grp {
6266192cf8aSPhilip Oberfichtner		fsl,pins = <
6276192cf8aSPhilip Oberfichtner			MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b810
6286192cf8aSPhilip Oberfichtner			MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b810
6296192cf8aSPhilip Oberfichtner		>;
6306192cf8aSPhilip Oberfichtner	};
6316192cf8aSPhilip Oberfichtner
6326192cf8aSPhilip Oberfichtner	pinctrl_i2c3: i2c3grp {
6336192cf8aSPhilip Oberfichtner		fsl,pins = <
6346192cf8aSPhilip Oberfichtner			MX6QDL_PAD_GPIO_5__I2C3_SCL  0x4001b8b1
6356192cf8aSPhilip Oberfichtner			MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
6366192cf8aSPhilip Oberfichtner		>;
6376192cf8aSPhilip Oberfichtner	};
6386192cf8aSPhilip Oberfichtner
6396192cf8aSPhilip Oberfichtner	pinctrl_lcd_enable: lcdenablegrp {
6406192cf8aSPhilip Oberfichtner		fsl,pins = <
6416192cf8aSPhilip Oberfichtner			MX6QDL_PAD_EIM_D23__GPIO3_IO23  0x1b0b0 /* lcd enable */
6426192cf8aSPhilip Oberfichtner			MX6QDL_PAD_EIM_D16__GPIO3_IO16  0x1b0b0 /* sel6_8 */
6436192cf8aSPhilip Oberfichtner		>;
6446192cf8aSPhilip Oberfichtner	};
6456192cf8aSPhilip Oberfichtner
6466192cf8aSPhilip Oberfichtner	pinctrl_lm75: lm75grp {
6476192cf8aSPhilip Oberfichtner		fsl,pins = <
6486192cf8aSPhilip Oberfichtner			MX6QDL_PAD_KEY_ROW0__GPIO4_IO07		0x1b0b0
6496192cf8aSPhilip Oberfichtner		>;
6506192cf8aSPhilip Oberfichtner	};
6516192cf8aSPhilip Oberfichtner
6526192cf8aSPhilip Oberfichtner	pinctrl_proximity: proximitygrp {
6536192cf8aSPhilip Oberfichtner		fsl,pins = <
6546192cf8aSPhilip Oberfichtner			MX6QDL_PAD_KEY_ROW2__GPIO4_IO11  0x1b0b0
6556192cf8aSPhilip Oberfichtner		>;
6566192cf8aSPhilip Oberfichtner	};
6576192cf8aSPhilip Oberfichtner
6586192cf8aSPhilip Oberfichtner	pinctrl_pwm1: pwm1grp {
6596192cf8aSPhilip Oberfichtner		fsl,pins = <
6606192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x0001b0b0
6616192cf8aSPhilip Oberfichtner		>;
6626192cf8aSPhilip Oberfichtner	};
6636192cf8aSPhilip Oberfichtner
6646192cf8aSPhilip Oberfichtner	pinctrl_pwm2: pwm2grp {
6656192cf8aSPhilip Oberfichtner		fsl,pins = <
6666192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x0001b0b0
6676192cf8aSPhilip Oberfichtner		>;
6686192cf8aSPhilip Oberfichtner	};
6696192cf8aSPhilip Oberfichtner
6706192cf8aSPhilip Oberfichtner	pinctrl_pwm3: pwm3grp {
6716192cf8aSPhilip Oberfichtner		fsl,pins = <
6726192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x0001b0b0
6736192cf8aSPhilip Oberfichtner		>;
6746192cf8aSPhilip Oberfichtner	};
6756192cf8aSPhilip Oberfichtner
6766192cf8aSPhilip Oberfichtner	pinctrl_pwm4: pwm4grp {
6776192cf8aSPhilip Oberfichtner		fsl,pins = <
6786192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x0001b0b0
6796192cf8aSPhilip Oberfichtner		>;
6806192cf8aSPhilip Oberfichtner	};
6816192cf8aSPhilip Oberfichtner
6826192cf8aSPhilip Oberfichtner	pinctrl_rtc: rtc-grp {
6836192cf8aSPhilip Oberfichtner		fsl,pins = <
6846192cf8aSPhilip Oberfichtner			MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x1b0b0 /* RTC INT */
6856192cf8aSPhilip Oberfichtner		>;
6866192cf8aSPhilip Oberfichtner	};
6876192cf8aSPhilip Oberfichtner
6886192cf8aSPhilip Oberfichtner	pinctrl_ctouch: ctouch-grp {
6896192cf8aSPhilip Oberfichtner		fsl,pins = <
6906192cf8aSPhilip Oberfichtner			MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 /* CTOUCH_INT */
6916192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x0001b0b0 /* CTOUCH_RESET */
6926192cf8aSPhilip Oberfichtner		>;
6936192cf8aSPhilip Oberfichtner	};
6946192cf8aSPhilip Oberfichtner
6956192cf8aSPhilip Oberfichtner	pinctrl_uart1: uart1grp {
6966192cf8aSPhilip Oberfichtner		fsl,pins = <
6976192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
6986192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
6996192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x0001b0b0
7006192cf8aSPhilip Oberfichtner		>;
7016192cf8aSPhilip Oberfichtner	};
7026192cf8aSPhilip Oberfichtner
7036192cf8aSPhilip Oberfichtner	pinctrl_uart2: uart2grp {
7046192cf8aSPhilip Oberfichtner		fsl,pins = <
7056192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x1b0b1
7066192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x1b0b1
7076192cf8aSPhilip Oberfichtner			MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x1b0b1
7086192cf8aSPhilip Oberfichtner			MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x1b0b1
7096192cf8aSPhilip Oberfichtner		>;
7106192cf8aSPhilip Oberfichtner	};
7116192cf8aSPhilip Oberfichtner
7126192cf8aSPhilip Oberfichtner	pinctrl_usbh2_idle: usbh2-idle-grp {
7136192cf8aSPhilip Oberfichtner		fsl,pins = <
7146192cf8aSPhilip Oberfichtner			MX6QDL_PAD_RGMII_TXC__USB_H2_DATA      0x00013018
7156192cf8aSPhilip Oberfichtner			MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x00013018
7166192cf8aSPhilip Oberfichtner		>;
7176192cf8aSPhilip Oberfichtner	};
7186192cf8aSPhilip Oberfichtner
7196192cf8aSPhilip Oberfichtner	pinctrl_usbh2_active: usbh2-active-grp {
7206192cf8aSPhilip Oberfichtner		fsl,pins = <
7216192cf8aSPhilip Oberfichtner			MX6QDL_PAD_RGMII_TXC__USB_H2_DATA      0x00013018
7226192cf8aSPhilip Oberfichtner			MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x00017018
7236192cf8aSPhilip Oberfichtner		>;
7246192cf8aSPhilip Oberfichtner	};
7256192cf8aSPhilip Oberfichtner
7266192cf8aSPhilip Oberfichtner	pinctrl_usb3503: usb3503-grp {
7276192cf8aSPhilip Oberfichtner		fsl,pins = <
7286192cf8aSPhilip Oberfichtner			MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1    0x00000018
7296192cf8aSPhilip Oberfichtner			MX6QDL_PAD_GPIO_17__GPIO7_IO12     0x1b0b0 /* USB INT */
7306192cf8aSPhilip Oberfichtner			MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x0001b0b0 /* USB Reset */
7316192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD1_DAT0__GPIO1_IO16    0x1b0b0 /* USB Connect */
7326192cf8aSPhilip Oberfichtner		>;
7336192cf8aSPhilip Oberfichtner	};
7346192cf8aSPhilip Oberfichtner
7356192cf8aSPhilip Oberfichtner	pinctrl_usbotg: usbotggrp {
7366192cf8aSPhilip Oberfichtner		fsl,pins = <
7376192cf8aSPhilip Oberfichtner			MX6QDL_PAD_GPIO_1__USB_OTG_ID	0x17059
7386192cf8aSPhilip Oberfichtner		>;
7396192cf8aSPhilip Oberfichtner	};
7406192cf8aSPhilip Oberfichtner
7416192cf8aSPhilip Oberfichtner	pinctrl_usdhc2: usdhc2grp {
7426192cf8aSPhilip Oberfichtner		fsl,pins = <
7436192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD2_CMD__SD2_CMD    0x00017069
7446192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD2_CLK__SD2_CLK    0x00010038
7456192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x00017069
7466192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x00017069
7476192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x00017069
7486192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x00017069
7496192cf8aSPhilip Oberfichtner			MX6QDL_PAD_GPIO_4__SD2_CD_B    0x0001b0b0
7506192cf8aSPhilip Oberfichtner		>;
7516192cf8aSPhilip Oberfichtner	};
7526192cf8aSPhilip Oberfichtner
7536192cf8aSPhilip Oberfichtner	pinctrl_usdhc4: usdhc4grp {
7546192cf8aSPhilip Oberfichtner		fsl,pins = <
7556192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD4_CMD__SD4_CMD    0x00017059
7566192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD4_CLK__SD4_CLK    0x00010059
7576192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x00017059
7586192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x00017059
7596192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x00017059
7606192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x00017059
7616192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x00017059
7626192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x00017059
7636192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x00017059
7646192cf8aSPhilip Oberfichtner			MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x00017059
7656192cf8aSPhilip Oberfichtner		>;
7666192cf8aSPhilip Oberfichtner	};
7676192cf8aSPhilip Oberfichtner
7686192cf8aSPhilip Oberfichtner	pinctrl_wdog1: wdoggrp {
7696192cf8aSPhilip Oberfichtner		fsl,pins = <
7706192cf8aSPhilip Oberfichtner			MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0
7716192cf8aSPhilip Oberfichtner		>;
7726192cf8aSPhilip Oberfichtner	};
7736192cf8aSPhilip Oberfichtner};
774