1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * at91-sama7d65_curiosity.dts - Device Tree file for SAMA7D65 Curiosity board 4 * 5 * Copyright (c) 2024 Microchip Technology Inc. and its subsidiaries 6 * 7 * Author: Romain Sioen <romain.sioen@microchip.com> 8 * 9 */ 10/dts-v1/; 11#include "sama7d65-pinfunc.h" 12#include "sama7d65.dtsi" 13#include <dt-bindings/mfd/atmel-flexcom.h> 14#include <dt-bindings/pinctrl/at91.h> 15 16/ { 17 model = "Microchip SAMA7D65 Curiosity"; 18 compatible = "microchip,sama7d65-curiosity", "microchip,sama7d65", 19 "microchip,sama7d6", "microchip,sama7"; 20 21 aliases { 22 serial0 = &uart6; 23 }; 24 25 chosen { 26 stdout-path = "serial0:115200n8"; 27 }; 28 29 memory@60000000 { 30 device_type = "memory"; 31 reg = <0x60000000 0x40000000>; 32 }; 33 34 reg_5v: regulator-5v { 35 compatible = "regulator-fixed"; 36 regulator-name = "5V_MAIN"; 37 regulator-min-microvolt = <5000000>; 38 regulator-max-microvolt = <5000000>; 39 regulator-always-on; 40 }; 41 42}; 43 44&dma0 { 45 status = "okay"; 46}; 47 48&dma1 { 49 status = "okay"; 50}; 51 52&dma2 { 53 status = "okay"; 54}; 55 56&flx6 { 57 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; 58 status = "okay"; 59}; 60 61&uart6 { 62 pinctrl-names = "default"; 63 pinctrl-0 = <&pinctrl_uart6_default>; 64 status = "okay"; 65}; 66 67&flx10 { 68 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; 69 status = "okay"; 70}; 71 72&gmac0 { 73 #address-cells = <1>; 74 #size-cells = <0>; 75 pinctrl-names = "default"; 76 pinctrl-0 = <&pinctrl_gmac0_default 77 &pinctrl_gmac0_mdio_default 78 &pinctrl_gmac0_txck_default 79 &pinctrl_gmac0_phy_irq>; 80 phy-mode = "rgmii-id"; 81 nvmem-cells = <&eeprom0_eui48>; 82 nvmem-cell-names = "mac-address"; 83 status = "okay"; 84 85 ethernet-phy@7 { 86 reg = <0x7>; 87 interrupt-parent = <&pioa>; 88 interrupts = <PIN_PC1 IRQ_TYPE_LEVEL_LOW>; 89 }; 90}; 91 92&i2c10 { 93 dmas = <0>, <0>; 94 i2c-analog-filter; 95 i2c-digital-filter; 96 i2c-digital-filter-width-ns = <35>; 97 pinctrl-names = "default"; 98 pinctrl-0 = <&pinctrl_i2c10_default>; 99 status = "okay"; 100 101 power-monitor@10 { 102 compatible = "microchip,pac1934"; 103 reg = <0x10>; 104 #address-cells = <1>; 105 #size-cells = <0>; 106 107 channel@1 { 108 reg = <0x1>; 109 shunt-resistor-micro-ohms = <47000>; 110 label = "VDD3V3"; 111 }; 112 113 channel@2 { 114 reg = <0x2>; 115 shunt-resistor-micro-ohms = <47000>; 116 label = "VDDIODDR"; 117 }; 118 119 channel@3 { 120 reg = <0x3>; 121 shunt-resistor-micro-ohms = <47000>; 122 label = "VDDCORE"; 123 }; 124 125 channel@4 { 126 reg = <0x4>; 127 shunt-resistor-micro-ohms = <47000>; 128 label = "VDDCPU"; 129 }; 130 }; 131 132 pmic@5b { 133 compatible = "microchip,mcp16502"; 134 reg = <0x5b>; 135 lvin-supply = <®_5v>; 136 pvin1-supply = <®_5v>; 137 pvin2-supply = <®_5v>; 138 pvin3-supply = <®_5v>; 139 pvin4-supply = <®_5v>; 140 status = "okay"; 141 142 regulators { 143 vdd_3v3: VDD_IO { 144 regulator-name = "VDD_IO"; 145 regulator-min-microvolt = <3300000>; 146 regulator-max-microvolt = <3300000>; 147 regulator-initial-mode = <2>; 148 regulator-allowed-modes = <2>, <4>; 149 regulator-always-on; 150 151 regulator-state-standby { 152 regulator-on-in-suspend; 153 regulator-suspend-microvolt = <3300000>; 154 regulator-mode = <4>; 155 }; 156 157 regulator-state-mem { 158 regulator-off-in-suspend; 159 regulator-mode = <4>; 160 }; 161 }; 162 163 vddioddr: VDD_DDR { 164 regulator-name = "VDD_DDR"; 165 regulator-min-microvolt = <1350000>; 166 regulator-max-microvolt = <1350000>; 167 regulator-initial-mode = <2>; 168 regulator-allowed-modes = <2>, <4>; 169 regulator-always-on; 170 171 regulator-state-standby { 172 regulator-on-in-suspend; 173 regulator-suspend-microvolt = <1350000>; 174 regulator-mode = <4>; 175 }; 176 177 regulator-state-mem { 178 regulator-on-in-suspend; 179 regulator-suspend-microvolt = <1350000>; 180 regulator-mode = <4>; 181 }; 182 }; 183 184 vddcore: VDD_CORE { 185 regulator-name = "VDD_CORE"; 186 regulator-min-microvolt = <1050000>; 187 regulator-max-microvolt = <1050000>; 188 regulator-initial-mode = <2>; 189 regulator-allowed-modes = <2>, <4>; 190 regulator-always-on; 191 192 regulator-state-standby { 193 regulator-on-in-suspend; 194 regulator-suspend-microvolt = <1050000>; 195 regulator-mode = <4>; 196 }; 197 198 regulator-state-mem { 199 regulator-off-in-suspend; 200 regulator-mode = <4>; 201 }; 202 }; 203 204 vddcpu: VDD_OTHER { 205 regulator-name = "VDD_OTHER"; 206 regulator-min-microvolt = <1050000>; 207 regulator-max-microvolt = <1250000>; 208 regulator-initial-mode = <2>; 209 regulator-allowed-modes = <2>, <4>; 210 regulator-ramp-delay = <3125>; 211 regulator-always-on; 212 213 regulator-state-standby { 214 regulator-on-in-suspend; 215 regulator-suspend-microvolt = <1050000>; 216 regulator-mode = <4>; 217 }; 218 219 regulator-state-mem { 220 regulator-off-in-suspend; 221 regulator-mode = <4>; 222 }; 223 }; 224 225 vldo1: LDO1 { 226 regulator-name = "LDO1"; 227 regulator-min-microvolt = <1800000>; 228 regulator-max-microvolt = <1800000>; 229 regulator-always-on; 230 231 regulator-state-standby { 232 regulator-suspend-microvolt = <1800000>; 233 regulator-on-in-suspend; 234 }; 235 236 regulator-state-mem { 237 regulator-off-in-suspend; 238 }; 239 }; 240 241 vldo2: LDO2 { 242 regulator-name = "LDO2"; 243 regulator-min-microvolt = <1200000>; 244 regulator-max-microvolt = <3700000>; 245 246 regulator-state-standby { 247 regulator-on-in-suspend; 248 }; 249 250 regulator-state-mem { 251 regulator-off-in-suspend; 252 }; 253 }; 254 }; 255 }; 256 257 eeprom0: eeprom@51 { 258 compatible = "microchip,24aa025e48"; 259 reg = <0x51>; 260 size = <256>; 261 pagesize = <16>; 262 vcc-supply = <&vdd_3v3>; 263 264 nvmem-layout { 265 compatible = "fixed-layout"; 266 #address-cells = <1>; 267 #size-cells = <1>; 268 269 eeprom0_eui48: eui48@fa { 270 reg = <0xfa 0x6>; 271 }; 272 }; 273 }; 274}; 275 276&main_xtal { 277 clock-frequency = <24000000>; 278}; 279 280&pioa { 281 pinctrl_gmac0_default: gmac0-default { 282 pinmux = <PIN_PA26__G0_TX0>, 283 <PIN_PA27__G0_TX1>, 284 <PIN_PB4__G0_TX2>, 285 <PIN_PB5__G0_TX3>, 286 <PIN_PA29__G0_RX0>, 287 <PIN_PA30__G0_RX1>, 288 <PIN_PB2__G0_RX2>, 289 <PIN_PB6__G0_RX3>, 290 <PIN_PA25__G0_TXCTL>, 291 <PIN_PB3__G0_RXCK>, 292 <PIN_PA28__G0_RXCTL>; 293 slew-rate = <0>; 294 bias-disable; 295 }; 296 297 pinctrl_gmac0_mdio_default: gmac0-mdio-default { 298 pinmux = <PIN_PA31__G0_MDC>, 299 <PIN_PB0__G0_MDIO>; 300 bias-disable; 301 }; 302 303 pinctrl_gmac0_phy_irq: gmac0-phy-irq { 304 pinmux = <PIN_PC1__GPIO>; 305 bias-disable; 306 }; 307 308 pinctrl_gmac0_txck_default: gmac0-txck-default { 309 pinmux = <PIN_PB1__G0_REFCK>; 310 slew-rate = <0>; 311 bias-pull-up; 312 }; 313 314 pinctrl_i2c10_default: i2c10-default{ 315 pinmux = <PIN_PB19__FLEXCOM10_IO1>, 316 <PIN_PB20__FLEXCOM10_IO0>; 317 bias-pull-up; 318 }; 319 320 pinctrl_sdmmc1_default: sdmmc1-default { 321 cmd-data { 322 pinmux = <PIN_PB22__SDMMC1_CMD>, 323 <PIN_PB24__SDMMC1_DAT0>, 324 <PIN_PB25__SDMMC1_DAT1>, 325 <PIN_PB26__SDMMC1_DAT2>, 326 <PIN_PB27__SDMMC1_DAT3>; 327 slew-rate = <0>; 328 bias-disable; 329 }; 330 331 ck-cd-rstn-vddsel { 332 pinmux = <PIN_PB23__SDMMC1_CK>, 333 <PIN_PB21__SDMMC1_RSTN>, 334 <PIN_PB30__SDMMC1_1V8SEL>, 335 <PIN_PB29__SDMMC1_CD>, 336 <PIN_PB28__SDMMC1_WP>; 337 slew-rate = <0>; 338 bias-disable; 339 }; 340 }; 341 342 pinctrl_uart6_default: uart6-default { 343 pinmux = <PIN_PD18__FLEXCOM6_IO0>, 344 <PIN_PD19__FLEXCOM6_IO1>; 345 bias-disable; 346 }; 347}; 348 349&rtt { 350 atmel,rtt-rtc-time-reg = <&gpbr 0x0>; 351}; 352 353&sdmmc1 { 354 bus-width = <4>; 355 pinctrl-names = "default"; 356 pinctrl-0 = <&pinctrl_sdmmc1_default>; 357 status = "okay"; 358}; 359 360&shdwc { 361 debounce-delay-us = <976>; 362 status = "okay"; 363 364 input@0 { 365 reg = <0>; 366 }; 367}; 368 369&slow_xtal { 370 clock-frequency = <32768>; 371}; 372