xref: /linux/arch/arm/boot/dts/gemini/gemini-sl93512r.dts (revision a23e1966932464e1c5226cb9ac4ce1d5fc10ba22)
141043ec4SLinus Walleij// SPDX-License-Identifier: GPL-2.0
241043ec4SLinus Walleij/*
341043ec4SLinus Walleij * Device Tree file for the Storm Semiconductor SL93512R_BRD
441043ec4SLinus Walleij * Gemini reference design, also initially called
541043ec4SLinus Walleij * "Gemini324 EV-Board" before Storm acquired Storlink Semiconductor.
641043ec4SLinus Walleij * The series were later acquired by Cortina Systems.
741043ec4SLinus Walleij */
841043ec4SLinus Walleij
941043ec4SLinus Walleij/dts-v1/;
1041043ec4SLinus Walleij
1141043ec4SLinus Walleij#include "gemini.dtsi"
1241043ec4SLinus Walleij#include <dt-bindings/input/input.h>
1341043ec4SLinus Walleij
1441043ec4SLinus Walleij/ {
1541043ec4SLinus Walleij	model = "Storlink Semiconductor Gemini324 EV-Board / Storm Semiconductor SL93512R_BRD";
1641043ec4SLinus Walleij	compatible = "storlink,gemini324", "storm,sl93512r", "cortina,gemini";
1741043ec4SLinus Walleij	#address-cells = <1>;
1841043ec4SLinus Walleij	#size-cells = <1>;
1941043ec4SLinus Walleij
2041043ec4SLinus Walleij	memory@0 {
2141043ec4SLinus Walleij		/* 64 MB Samsung K4H511638B */
2241043ec4SLinus Walleij		device_type = "memory";
2341043ec4SLinus Walleij		reg = <0x00000000 0x4000000>;
2441043ec4SLinus Walleij	};
2541043ec4SLinus Walleij
2641043ec4SLinus Walleij	chosen {
27e8547e12SLinus Walleij		bootargs = "console=ttyS0,19200n8 root=/dev/mtdblock3 rw rootfstype=squashfs,jffs2 rootwait";
2841043ec4SLinus Walleij		stdout-path = &uart0;
2941043ec4SLinus Walleij	};
3041043ec4SLinus Walleij
3141043ec4SLinus Walleij	gpio_keys {
3241043ec4SLinus Walleij		compatible = "gpio-keys";
3341043ec4SLinus Walleij
3441043ec4SLinus Walleij		button-wps {
3541043ec4SLinus Walleij			debounce-interval = <50>;
3641043ec4SLinus Walleij			wakeup-source;
3741043ec4SLinus Walleij			linux,code = <KEY_WPS_BUTTON>;
3841043ec4SLinus Walleij			label = "WPS";
3947ef78b0SLinus Walleij			/* Conflicts with TVC and extended flash */
4047ef78b0SLinus Walleij			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
4141043ec4SLinus Walleij		};
4241043ec4SLinus Walleij
4341043ec4SLinus Walleij		button-setup {
4441043ec4SLinus Walleij			debounce-interval = <50>;
4541043ec4SLinus Walleij			wakeup-source;
46c4a83b1aSLinus Walleij			linux,code = <KEY_RESTART>;
4741043ec4SLinus Walleij			label = "factory reset";
4841043ec4SLinus Walleij			/* Conflict with NAND flash */
4941043ec4SLinus Walleij			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
5041043ec4SLinus Walleij		};
5141043ec4SLinus Walleij	};
5241043ec4SLinus Walleij
5341043ec4SLinus Walleij	leds {
5441043ec4SLinus Walleij		compatible = "gpio-leds";
5541043ec4SLinus Walleij		led-green-harddisk {
5641043ec4SLinus Walleij			label = "sq201:green:harddisk";
5741043ec4SLinus Walleij			/* Conflict with LCD (no problem) */
5841043ec4SLinus Walleij			gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
5941043ec4SLinus Walleij			default-state = "off";
6041043ec4SLinus Walleij			linux,default-trigger = "disk-activity";
6141043ec4SLinus Walleij		};
6241043ec4SLinus Walleij		led-green-wireless {
6341043ec4SLinus Walleij			label = "sq201:green:wireless";
6441043ec4SLinus Walleij			/* Conflict with NAND flash CE0 (no problem) */
6541043ec4SLinus Walleij			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
6641043ec4SLinus Walleij			default-state = "on";
6741043ec4SLinus Walleij			linux,default-trigger = "heartbeat";
6841043ec4SLinus Walleij		};
6941043ec4SLinus Walleij	};
7041043ec4SLinus Walleij
7141043ec4SLinus Walleij	mdio0: mdio {
7241043ec4SLinus Walleij		compatible = "virtual,mdio-gpio";
7341043ec4SLinus Walleij		/* Uses MDC and MDIO */
7441043ec4SLinus Walleij		gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
7541043ec4SLinus Walleij			<&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
7641043ec4SLinus Walleij		#address-cells = <1>;
7741043ec4SLinus Walleij		#size-cells = <0>;
7841043ec4SLinus Walleij
7941043ec4SLinus Walleij		/* This is a Marvell 88E1111 ethernet transciever */
8041043ec4SLinus Walleij		phy0: ethernet-phy@1 {
8141043ec4SLinus Walleij			reg = <1>;
8241043ec4SLinus Walleij		};
8341043ec4SLinus Walleij	};
8441043ec4SLinus Walleij
8541043ec4SLinus Walleij	spi {
8641043ec4SLinus Walleij		compatible = "spi-gpio";
8741043ec4SLinus Walleij		#address-cells = <1>;
8841043ec4SLinus Walleij		#size-cells = <0>;
8941043ec4SLinus Walleij		/* Check pin collisions */
907d6c9ee5SCorentin Labbe		sck-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
917d6c9ee5SCorentin Labbe		miso-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
927d6c9ee5SCorentin Labbe		mosi-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
9341043ec4SLinus Walleij		cs-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
9441043ec4SLinus Walleij		num-chipselects = <1>;
9541043ec4SLinus Walleij
965ee18186SLinus Walleij		ethernet-switch@0 {
9741043ec4SLinus Walleij			compatible = "vitesse,vsc7385";
9841043ec4SLinus Walleij			reg = <0>;
9941043ec4SLinus Walleij			/* Specified for 2.5 MHz or below */
10041043ec4SLinus Walleij			spi-max-frequency = <2500000>;
10141043ec4SLinus Walleij			gpio-controller;
10241043ec4SLinus Walleij			#gpio-cells = <2>;
10341043ec4SLinus Walleij
1045ee18186SLinus Walleij			ethernet-ports {
10541043ec4SLinus Walleij				#address-cells = <1>;
10641043ec4SLinus Walleij				#size-cells = <0>;
10741043ec4SLinus Walleij
1085ee18186SLinus Walleij				ethernet-port@0 {
10941043ec4SLinus Walleij					reg = <0>;
11041043ec4SLinus Walleij					label = "lan1";
11141043ec4SLinus Walleij				};
1125ee18186SLinus Walleij				ethernet-port@1 {
11341043ec4SLinus Walleij					reg = <1>;
11441043ec4SLinus Walleij					label = "lan2";
11541043ec4SLinus Walleij				};
1165ee18186SLinus Walleij				ethernet-port@2 {
11741043ec4SLinus Walleij					reg = <2>;
11841043ec4SLinus Walleij					label = "lan3";
11941043ec4SLinus Walleij				};
1205ee18186SLinus Walleij				ethernet-port@3 {
12141043ec4SLinus Walleij					reg = <3>;
12241043ec4SLinus Walleij					label = "lan4";
12341043ec4SLinus Walleij				};
1245ee18186SLinus Walleij				vsc: ethernet-port@6 {
12541043ec4SLinus Walleij					reg = <6>;
12641043ec4SLinus Walleij					label = "cpu";
12741043ec4SLinus Walleij					ethernet = <&gmac1>;
12841043ec4SLinus Walleij					phy-mode = "rgmii";
12941043ec4SLinus Walleij					fixed-link {
13041043ec4SLinus Walleij						speed = <1000>;
13141043ec4SLinus Walleij						full-duplex;
13241043ec4SLinus Walleij						pause;
13341043ec4SLinus Walleij					};
13441043ec4SLinus Walleij				};
13541043ec4SLinus Walleij			};
13641043ec4SLinus Walleij		};
13741043ec4SLinus Walleij	};
13841043ec4SLinus Walleij
13941043ec4SLinus Walleij
14041043ec4SLinus Walleij	soc {
14141043ec4SLinus Walleij		flash@30000000 {
14241043ec4SLinus Walleij			status = "okay";
14341043ec4SLinus Walleij			/* 16MB of flash */
14441043ec4SLinus Walleij			reg = <0x30000000 0x01000000>;
14541043ec4SLinus Walleij
146b5a923f8SLinus Walleij			partitions {
147b5a923f8SLinus Walleij				compatible = "redboot-fis";
148b5a923f8SLinus Walleij				/* Eraseblock at 0xfe0000 */
149b5a923f8SLinus Walleij				fis-index-block = <0x1fc>;
15041043ec4SLinus Walleij			};
15141043ec4SLinus Walleij		};
15241043ec4SLinus Walleij
15341043ec4SLinus Walleij		syscon: syscon@40000000 {
15441043ec4SLinus Walleij			pinctrl {
15541043ec4SLinus Walleij				/*
15647ef78b0SLinus Walleij				 * gpio0agrp cover line 0, used by WPS button
15747ef78b0SLinus Walleij				 * gpio0fgrp cover line 16 used by HD LED
15847ef78b0SLinus Walleij				 * gpio0ggrp cover line 17, 18 used by wireless LAN LED and
15947ef78b0SLinus Walleij				 * reset button OR USB ID select on 17 and USB VBUS select
16047ef78b0SLinus Walleij				 * on 18. (Confusing.)
16147ef78b0SLinus Walleij				 * gpio0igrp cover line 21, 22 used by MDIO for Marvell PHY
16241043ec4SLinus Walleij				 */
16341043ec4SLinus Walleij				gpio0_default_pins: pinctrl-gpio0 {
16441043ec4SLinus Walleij					mux {
16541043ec4SLinus Walleij						function = "gpio0";
16647ef78b0SLinus Walleij						groups = "gpio0agrp",
16741043ec4SLinus Walleij						"gpio0fgrp",
16847ef78b0SLinus Walleij						"gpio0ggrp",
16947ef78b0SLinus Walleij						"gpio0igrp";
17041043ec4SLinus Walleij					};
17141043ec4SLinus Walleij				};
17241043ec4SLinus Walleij				/*
17341043ec4SLinus Walleij				 * gpio1dgrp cover lines used by SPI for
17441043ec4SLinus Walleij				 * the Vitesse chip (28-31)
17541043ec4SLinus Walleij				 */
17641043ec4SLinus Walleij				gpio1_default_pins: pinctrl-gpio1 {
17741043ec4SLinus Walleij					mux {
17841043ec4SLinus Walleij						function = "gpio1";
17941043ec4SLinus Walleij						groups = "gpio1dgrp";
18041043ec4SLinus Walleij					};
18141043ec4SLinus Walleij				};
18241043ec4SLinus Walleij				pinctrl-gmii {
18341043ec4SLinus Walleij					mux {
18441043ec4SLinus Walleij						function = "gmii";
18541043ec4SLinus Walleij						groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
18641043ec4SLinus Walleij					};
18741043ec4SLinus Walleij					/* Control pad skew comes from sl_switch.c in the vendor code */
18841043ec4SLinus Walleij					conf0 {
18941043ec4SLinus Walleij						pins = "P10 GMAC1 TXC";
19041043ec4SLinus Walleij						skew-delay = <5>;
19141043ec4SLinus Walleij					};
19241043ec4SLinus Walleij					conf1 {
19341043ec4SLinus Walleij						pins = "V11 GMAC1 TXEN";
19441043ec4SLinus Walleij						skew-delay = <7>;
19541043ec4SLinus Walleij					};
19641043ec4SLinus Walleij					conf2 {
19741043ec4SLinus Walleij						pins = "T11 GMAC1 RXC";
19841043ec4SLinus Walleij						skew-delay = <8>;
19941043ec4SLinus Walleij					};
20041043ec4SLinus Walleij					conf3 {
20141043ec4SLinus Walleij						pins = "U11 GMAC1 RXDV";
20241043ec4SLinus Walleij						skew-delay = <7>;
20341043ec4SLinus Walleij					};
20441043ec4SLinus Walleij					conf4 {
20541043ec4SLinus Walleij						pins = "V7 GMAC0 TXC";
20641043ec4SLinus Walleij						skew-delay = <10>;
20741043ec4SLinus Walleij					};
20841043ec4SLinus Walleij					conf5 {
20941043ec4SLinus Walleij						pins = "P8 GMAC0 TXEN";
21041043ec4SLinus Walleij						skew-delay = <7>; /* 5 at another place? */
21141043ec4SLinus Walleij					};
21241043ec4SLinus Walleij					conf6 {
21341043ec4SLinus Walleij						pins = "T8 GMAC0 RXC";
21441043ec4SLinus Walleij						skew-delay = <15>;
21541043ec4SLinus Walleij					};
21641043ec4SLinus Walleij					conf7 {
21741043ec4SLinus Walleij						pins = "R8 GMAC0 RXDV";
21841043ec4SLinus Walleij						skew-delay = <0>;
21941043ec4SLinus Walleij					};
22041043ec4SLinus Walleij					conf8 {
22141043ec4SLinus Walleij						/* The data lines all have default skew */
22241043ec4SLinus Walleij						pins = "U8 GMAC0 RXD0", "V8 GMAC0 RXD1",
22341043ec4SLinus Walleij						       "P9 GMAC0 RXD2", "R9 GMAC0 RXD3",
22441043ec4SLinus Walleij						       "R11 GMAC1 RXD0", "P11 GMAC1 RXD1",
22541043ec4SLinus Walleij						       "V12 GMAC1 RXD2", "U12 GMAC1 RXD3",
22641043ec4SLinus Walleij						       "R10 GMAC1 TXD0", "T10 GMAC1 TXD1",
22741043ec4SLinus Walleij						       "U10 GMAC1 TXD2", "V10 GMAC1 TXD3";
22841043ec4SLinus Walleij						skew-delay = <7>;
22941043ec4SLinus Walleij					};
23041043ec4SLinus Walleij					/* Appears in sl351x_gmac.c in the vendor code */
23141043ec4SLinus Walleij					conf9 {
23241043ec4SLinus Walleij						pins = "U7 GMAC0 TXD0", "T7 GMAC0 TXD1",
23341043ec4SLinus Walleij						       "R7 GMAC0 TXD2", "P7 GMAC0 TXD3";
23441043ec4SLinus Walleij						skew-delay = <5>;
23541043ec4SLinus Walleij					};
23641043ec4SLinus Walleij				};
23741043ec4SLinus Walleij			};
23841043ec4SLinus Walleij		};
23941043ec4SLinus Walleij
24041043ec4SLinus Walleij		/* Both interfaces brought out on SATA connectors */
24141043ec4SLinus Walleij		sata: sata@46000000 {
24241043ec4SLinus Walleij			cortina,gemini-ata-muxmode = <0>;
24341043ec4SLinus Walleij			cortina,gemini-enable-sata-bridge;
24441043ec4SLinus Walleij			status = "okay";
24541043ec4SLinus Walleij		};
24641043ec4SLinus Walleij
24741043ec4SLinus Walleij		gpio0: gpio@4d000000 {
24841043ec4SLinus Walleij			pinctrl-names = "default";
24941043ec4SLinus Walleij			pinctrl-0 = <&gpio0_default_pins>;
25041043ec4SLinus Walleij		};
25141043ec4SLinus Walleij
25241043ec4SLinus Walleij		gpio1: gpio@4e000000 {
25341043ec4SLinus Walleij			pinctrl-names = "default";
25441043ec4SLinus Walleij			pinctrl-0 = <&gpio1_default_pins>;
25541043ec4SLinus Walleij		};
25641043ec4SLinus Walleij
25741043ec4SLinus Walleij		pci@50000000 {
25841043ec4SLinus Walleij			status = "okay";
25941043ec4SLinus Walleij		};
26041043ec4SLinus Walleij
26141043ec4SLinus Walleij		ethernet@60000000 {
26241043ec4SLinus Walleij			status = "okay";
26341043ec4SLinus Walleij
26441043ec4SLinus Walleij			ethernet-port@0 {
26541043ec4SLinus Walleij				phy-mode = "rgmii";
26641043ec4SLinus Walleij				phy-handle = <&phy0>;
26741043ec4SLinus Walleij			};
26841043ec4SLinus Walleij			ethernet-port@1 {
26941043ec4SLinus Walleij				phy-mode = "rgmii";
27041043ec4SLinus Walleij				fixed-link {
27141043ec4SLinus Walleij					speed = <1000>;
27241043ec4SLinus Walleij					full-duplex;
27341043ec4SLinus Walleij					pause;
27441043ec4SLinus Walleij				};
27541043ec4SLinus Walleij			};
27641043ec4SLinus Walleij		};
27741043ec4SLinus Walleij
27867ac6549SLinus Walleij		ide@63000000 {
27941043ec4SLinus Walleij			status = "okay";
28041043ec4SLinus Walleij		};
28141043ec4SLinus Walleij
28267ac6549SLinus Walleij		ide@63400000 {
28341043ec4SLinus Walleij			status = "okay";
28441043ec4SLinus Walleij		};
285d6d0cef5SLinus Walleij
286d6d0cef5SLinus Walleij		usb@68000000 {
287d6d0cef5SLinus Walleij			status = "okay";
288d6d0cef5SLinus Walleij		};
289d6d0cef5SLinus Walleij
290d6d0cef5SLinus Walleij		usb@69000000 {
291d6d0cef5SLinus Walleij			status = "okay";
292d6d0cef5SLinus Walleij		};
29341043ec4SLinus Walleij	};
29441043ec4SLinus Walleij};
295