1*26c57ef1SJohannes ThumshirnBindings for MEN A21 Watchdog device connected to GPIO lines 2*26c57ef1SJohannes Thumshirn 3*26c57ef1SJohannes ThumshirnRequired properties: 4*26c57ef1SJohannes Thumshirn- compatible: "men,a021-wdt" 5*26c57ef1SJohannes Thumshirn- gpios: Specifies the pins that control the Watchdog, order: 6*26c57ef1SJohannes Thumshirn 1: Watchdog enable 7*26c57ef1SJohannes Thumshirn 2: Watchdog fast-mode 8*26c57ef1SJohannes Thumshirn 3: Watchdog trigger 9*26c57ef1SJohannes Thumshirn 4: Watchdog reset cause bit 0 10*26c57ef1SJohannes Thumshirn 5: Watchdog reset cause bit 1 11*26c57ef1SJohannes Thumshirn 6: Watchdog reset cause bit 2 12*26c57ef1SJohannes Thumshirn 13*26c57ef1SJohannes ThumshirnOptional properties: 14*26c57ef1SJohannes Thumshirn- None 15*26c57ef1SJohannes Thumshirn 16*26c57ef1SJohannes ThumshirnExample: 17*26c57ef1SJohannes Thumshirn watchdog { 18*26c57ef1SJohannes Thumshirn compatible ="men,a021-wdt"; 19*26c57ef1SJohannes Thumshirn gpios = <&gpio3 9 1 /* WD_EN */ 20*26c57ef1SJohannes Thumshirn &gpio3 10 1 /* WD_FAST */ 21*26c57ef1SJohannes Thumshirn &gpio3 11 1 /* WD_TRIG */ 22*26c57ef1SJohannes Thumshirn &gpio3 6 1 /* RST_CAUSE[0] */ 23*26c57ef1SJohannes Thumshirn &gpio3 7 1 /* RST_CAUSE[1] */ 24*26c57ef1SJohannes Thumshirn &gpio3 8 1>; /* RST_CAUSE[2] */ 25*26c57ef1SJohannes Thumshirn }; 26