17522c08dSYoshihiro Shimoda# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 27522c08dSYoshihiro Shimoda%YAML 1.2 37522c08dSYoshihiro Shimoda--- 47522c08dSYoshihiro Shimoda$id: http://devicetree.org/schemas/ufs/renesas,ufs.yaml# 57522c08dSYoshihiro Shimoda$schema: http://devicetree.org/meta-schemas/core.yaml# 67522c08dSYoshihiro Shimoda 77522c08dSYoshihiro Shimodatitle: Renesas R-Car UFS Host Controller 87522c08dSYoshihiro Shimoda 97522c08dSYoshihiro Shimodamaintainers: 107522c08dSYoshihiro Shimoda - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 117522c08dSYoshihiro Shimoda 127522c08dSYoshihiro ShimodaallOf: 137522c08dSYoshihiro Shimoda - $ref: ufs-common.yaml 147522c08dSYoshihiro Shimoda 157522c08dSYoshihiro Shimodaproperties: 167522c08dSYoshihiro Shimoda compatible: 177522c08dSYoshihiro Shimoda const: renesas,r8a779f0-ufs 187522c08dSYoshihiro Shimoda 197522c08dSYoshihiro Shimoda reg: 207522c08dSYoshihiro Shimoda maxItems: 1 217522c08dSYoshihiro Shimoda 227522c08dSYoshihiro Shimoda clocks: 237522c08dSYoshihiro Shimoda maxItems: 2 247522c08dSYoshihiro Shimoda 257522c08dSYoshihiro Shimoda clock-names: 267522c08dSYoshihiro Shimoda items: 277522c08dSYoshihiro Shimoda - const: fck 287522c08dSYoshihiro Shimoda - const: ref_clk 297522c08dSYoshihiro Shimoda 307522c08dSYoshihiro Shimoda power-domains: 317522c08dSYoshihiro Shimoda maxItems: 1 327522c08dSYoshihiro Shimoda 337522c08dSYoshihiro Shimoda resets: 347522c08dSYoshihiro Shimoda maxItems: 1 357522c08dSYoshihiro Shimoda 36*67407b84SGeert Uytterhoeven nvmem-cells: 37*67407b84SGeert Uytterhoeven maxItems: 1 38*67407b84SGeert Uytterhoeven 39*67407b84SGeert Uytterhoeven nvmem-cell-names: 40*67407b84SGeert Uytterhoeven items: 41*67407b84SGeert Uytterhoeven - const: calibration 42*67407b84SGeert Uytterhoeven 43*67407b84SGeert Uytterhoevendependencies: 44*67407b84SGeert Uytterhoeven nvmem-cells: [ nvmem-cell-names ] 45*67407b84SGeert Uytterhoeven 467522c08dSYoshihiro Shimodarequired: 477522c08dSYoshihiro Shimoda - compatible 487522c08dSYoshihiro Shimoda - reg 497522c08dSYoshihiro Shimoda - clocks 507522c08dSYoshihiro Shimoda - clock-names 517522c08dSYoshihiro Shimoda - power-domains 527522c08dSYoshihiro Shimoda - resets 537522c08dSYoshihiro Shimoda 547522c08dSYoshihiro ShimodaunevaluatedProperties: false 557522c08dSYoshihiro Shimoda 567522c08dSYoshihiro Shimodaexamples: 577522c08dSYoshihiro Shimoda - | 587522c08dSYoshihiro Shimoda #include <dt-bindings/clock/r8a779f0-cpg-mssr.h> 597522c08dSYoshihiro Shimoda #include <dt-bindings/interrupt-controller/arm-gic.h> 607522c08dSYoshihiro Shimoda #include <dt-bindings/power/r8a779f0-sysc.h> 617522c08dSYoshihiro Shimoda 627522c08dSYoshihiro Shimoda ufs: ufs@e686000 { 637522c08dSYoshihiro Shimoda compatible = "renesas,r8a779f0-ufs"; 647522c08dSYoshihiro Shimoda reg = <0xe6860000 0x100>; 657522c08dSYoshihiro Shimoda interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>; 667522c08dSYoshihiro Shimoda clocks = <&cpg CPG_MOD 1514>, <&ufs30_clk>; 677522c08dSYoshihiro Shimoda clock-names = "fck", "ref_clk"; 687522c08dSYoshihiro Shimoda freq-table-hz = <200000000 200000000>, <38400000 38400000>; 697522c08dSYoshihiro Shimoda power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; 707522c08dSYoshihiro Shimoda resets = <&cpg 1514>; 71*67407b84SGeert Uytterhoeven nvmem-cells = <&ufs_tune>; 72*67407b84SGeert Uytterhoeven nvmem-cell-names = "calibration"; 737522c08dSYoshihiro Shimoda }; 74