10a1b9293SMaxime Ripard# SPDX-License-Identifier: GPL-2.0 20a1b9293SMaxime Ripard%YAML 1.2 30a1b9293SMaxime Ripard--- 40a1b9293SMaxime Ripard$id: http://devicetree.org/schemas/spi/spi-controller.yaml# 50a1b9293SMaxime Ripard$schema: http://devicetree.org/meta-schemas/core.yaml# 60a1b9293SMaxime Ripard 70a1b9293SMaxime Ripardtitle: SPI Controller Generic Binding 80a1b9293SMaxime Ripard 90a1b9293SMaxime Ripardmaintainers: 100a1b9293SMaxime Ripard - Mark Brown <broonie@kernel.org> 110a1b9293SMaxime Ripard 120a1b9293SMaxime Riparddescription: | 130a1b9293SMaxime Ripard SPI busses can be described with a node for the SPI controller device 140a1b9293SMaxime Ripard and a set of child nodes for each SPI slave on the bus. The system SPI 150a1b9293SMaxime Ripard controller may be described for use in SPI master mode or in SPI slave mode, 160a1b9293SMaxime Ripard but not for both at the same time. 170a1b9293SMaxime Ripard 180a1b9293SMaxime Ripardproperties: 190a1b9293SMaxime Ripard $nodename: 200a1b9293SMaxime Ripard pattern: "^spi(@.*|-[0-9a-f])*$" 210a1b9293SMaxime Ripard 220a1b9293SMaxime Ripard "#address-cells": 23faaa30ddSZhen Lei enum: [0, 1] 240a1b9293SMaxime Ripard 250a1b9293SMaxime Ripard "#size-cells": 260a1b9293SMaxime Ripard const: 0 270a1b9293SMaxime Ripard 280a1b9293SMaxime Ripard cs-gpios: 290a1b9293SMaxime Ripard description: | 300a1b9293SMaxime Ripard GPIOs used as chip selects. 310a1b9293SMaxime Ripard If that property is used, the number of chip selects will be 320a1b9293SMaxime Ripard increased automatically with max(cs-gpios, hardware chip selects). 330a1b9293SMaxime Ripard 347f01494fSManivannan Sadhasivam So if, for example, the controller has 4 CS lines, and the 350a1b9293SMaxime Ripard cs-gpios looks like this 360a1b9293SMaxime Ripard cs-gpios = <&gpio1 0 0>, <0>, <&gpio1 1 0>, <&gpio1 2 0>; 370a1b9293SMaxime Ripard 380a1b9293SMaxime Ripard Then it should be configured so that num_chipselect = 4, with 390a1b9293SMaxime Ripard the following mapping 400a1b9293SMaxime Ripard cs0 : &gpio1 0 0 410a1b9293SMaxime Ripard cs1 : native 420a1b9293SMaxime Ripard cs2 : &gpio1 1 0 430a1b9293SMaxime Ripard cs3 : &gpio1 2 0 440a1b9293SMaxime Ripard 452fee9583SH. Nikolaus Schaller The second flag of a gpio descriptor can be GPIO_ACTIVE_HIGH (0) 462fee9583SH. Nikolaus Schaller or GPIO_ACTIVE_LOW(1). Legacy device trees often use 0. 472fee9583SH. Nikolaus Schaller 482fee9583SH. Nikolaus Schaller There is a special rule set for combining the second flag of an 492fee9583SH. Nikolaus Schaller cs-gpio with the optional spi-cs-high flag for SPI slaves. 502fee9583SH. Nikolaus Schaller 512fee9583SH. Nikolaus Schaller Each table entry defines how the CS pin is to be physically 522fee9583SH. Nikolaus Schaller driven (not considering potential gpio inversions by pinmux): 532fee9583SH. Nikolaus Schaller 542fee9583SH. Nikolaus Schaller device node | cs-gpio | CS pin state active | Note 552fee9583SH. Nikolaus Schaller ================+===============+=====================+===== 562fee9583SH. Nikolaus Schaller spi-cs-high | - | H | 572fee9583SH. Nikolaus Schaller - | - | L | 582fee9583SH. Nikolaus Schaller spi-cs-high | ACTIVE_HIGH | H | 592fee9583SH. Nikolaus Schaller - | ACTIVE_HIGH | L | 1 602fee9583SH. Nikolaus Schaller spi-cs-high | ACTIVE_LOW | H | 2 612fee9583SH. Nikolaus Schaller - | ACTIVE_LOW | L | 622fee9583SH. Nikolaus Schaller 632fee9583SH. Nikolaus Schaller Notes: 642fee9583SH. Nikolaus Schaller 1) Should print a warning about polarity inversion. 652fee9583SH. Nikolaus Schaller Here it would be wise to avoid and define the gpio as 662fee9583SH. Nikolaus Schaller ACTIVE_LOW. 672fee9583SH. Nikolaus Schaller 2) Should print a warning about polarity inversion 682fee9583SH. Nikolaus Schaller because ACTIVE_LOW is overridden by spi-cs-high. 692fee9583SH. Nikolaus Schaller Should be generally avoided and be replaced by 702fee9583SH. Nikolaus Schaller spi-cs-high + ACTIVE_HIGH. 712fee9583SH. Nikolaus Schaller 720a1b9293SMaxime Ripard num-cs: 730a1b9293SMaxime Ripard $ref: /schemas/types.yaml#/definitions/uint32 740a1b9293SMaxime Ripard description: 750a1b9293SMaxime Ripard Total number of chip selects. 760a1b9293SMaxime Ripard 770a1b9293SMaxime Ripard spi-slave: 780a1b9293SMaxime Ripard $ref: /schemas/types.yaml#/definitions/flag 790a1b9293SMaxime Ripard description: 800a1b9293SMaxime Ripard The SPI controller acts as a slave, instead of a master. 810a1b9293SMaxime Ripard 82faaa30ddSZhen LeiallOf: 83faaa30ddSZhen Lei - if: 84faaa30ddSZhen Lei not: 85faaa30ddSZhen Lei required: 86a079ff85SGeert Uytterhoeven - spi-slave 87faaa30ddSZhen Lei then: 88faaa30ddSZhen Lei properties: 89faaa30ddSZhen Lei "#address-cells": 90faaa30ddSZhen Lei const: 1 91faaa30ddSZhen Lei else: 92faaa30ddSZhen Lei properties: 93faaa30ddSZhen Lei "#address-cells": 94faaa30ddSZhen Lei const: 0 95a079ff85SGeert Uytterhoeven 960a1b9293SMaxime RipardpatternProperties: 970a1b9293SMaxime Ripard "^slave$": 980a1b9293SMaxime Ripard type: object 990a1b9293SMaxime Ripard 1000a1b9293SMaxime Ripard properties: 1010a1b9293SMaxime Ripard compatible: 1020a1b9293SMaxime Ripard description: 1030a1b9293SMaxime Ripard Compatible of the SPI device. 1040a1b9293SMaxime Ripard 1050a1b9293SMaxime Ripard required: 1060a1b9293SMaxime Ripard - compatible 1070a1b9293SMaxime Ripard 1080a1b9293SMaxime Ripard "^.*@[0-9a-f]+$": 1090a1b9293SMaxime Ripard type: object 1100a1b9293SMaxime Ripard 1110a1b9293SMaxime Ripard properties: 1120a1b9293SMaxime Ripard compatible: 1130a1b9293SMaxime Ripard description: 1140a1b9293SMaxime Ripard Compatible of the SPI device. 1150a1b9293SMaxime Ripard 1160a1b9293SMaxime Ripard reg: 1170a1b9293SMaxime Ripard minimum: 0 1180a1b9293SMaxime Ripard maximum: 256 1190a1b9293SMaxime Ripard description: 1200a1b9293SMaxime Ripard Chip select used by the device. 1210a1b9293SMaxime Ripard 1220a1b9293SMaxime Ripard spi-3wire: 1230a1b9293SMaxime Ripard $ref: /schemas/types.yaml#/definitions/flag 1240a1b9293SMaxime Ripard description: 1250a1b9293SMaxime Ripard The device requires 3-wire mode. 1260a1b9293SMaxime Ripard 1270a1b9293SMaxime Ripard spi-cpha: 1280a1b9293SMaxime Ripard $ref: /schemas/types.yaml#/definitions/flag 1290a1b9293SMaxime Ripard description: 1300a1b9293SMaxime Ripard The device requires shifted clock phase (CPHA) mode. 1310a1b9293SMaxime Ripard 1320a1b9293SMaxime Ripard spi-cpol: 1330a1b9293SMaxime Ripard $ref: /schemas/types.yaml#/definitions/flag 1340a1b9293SMaxime Ripard description: 1350a1b9293SMaxime Ripard The device requires inverse clock polarity (CPOL) mode. 1360a1b9293SMaxime Ripard 1370a1b9293SMaxime Ripard spi-cs-high: 1380a1b9293SMaxime Ripard $ref: /schemas/types.yaml#/definitions/flag 1390a1b9293SMaxime Ripard description: 1400a1b9293SMaxime Ripard The device requires the chip select active high. 1410a1b9293SMaxime Ripard 1420a1b9293SMaxime Ripard spi-lsb-first: 1430a1b9293SMaxime Ripard $ref: /schemas/types.yaml#/definitions/flag 1440a1b9293SMaxime Ripard description: 1450a1b9293SMaxime Ripard The device requires the LSB first mode. 1460a1b9293SMaxime Ripard 1470a1b9293SMaxime Ripard spi-max-frequency: 1480a1b9293SMaxime Ripard $ref: /schemas/types.yaml#/definitions/uint32 1490a1b9293SMaxime Ripard description: 1500a1b9293SMaxime Ripard Maximum SPI clocking speed of the device in Hz. 1510a1b9293SMaxime Ripard 1520a1b9293SMaxime Ripard spi-rx-bus-width: 1530a1b9293SMaxime Ripard description: 15430b435d5SGeert Uytterhoeven Bus width to the SPI bus used for read transfers. 155ffe9819bSAlexandru Ardelean If 0 is provided, then no RX will be possible on this device. 1563d21a460SRob Herring $ref: /schemas/types.yaml#/definitions/uint32 157ffe9819bSAlexandru Ardelean enum: [0, 1, 2, 4, 8] 1583d21a460SRob Herring default: 1 1590a1b9293SMaxime Ripard 1600a1b9293SMaxime Ripard spi-rx-delay-us: 1610a1b9293SMaxime Ripard description: 1620a1b9293SMaxime Ripard Delay, in microseconds, after a read transfer. 1630a1b9293SMaxime Ripard 1640a1b9293SMaxime Ripard spi-tx-bus-width: 1650a1b9293SMaxime Ripard description: 16630b435d5SGeert Uytterhoeven Bus width to the SPI bus used for write transfers. 167ffe9819bSAlexandru Ardelean If 0 is provided, then no TX will be possible on this device. 1683d21a460SRob Herring $ref: /schemas/types.yaml#/definitions/uint32 169ffe9819bSAlexandru Ardelean enum: [0, 1, 2, 4, 8] 1703d21a460SRob Herring default: 1 1710a1b9293SMaxime Ripard 1720a1b9293SMaxime Ripard spi-tx-delay-us: 1730a1b9293SMaxime Ripard description: 1740a1b9293SMaxime Ripard Delay, in microseconds, after a write transfer. 1750a1b9293SMaxime Ripard 1760a1b9293SMaxime Ripard required: 1770a1b9293SMaxime Ripard - compatible 1780a1b9293SMaxime Ripard - reg 1790a1b9293SMaxime Ripard 1806a0e321eSRob HerringadditionalProperties: true 1816a0e321eSRob Herring 1820a1b9293SMaxime Ripardexamples: 1830a1b9293SMaxime Ripard - | 18428ffe8bfSRob Herring spi@80010000 { 1850a1b9293SMaxime Ripard #address-cells = <1>; 1860a1b9293SMaxime Ripard #size-cells = <0>; 18728ffe8bfSRob Herring compatible = "fsl,imx28-spi"; 18828ffe8bfSRob Herring reg = <0x80010000 0x2000>; 18928ffe8bfSRob Herring interrupts = <96>; 19028ffe8bfSRob Herring dmas = <&dma_apbh 0>; 19128ffe8bfSRob Herring dma-names = "rx-tx"; 1920a1b9293SMaxime Ripard 19328ffe8bfSRob Herring display@0 { 19428ffe8bfSRob Herring compatible = "lg,lg4573"; 1950a1b9293SMaxime Ripard spi-max-frequency = <1000000>; 1960a1b9293SMaxime Ripard reg = <0>; 1970a1b9293SMaxime Ripard }; 1980a1b9293SMaxime Ripard 19928ffe8bfSRob Herring sensor@1 { 20028ffe8bfSRob Herring compatible = "bosch,bme680"; 2010a1b9293SMaxime Ripard spi-max-frequency = <100000>; 2020a1b9293SMaxime Ripard reg = <1>; 2030a1b9293SMaxime Ripard }; 2040a1b9293SMaxime Ripard }; 205