xref: /linux/Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml (revision e78f70bad29c5ae1e1076698b690b15794e9b81e) ! 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/rtc/atmel,at91sam9260-rtt.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Atmel AT91 RTT
9
10allOf:
11  - $ref: rtc.yaml#
12
13maintainers:
14  - Alexandre Belloni <alexandre.belloni@bootlin.com>
15
16properties:
17  compatible:
18    oneOf:
19      - items:
20          - const: atmel,at91sam9260-rtt
21      - items:
22          - enum:
23              - microchip,sam9x60-rtt
24              - microchip,sam9x7-rtt
25              - microchip,sama7d65-rtt
26          - const: atmel,at91sam9260-rtt
27      - items:
28          - const: microchip,sama7g5-rtt
29          - const: microchip,sam9x60-rtt
30          - const: atmel,at91sam9260-rtt
31
32  reg:
33    maxItems: 1
34
35  interrupts:
36    maxItems: 1
37
38  clocks:
39    maxItems: 1
40
41  atmel,rtt-rtc-time-reg:
42    $ref: /schemas/types.yaml#/definitions/phandle-array
43    items:
44      - items:
45          - description: Phandle to the GPBR node.
46          - description: Offset within the GPBR block.
47    description:
48      Should encode the GPBR register used to store the time base when the
49      RTT is used as an RTC. The first cell should point to the GPBR node
50      and the second one encodes the offset within the GPBR block (or in
51      other words, the GPBR register used to store the time base).
52
53required:
54  - compatible
55  - reg
56  - interrupts
57  - clocks
58  - atmel,rtt-rtc-time-reg
59
60unevaluatedProperties: false
61
62examples:
63  - |
64    #include <dt-bindings/interrupt-controller/irq.h>
65
66    rtc@fffffd20 {
67        compatible = "atmel,at91sam9260-rtt";
68        reg = <0xfffffd20 0x10>;
69        interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
70        clocks = <&clk32k>;
71        atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
72    };
73