161b23e48SMichael Walle# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 261b23e48SMichael Walle%YAML 1.2 361b23e48SMichael Walle--- 461b23e48SMichael Walle$id: http://devicetree.org/schemas/pinctrl/mscc,ocelot-pinctrl.yaml# 561b23e48SMichael Walle$schema: http://devicetree.org/meta-schemas/core.yaml# 661b23e48SMichael Walle 761b23e48SMichael Walletitle: Microsemi Ocelot pin controller 861b23e48SMichael Walle 961b23e48SMichael Wallemaintainers: 1061b23e48SMichael Walle - Alexandre Belloni <alexandre.belloni@bootlin.com> 1161b23e48SMichael Walle - Lars Povlsen <lars.povlsen@microchip.com> 1261b23e48SMichael Walle 1361b23e48SMichael Walleproperties: 1461b23e48SMichael Walle compatible: 1561b23e48SMichael Walle enum: 1661b23e48SMichael Walle - microchip,lan966x-pinctrl 1761b23e48SMichael Walle - microchip,sparx5-pinctrl 1861b23e48SMichael Walle - mscc,jaguar2-pinctrl 1961b23e48SMichael Walle - mscc,luton-pinctrl 2061b23e48SMichael Walle - mscc,ocelot-pinctrl 2161b23e48SMichael Walle - mscc,serval-pinctrl 2261b23e48SMichael Walle - mscc,servalt-pinctrl 2361b23e48SMichael Walle 2461b23e48SMichael Walle reg: 2561b23e48SMichael Walle items: 2661b23e48SMichael Walle - description: Base address 2761b23e48SMichael Walle - description: Extended pin configuration registers 2861b23e48SMichael Walle minItems: 1 2961b23e48SMichael Walle 3061b23e48SMichael Walle gpio-controller: true 3161b23e48SMichael Walle 3261b23e48SMichael Walle '#gpio-cells': 3361b23e48SMichael Walle const: 2 3461b23e48SMichael Walle 3561b23e48SMichael Walle gpio-ranges: true 3661b23e48SMichael Walle 3761b23e48SMichael Walle interrupts: 3861b23e48SMichael Walle maxItems: 1 3961b23e48SMichael Walle 4061b23e48SMichael Walle interrupt-controller: true 4161b23e48SMichael Walle 4261b23e48SMichael Walle "#interrupt-cells": 4361b23e48SMichael Walle const: 2 4461b23e48SMichael Walle 459c1082fdSMichael Walle resets: 469c1082fdSMichael Walle maxItems: 1 479c1082fdSMichael Walle 489c1082fdSMichael Walle reset-names: 499c1082fdSMichael Walle description: Optional shared switch reset. 509c1082fdSMichael Walle items: 519c1082fdSMichael Walle - const: switch 529c1082fdSMichael Walle 5361b23e48SMichael WallepatternProperties: 5461b23e48SMichael Walle '-pins$': 5561b23e48SMichael Walle type: object 5661b23e48SMichael Walle allOf: 5749cd1dd1SRob Herring - $ref: pinmux-node.yaml 5849cd1dd1SRob Herring - $ref: pincfg-node.yaml 5961b23e48SMichael Walle 6061b23e48SMichael Walle properties: 6161b23e48SMichael Walle function: true 6261b23e48SMichael Walle pins: true 6361b23e48SMichael Walle output-high: true 6461b23e48SMichael Walle output-low: true 6561b23e48SMichael Walle drive-strength: true 6661b23e48SMichael Walle 6761b23e48SMichael Walle required: 6861b23e48SMichael Walle - function 6961b23e48SMichael Walle - pins 7061b23e48SMichael Walle 7161b23e48SMichael Walle additionalProperties: false 7261b23e48SMichael Walle 7361b23e48SMichael Wallerequired: 7461b23e48SMichael Walle - compatible 7561b23e48SMichael Walle - reg 7661b23e48SMichael Walle - gpio-controller 7761b23e48SMichael Walle - '#gpio-cells' 7861b23e48SMichael Walle - gpio-ranges 7961b23e48SMichael Walle 8061b23e48SMichael WalleallOf: 8149cd1dd1SRob Herring - $ref: pinctrl.yaml# 8261b23e48SMichael Walle - if: 8361b23e48SMichael Walle properties: 8461b23e48SMichael Walle compatible: 8561b23e48SMichael Walle contains: 8661b23e48SMichael Walle enum: 8761b23e48SMichael Walle - microchip,lan966x-pinctrl 8861b23e48SMichael Walle - microchip,sparx5-pinctrl 8961b23e48SMichael Walle then: 9061b23e48SMichael Walle properties: 9161b23e48SMichael Walle reg: 9261b23e48SMichael Walle minItems: 2 9361b23e48SMichael Walle 9461b23e48SMichael WalleadditionalProperties: false 9561b23e48SMichael Walle 9661b23e48SMichael Walleexamples: 9761b23e48SMichael Walle - | 9861b23e48SMichael Walle gpio: pinctrl@71070034 { 9961b23e48SMichael Walle compatible = "mscc,ocelot-pinctrl"; 10061b23e48SMichael Walle reg = <0x71070034 0x28>; 10161b23e48SMichael Walle gpio-controller; 10261b23e48SMichael Walle #gpio-cells = <2>; 10361b23e48SMichael Walle gpio-ranges = <&gpio 0 0 22>; 10461b23e48SMichael Walle 10561b23e48SMichael Walle uart_pins: uart-pins { 10661b23e48SMichael Walle pins = "GPIO_6", "GPIO_7"; 10761b23e48SMichael Walle function = "uart"; 10861b23e48SMichael Walle }; 10961b23e48SMichael Walle 11061b23e48SMichael Walle uart2_pins: uart2-pins { 11161b23e48SMichael Walle pins = "GPIO_12", "GPIO_13"; 11261b23e48SMichael Walle function = "uart2"; 11361b23e48SMichael Walle }; 11461b23e48SMichael Walle }; 11561b23e48SMichael Walle 11661b23e48SMichael Walle... 117