1604b2579SPramod KumarBroadcom iProc GPIO/PINCONF Controller 22dffad82SRay Jui 32dffad82SRay JuiRequired properties: 42dffad82SRay Jui 52dffad82SRay Jui- compatible: 6*418af4a8SRay Jui "brcm,iproc-gpio" for the generic iProc based GPIO controller IP that 7*418af4a8SRay Jui supports full-featured pinctrl and GPIO functions used in various iProc 8*418af4a8SRay Jui based SoCs 9*418af4a8SRay Jui 10*418af4a8SRay Jui May contain an SoC-specific compatibility string to accommodate any 11*418af4a8SRay Jui SoC-specific features 12*418af4a8SRay Jui 13*418af4a8SRay Jui "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio", or 14*418af4a8SRay Jui "brcm,cygnus-crmu-gpio" for Cygnus SoCs 15*418af4a8SRay Jui 16*418af4a8SRay Jui "brcm,iproc-nsp-gpio" for the iProc NSP SoC that has drive strength support 17*418af4a8SRay Jui disabled 18*418af4a8SRay Jui 19*418af4a8SRay Jui "brcm,iproc-stingray-gpio" for the iProc Stingray SoC that has the general 20*418af4a8SRay Jui pinctrl support completely disabled in this IP block. In Stingray, a 21*418af4a8SRay Jui different IP block is used to handle pinctrl related functions 222dffad82SRay Jui 232dffad82SRay Jui- reg: 24604b2579SPramod Kumar Define the base and range of the I/O address space that contains SoC 252dffad82SRay JuiGPIO/PINCONF controller registers 262dffad82SRay Jui 272652df63SPramod Kumar- ngpios: 282652df63SPramod Kumar Total number of in-use slots in GPIO controller 292652df63SPramod Kumar 302dffad82SRay Jui- #gpio-cells: 312dffad82SRay Jui Must be two. The first cell is the GPIO pin number (within the 322dffad82SRay Juicontroller's pin space) and the second cell is used for the following: 332dffad82SRay Jui bit[0]: polarity (0 for active high and 1 for active low) 342dffad82SRay Jui 352dffad82SRay Jui- gpio-controller: 362dffad82SRay Jui Specifies that the node is a GPIO controller 372dffad82SRay Jui 382dffad82SRay JuiOptional properties: 392dffad82SRay Jui 402dffad82SRay Jui- interrupts: 412dffad82SRay Jui Interrupt ID 422dffad82SRay Jui 432dffad82SRay Jui- interrupt-controller: 442dffad82SRay Jui Specifies that the node is an interrupt controller 452dffad82SRay Jui 4603e09bc1SPramod Kumar- gpio-ranges: 4703e09bc1SPramod Kumar Specifies the mapping between gpio controller and pin-controllers pins. 4803e09bc1SPramod Kumar This requires 4 fields in cells defined as - 4903e09bc1SPramod Kumar 1. Phandle of pin-controller. 5003e09bc1SPramod Kumar 2. GPIO base pin offset. 5103e09bc1SPramod Kumar 3 Pin-control base pin offset. 5203e09bc1SPramod Kumar 4. number of gpio pins which are linearly mapped from pin base. 532dffad82SRay Jui 542dffad82SRay JuiSupported generic PINCONF properties in child nodes: 552dffad82SRay Jui 562dffad82SRay Jui- pins: 572dffad82SRay Jui The list of pins (within the controller's own pin space) that properties 582dffad82SRay Juiin the node apply to. Pin names are "gpio-<pin>" 592dffad82SRay Jui 602dffad82SRay Jui- bias-disable: 612dffad82SRay Jui Disable pin bias 622dffad82SRay Jui 632dffad82SRay Jui- bias-pull-up: 642dffad82SRay Jui Enable internal pull up resistor 652dffad82SRay Jui 662dffad82SRay Jui- bias-pull-down: 672dffad82SRay Jui Enable internal pull down resistor 682dffad82SRay Jui 692dffad82SRay Jui- drive-strength: 702dffad82SRay Jui Valid drive strength values include 2, 4, 6, 8, 10, 12, 14, 16 (mA) 712dffad82SRay Jui 722dffad82SRay JuiExample: 732dffad82SRay Jui gpio_ccm: gpio@1800a000 { 742dffad82SRay Jui compatible = "brcm,cygnus-ccm-gpio"; 752dffad82SRay Jui reg = <0x1800a000 0x50>, 762dffad82SRay Jui <0x0301d164 0x20>; 772652df63SPramod Kumar ngpios = <24>; 782dffad82SRay Jui #gpio-cells = <2>; 792dffad82SRay Jui gpio-controller; 802dffad82SRay Jui interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 812dffad82SRay Jui interrupt-controller; 822dffad82SRay Jui 832dffad82SRay Jui touch_pins: touch_pins { 842dffad82SRay Jui pwr: pwr { 852dffad82SRay Jui pins = "gpio-0"; 862dffad82SRay Jui drive-strength = <16>; 872dffad82SRay Jui }; 882dffad82SRay Jui 892dffad82SRay Jui event: event { 902dffad82SRay Jui pins = "gpio-1"; 912dffad82SRay Jui bias-pull-up; 922dffad82SRay Jui }; 932dffad82SRay Jui }; 942dffad82SRay Jui }; 952dffad82SRay Jui 962dffad82SRay Jui gpio_asiu: gpio@180a5000 { 972dffad82SRay Jui compatible = "brcm,cygnus-asiu-gpio"; 982dffad82SRay Jui reg = <0x180a5000 0x668>; 992652df63SPramod Kumar ngpios = <146>; 1002dffad82SRay Jui #gpio-cells = <2>; 1012dffad82SRay Jui gpio-controller; 1022dffad82SRay Jui interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1032dffad82SRay Jui interrupt-controller; 10403e09bc1SPramod Kumar gpio-ranges = <&pinctrl 0 42 1>, 10503e09bc1SPramod Kumar <&pinctrl 1 44 3>; 1062dffad82SRay Jui }; 1072dffad82SRay Jui 1082dffad82SRay Jui /* 1092dffad82SRay Jui * Touchscreen that uses the CCM GPIO 0 and 1 1102dffad82SRay Jui */ 1112dffad82SRay Jui tsc { 1122dffad82SRay Jui ... 1132dffad82SRay Jui ... 1142dffad82SRay Jui gpio-pwr = <&gpio_ccm 0 0>; 1152dffad82SRay Jui gpio-event = <&gpio_ccm 1 0>; 1162dffad82SRay Jui }; 1172dffad82SRay Jui 1182dffad82SRay Jui /* Bluetooth that uses the ASIU GPIO 5, with polarity inverted */ 1192dffad82SRay Jui bluetooth { 1202dffad82SRay Jui ... 1212dffad82SRay Jui ... 1222dffad82SRay Jui bcm,rfkill-bank-sel = <&gpio_asiu 5 1> 1232dffad82SRay Jui } 124