xref: /linux/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml (revision 057646a5db2f8873efba90eeffd165c2525b413f)

# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/pci/snps,dw-pcie.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Synopsys DesignWare PCIe interface

maintainers:
  - Jingoo Han <jingoohan1@gmail.com>
  - Gustavo Pimentel <gustavo.pimentel@synopsys.com>

description: |
  Synopsys DesignWare PCIe host controller

allOf:
  - $ref: /schemas/pci/pci-bus.yaml#
  - $ref: /schemas/pci/snps,dw-pcie-common.yaml#

properties:
  compatible:
    anyOf:
      - {}
      - const: snps,dw-pcie

  reg:
    description: |
      It should contain Data Bus Interface (dbi) and config registers for all
      versions.
      For designware core version >= 4.80, it may contain ATU address space.
    minItems: 2
    maxItems: 5

  reg-names:
    minItems: 2
    maxItems: 5
    items:
      enum: [ dbi, dbi2, config, atu, atu_dma, app, appl, elbi, mgmt, ctrl,
              parf, cfg, link, ulreg, smu, mpu, apb, phy ]

  interrupts: true

  interrupt-names: true

  clocks: true

additionalProperties: true

required:
  - reg
  - reg-names
  - compatible

examples:
  - |
    bus {
      #address-cells = <1>;
      #size-cells = <1>;
      pcie@dfc00000 {
        device_type = "pci";
        compatible = "snps,dw-pcie";
        reg = <0xdfc00000 0x0001000>, /* IP registers */
              <0xd0000000 0x0002000>; /* Configuration space */
        reg-names = "dbi", "config";
        #address-cells = <3>;
        #size-cells = <2>;
        ranges = <0x81000000 0 0x00000000 0xde000000 0 0x00010000>,
                 <0x82000000 0 0xd0400000 0xd0400000 0 0x0d000000>;
        interrupts = <25>, <24>;
        #interrupt-cells = <1>;
        num-lanes = <1>;
      };
    };