1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/opp/opp-v1.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Generic OPP (Operating Performance Points) v1 8 9maintainers: 10 - Viresh Kumar <viresh.kumar@linaro.org> 11 12description: |+ 13 Devices work at voltage-current-frequency combinations and some implementations 14 have the liberty of choosing these. These combinations are called Operating 15 Performance Points aka OPPs. This document defines bindings for these OPPs 16 applicable across wide range of devices. For illustration purpose, this document 17 uses CPU as a device. 18 19 This binding only supports voltage-frequency pairs. 20 21deprecated: true 22 23properties: 24 clock-latency: 25 $ref: /schemas/types.yaml#/definitions/uint32 26 description: 27 The latency in nanoseconds for clock changes. Use OPP tables for new 28 designs instead. 29 30 voltage-tolerance: 31 $ref: /schemas/types.yaml#/definitions/uint32 32 maximum: 10 33 description: 34 The voltage tolerance in percent. Use OPP tables for new designs instead. 35 36 operating-points: 37 $ref: /schemas/types.yaml#/definitions/uint32-matrix 38 items: 39 items: 40 - description: Frequency in kHz 41 - description: Voltage for OPP in uV 42 43dependencies: 44 clock-latency: [ operating-points ] 45 voltage-tolerance: [ operating-points ] 46 47additionalProperties: true 48 49examples: 50 - | 51 cpus { 52 #address-cells = <1>; 53 #size-cells = <0>; 54 55 cpu@0 { 56 compatible = "arm,cortex-a9"; 57 device_type = "cpu"; 58 reg = <0>; 59 next-level-cache = <&L2>; 60 operating-points = 61 /* kHz uV */ 62 <792000 1100000>, 63 <396000 950000>, 64 <198000 850000>; 65 }; 66 }; 67... 68