xref: /linux/Documentation/devicetree/bindings/interrupt-controller/econet,en751221-intc.yaml (revision e78f70bad29c5ae1e1076698b690b15794e9b81e) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/econet,en751221-intc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: EcoNet EN751221 Interrupt Controller
8
9maintainers:
10  - Caleb James DeLisle <cjd@cjdns.fr>
11
12description:
13  The EcoNet EN751221 Interrupt Controller is a simple interrupt controller
14  designed for the MIPS 34Kc MT SMP processor with 2 VPEs. Each interrupt can
15  be routed to either VPE but not both, so to support per-CPU interrupts, a
16  secondary IRQ number is allocated to control masking/unmasking on VPE#1. For
17  lack of a better term we call these "shadow interrupts". The assignment of
18  shadow interrupts is defined by the SoC integrator when wiring the interrupt
19  lines, so they are configurable in the device tree.
20
21allOf:
22  - $ref: /schemas/interrupt-controller.yaml#
23
24properties:
25  compatible:
26    const: econet,en751221-intc
27
28  reg:
29    maxItems: 1
30
31  "#interrupt-cells":
32    const: 1
33
34  interrupt-controller: true
35
36  interrupts:
37    maxItems: 1
38    description: Interrupt line connecting this controller to its parent.
39
40  econet,shadow-interrupts:
41    $ref: /schemas/types.yaml#/definitions/uint32-matrix
42    description:
43      An array of interrupt number pairs where each pair represents a shadow
44      interrupt relationship. The first number in each pair is the primary IRQ,
45      and the second is its shadow IRQ used for VPE#1 control. For example,
46      <8 3> means IRQ 8 is shadowed by IRQ 3, so IRQ 3 cannot be mapped, but
47      when VPE#1 requests IRQ 8, it will manipulate the IRQ 3 mask bit.
48    minItems: 1
49    maxItems: 20
50    items:
51      items:
52        - description: primary per-CPU IRQ
53        - description: shadow IRQ number
54
55required:
56  - compatible
57  - reg
58  - interrupt-controller
59  - "#interrupt-cells"
60  - interrupts
61
62additionalProperties: false
63
64examples:
65  - |
66    interrupt-controller@1fb40000 {
67        compatible = "econet,en751221-intc";
68        reg = <0x1fb40000 0x100>;
69
70        interrupt-controller;
71        #interrupt-cells = <1>;
72
73        interrupt-parent = <&cpuintc>;
74        interrupts = <2>;
75
76        econet,shadow-interrupts = <7 2>, <8 3>, <13 12>, <30 29>;
77    };
78...
79