1dff07b5eSMatthew Gerlach# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2dff07b5eSMatthew Gerlach# Copyright (C) 2015, 2024, Intel Corporation 3dff07b5eSMatthew Gerlach%YAML 1.2 4dff07b5eSMatthew Gerlach--- 5*f2e3df34SRob Herring (Arm)$id: http://devicetree.org/schemas/interrupt-controller/altr,msi-controller.yaml# 6dff07b5eSMatthew Gerlach$schema: http://devicetree.org/meta-schemas/core.yaml# 7dff07b5eSMatthew Gerlach 8dff07b5eSMatthew Gerlachtitle: Altera PCIe MSI controller 9dff07b5eSMatthew Gerlach 10dff07b5eSMatthew Gerlachmaintainers: 11dff07b5eSMatthew Gerlach - Matthew Gerlach <matthew.gerlach@linux.intel.com> 12dff07b5eSMatthew Gerlach 13dff07b5eSMatthew Gerlachproperties: 14dff07b5eSMatthew Gerlach compatible: 15dff07b5eSMatthew Gerlach enum: 16dff07b5eSMatthew Gerlach - altr,msi-1.0 17dff07b5eSMatthew Gerlach 18dff07b5eSMatthew Gerlach reg: 19dff07b5eSMatthew Gerlach items: 20dff07b5eSMatthew Gerlach - description: CSR registers 21dff07b5eSMatthew Gerlach - description: Vectors slave port region 22dff07b5eSMatthew Gerlach 23dff07b5eSMatthew Gerlach reg-names: 24dff07b5eSMatthew Gerlach items: 25dff07b5eSMatthew Gerlach - const: csr 26dff07b5eSMatthew Gerlach - const: vector_slave 27dff07b5eSMatthew Gerlach 28dff07b5eSMatthew Gerlach interrupts: 29dff07b5eSMatthew Gerlach maxItems: 1 30dff07b5eSMatthew Gerlach 31dff07b5eSMatthew Gerlach msi-controller: true 32dff07b5eSMatthew Gerlach 33dff07b5eSMatthew Gerlach num-vectors: 34dff07b5eSMatthew Gerlach description: number of vectors 35dff07b5eSMatthew Gerlach $ref: /schemas/types.yaml#/definitions/uint32 36dff07b5eSMatthew Gerlach minimum: 1 37dff07b5eSMatthew Gerlach maximum: 32 38dff07b5eSMatthew Gerlach 39dff07b5eSMatthew Gerlachrequired: 40dff07b5eSMatthew Gerlach - compatible 41dff07b5eSMatthew Gerlach - reg 42dff07b5eSMatthew Gerlach - reg-names 43dff07b5eSMatthew Gerlach - interrupts 44dff07b5eSMatthew Gerlach - msi-controller 45dff07b5eSMatthew Gerlach - num-vectors 46dff07b5eSMatthew Gerlach 47dff07b5eSMatthew GerlachallOf: 48dff07b5eSMatthew Gerlach - $ref: /schemas/interrupt-controller/msi-controller.yaml# 49dff07b5eSMatthew Gerlach 50dff07b5eSMatthew GerlachunevaluatedProperties: false 51dff07b5eSMatthew Gerlach 52dff07b5eSMatthew Gerlachexamples: 53dff07b5eSMatthew Gerlach - | 54dff07b5eSMatthew Gerlach #include <dt-bindings/interrupt-controller/arm-gic.h> 55dff07b5eSMatthew Gerlach #include <dt-bindings/interrupt-controller/irq.h> 56dff07b5eSMatthew Gerlach msi@ff200000 { 57dff07b5eSMatthew Gerlach compatible = "altr,msi-1.0"; 58dff07b5eSMatthew Gerlach reg = <0xff200000 0x00000010>, 59dff07b5eSMatthew Gerlach <0xff200010 0x00000080>; 60dff07b5eSMatthew Gerlach reg-names = "csr", "vector_slave"; 61dff07b5eSMatthew Gerlach interrupt-parent = <&hps_0_arm_gic_0>; 62dff07b5eSMatthew Gerlach interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; 63dff07b5eSMatthew Gerlach msi-controller; 64dff07b5eSMatthew Gerlach num-vectors = <32>; 65dff07b5eSMatthew Gerlach }; 66