1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/iio/frequency/adf4371.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Analog Devices ADF4371/ADF4372 Wideband Synthesizers 8 9maintainers: 10 - Popa Stefan <stefan.popa@analog.com> 11 12description: | 13 Analog Devices ADF4371/ADF4372 SPI Wideband Synthesizers 14 https://www.analog.com/media/en/technical-documentation/data-sheets/adf4371.pdf 15 https://www.analog.com/media/en/technical-documentation/data-sheets/adf4372.pdf 16 17properties: 18 compatible: 19 enum: 20 - adi,adf4371 21 - adi,adf4372 22 23 reg: 24 maxItems: 1 25 26 clocks: 27 description: 28 Definition of the external clock (see clock/clock-bindings.txt) 29 maxItems: 1 30 31 clock-names: 32 description: 33 Must be "clkin" if the input reference is single ended or "clkin-diff" 34 if the input reference is differential. 35 enum: [clkin, clkin-diff] 36 37 adi,mute-till-lock-en: 38 type: boolean 39 description: 40 If this property is present, then the supply current to RF8P and RF8N 41 output stage will shut down until the ADF4371/ADF4372 achieves lock as 42 measured by the digital lock detect circuitry. 43 44required: 45 - compatible 46 - reg 47 - clocks 48 - clock-names 49 50allOf: 51 - $ref: /schemas/spi/spi-peripheral-props.yaml# 52 53unevaluatedProperties: false 54 55examples: 56 - | 57 spi { 58 #address-cells = <1>; 59 #size-cells = <0>; 60 61 frequency@0 { 62 compatible = "adi,adf4371"; 63 reg = <0>; 64 spi-max-frequency = <1000000>; 65 clocks = <&adf4371_clkin>; 66 clock-names = "clkin"; 67 }; 68 }; 69... 70