1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/i2c/samsung,s3c2410-i2c.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Samsung S3C/S5P/Exynos SoC I2C Controller 8 9maintainers: 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 12properties: 13 compatible: 14 oneOf: 15 - enum: 16 - samsung,s3c2410-i2c 17 - samsung,s3c2440-i2c 18 # For s3c2440-like I2C used inside HDMIPHY block found on several SoCs: 19 - samsung,s3c2440-hdmiphy-i2c 20 # For s3c2440-like I2C used as a host to SATA PHY controller on an 21 # internal bus: 22 - samsung,exynos5-sata-phy-i2c 23 - items: 24 - enum: 25 - samsung,exynos7870-i2c 26 - samsung,exynos7885-i2c 27 - samsung,exynos850-i2c 28 - const: samsung,s3c2440-i2c 29 30 clocks: 31 maxItems: 1 32 33 clock-names: 34 items: 35 - const: i2c 36 37 gpios: 38 description: | 39 The order of the GPIOs should be the following:: <SDA, SCL>. The GPIO 40 specifier depends on the gpio controller. Required in all cases except 41 for "samsung,s3c2440-hdmiphy-i2c" whose input/output lines are 42 permanently wired to the respective client. 43 This property is deprecated. Use "pinctrl-0" and "pinctrl-names" instead. 44 deprecated: true 45 46 interrupts: 47 maxItems: 1 48 49 reg: 50 maxItems: 1 51 52 samsung,i2c-max-bus-freq: 53 $ref: /schemas/types.yaml#/definitions/uint32 54 description: 55 Desired frequency in Hz of the bus. 56 default: 100000 57 58 samsung,i2c-sda-delay: 59 $ref: /schemas/types.yaml#/definitions/uint32 60 description: 61 Delay (in ns) applied to data line (SDA) edges. 62 default: 0 63 64 samsung,i2c-slave-addr: 65 $ref: /schemas/types.yaml#/definitions/uint32 66 description: 67 Slave address in multi-master environment. 68 default: 0 69 70 samsung,sysreg-phandle: 71 $ref: /schemas/types.yaml#/definitions/phandle 72 description: Pandle to syscon used to control the system registers. 73 74required: 75 - compatible 76 - reg 77 78allOf: 79 - $ref: /schemas/i2c/i2c-controller.yaml# 80 - if: 81 properties: 82 compatible: 83 contains: 84 enum: 85 - samsung,s3c2440-hdmiphy-i2c 86 - samsung,exynos5-sata-phy-i2c 87 then: 88 properties: 89 gpios: false 90 91 - if: 92 properties: 93 compatible: 94 contains: 95 enum: 96 - samsung,s3c2410-i2c 97 - samsung,s3c2440-i2c 98 - samsung,s3c2440-hdmiphy-i2c 99 then: 100 required: 101 - interrupts 102 103unevaluatedProperties: false 104 105examples: 106 - | 107 #include <dt-bindings/clock/exynos5250.h> 108 #include <dt-bindings/interrupt-controller/arm-gic.h> 109 110 i2c@12c60000 { 111 compatible = "samsung,s3c2440-i2c"; 112 reg = <0x12C60000 0x100>; 113 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 114 #address-cells = <1>; 115 #size-cells = <0>; 116 clocks = <&clock CLK_I2C0>; 117 clock-names = "i2c"; 118 pinctrl-names = "default"; 119 pinctrl-0 = <&i2c0_bus>; 120 121 samsung,sysreg-phandle = <&sysreg_system_controller>; 122 samsung,i2c-sda-delay = <100>; 123 samsung,i2c-max-bus-freq = <20000>; 124 samsung,i2c-slave-addr = <0x66>; 125 126 eeprom@50 { 127 compatible = "samsung,s524ad0xd1", "atmel,24c128"; 128 reg = <0x50>; 129 }; 130 }; 131 132 i2c@12ce0000 { 133 compatible = "samsung,s3c2440-hdmiphy-i2c"; 134 reg = <0x12CE0000 0x1000>; 135 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; 136 #address-cells = <1>; 137 #size-cells = <0>; 138 clocks = <&clock CLK_I2C_HDMI>; 139 clock-names = "i2c"; 140 141 samsung,i2c-sda-delay = <100>; 142 samsung,i2c-max-bus-freq = <66000>; 143 144 phy-i2c@38 { 145 compatible = "samsung,exynos4212-hdmiphy"; 146 reg = <0x38>; 147 }; 148 }; 149 150 i2c@121d0000 { 151 compatible = "samsung,exynos5-sata-phy-i2c"; 152 reg = <0x121D0000 0x100>; 153 #address-cells = <1>; 154 #size-cells = <0>; 155 clocks = <&clock CLK_SATA_PHYI2C>; 156 clock-names = "i2c"; 157 158 samsung,i2c-sda-delay = <100>; 159 samsung,i2c-max-bus-freq = <40000>; 160 161 phy-i2c@38 { 162 compatible = "samsung,exynos-sataphy-i2c"; 163 reg = <0x38>; 164 }; 165 }; 166