xref: /linux/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml (revision 6315d93541f8a5f77c5ef5c4f25233e66d189603) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/dma/snps,dw-axi-dmac.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Synopsys DesignWare AXI DMA Controller
8
9maintainers:
10  - Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
11
12description:
13  Synopsys DesignWare AXI DMA Controller DT Binding
14
15allOf:
16  - $ref: dma-controller.yaml#
17
18properties:
19  compatible:
20    enum:
21      - snps,axi-dma-1.01a
22      - intel,kmb-axi-dma
23      - starfive,jh7110-axi-dma
24      - starfive,jh8100-axi-dma
25
26  reg:
27    minItems: 1
28    items:
29      - description: Address range of the DMAC registers
30      - description: Address range of the DMAC APB registers
31
32  reg-names:
33    items:
34      - const: axidma_ctrl_regs
35      - const: axidma_apb_regs
36
37  interrupts:
38    description:
39      If the IP-core synthesis parameter DMAX_INTR_IO_TYPE is set to 1, this
40      will be per-channel interrupts. Otherwise, this is a single combined IRQ
41      for all channels.
42    minItems: 1
43    maxItems: 8
44
45  clocks:
46    items:
47      - description: Bus Clock
48      - description: Module Clock
49
50  clock-names:
51    items:
52      - const: core-clk
53      - const: cfgr-clk
54
55  '#dma-cells':
56    const: 1
57
58  dma-channels:
59    minimum: 1
60    maximum: 8
61
62  dma-noncoherent: true
63
64  resets:
65    minItems: 1
66    maxItems: 2
67
68  snps,dma-masters:
69    description: |
70      Number of AXI masters supported by the hardware.
71    $ref: /schemas/types.yaml#/definitions/uint32
72    enum: [1, 2]
73
74  snps,data-width:
75    description: |
76      AXI data width supported by hardware.
77      (0 - 8bits, 1 - 16bits, 2 - 32bits, ..., 6 - 512bits)
78    $ref: /schemas/types.yaml#/definitions/uint32
79    enum: [0, 1, 2, 3, 4, 5, 6]
80
81  snps,priority:
82    description: |
83      Channel priority specifier associated with the DMA channels.
84    $ref: /schemas/types.yaml#/definitions/uint32-array
85    minItems: 1
86    maxItems: 8
87
88  snps,block-size:
89    description: |
90      Channel block size specifier associated with the DMA channels.
91    $ref: /schemas/types.yaml#/definitions/uint32-array
92    minItems: 1
93    maxItems: 8
94
95  snps,axi-max-burst-len:
96    description: |
97      Restrict master AXI burst length by value specified in this property.
98      If this property is missing the maximum AXI burst length supported by
99      DMAC is used.
100    $ref: /schemas/types.yaml#/definitions/uint32
101    minimum: 1
102    maximum: 256
103
104required:
105  - compatible
106  - reg
107  - clocks
108  - clock-names
109  - interrupts
110  - '#dma-cells'
111  - dma-channels
112  - snps,dma-masters
113  - snps,data-width
114  - snps,priority
115  - snps,block-size
116
117if:
118  properties:
119    compatible:
120      contains:
121        enum:
122          - starfive,jh7110-axi-dma
123then:
124  properties:
125    resets:
126      minItems: 2
127      items:
128        - description: AXI reset line
129        - description: AHB reset line
130        - description: module reset
131else:
132  properties:
133    resets:
134      maxItems: 1
135
136additionalProperties: false
137
138examples:
139  - |
140    #include <dt-bindings/interrupt-controller/arm-gic.h>
141    #include <dt-bindings/interrupt-controller/irq.h>
142    /* example with snps,dw-axi-dmac */
143    dma-controller@80000 {
144        compatible = "snps,axi-dma-1.01a";
145        reg = <0x80000 0x400>;
146        clocks = <&core_clk>, <&cfgr_clk>;
147        clock-names = "core-clk", "cfgr-clk";
148        interrupt-parent = <&intc>;
149        interrupts = <27>;
150        #dma-cells = <1>;
151        dma-channels = <4>;
152        snps,dma-masters = <2>;
153        snps,data-width = <3>;
154        snps,block-size = <4096 4096 4096 4096>;
155        snps,priority = <0 1 2 3>;
156        snps,axi-max-burst-len = <16>;
157    };
158