1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4 5$id: http://devicetree.org/schemas/display/msm/hdmi.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: Qualcomm Adreno/Snapdragon HDMI output 9 10maintainers: 11 - Rob Clark <robdclark@gmail.com> 12 13properties: 14 compatible: 15 enum: 16 - qcom,hdmi-tx-8084 17 - qcom,hdmi-tx-8660 18 - qcom,hdmi-tx-8960 19 - qcom,hdmi-tx-8974 20 - qcom,hdmi-tx-8994 21 - qcom,hdmi-tx-8996 22 - qcom,hdmi-tx-8998 23 24 clocks: 25 minItems: 1 26 maxItems: 8 27 28 clock-names: 29 minItems: 1 30 maxItems: 8 31 32 reg: 33 minItems: 1 34 maxItems: 3 35 36 reg-names: 37 minItems: 1 38 items: 39 - const: core_physical 40 - const: qfprom_physical 41 - const: hdcp_physical 42 43 interrupts: 44 maxItems: 1 45 46 phys: 47 maxItems: 1 48 49 phy-names: 50 enum: 51 - hdmi_phy 52 - hdmi-phy 53 deprecated: true 54 55 core-vdda-supply: 56 description: phandle to VDDA supply regulator 57 58 hdmi-mux-supply: 59 description: phandle to mux regulator 60 deprecated: true 61 62 core-vcc-supply: 63 description: phandle to VCC supply regulator 64 65 hpd-gpios: 66 maxItems: 1 67 description: hpd pin 68 69 '#sound-dai-cells': 70 const: 1 71 72 ports: 73 type: object 74 $ref: /schemas/graph.yaml#/properties/ports 75 properties: 76 port@0: 77 $ref: /schemas/graph.yaml#/properties/port 78 description: | 79 Input endpoints of the controller. 80 81 port@1: 82 $ref: /schemas/graph.yaml#/properties/port 83 description: | 84 Output endpoints of the controller. 85 86 required: 87 - port@0 88 89required: 90 - compatible 91 - clocks 92 - clock-names 93 - reg 94 - reg-names 95 - interrupts 96 - phys 97 98allOf: 99 - if: 100 properties: 101 compatible: 102 contains: 103 enum: 104 - qcom,hdmi-tx-8960 105 - qcom,hdmi-tx-8660 106 then: 107 properties: 108 clocks: 109 minItems: 3 110 maxItems: 3 111 clock-names: 112 items: 113 - const: core 114 - const: master_iface 115 - const: slave_iface 116 core-vcc-supplies: false 117 118 - if: 119 properties: 120 compatible: 121 contains: 122 enum: 123 - qcom,hdmi-tx-8974 124 - qcom,hdmi-tx-8084 125 - qcom,hdmi-tx-8994 126 - qcom,hdmi-tx-8996 127 then: 128 properties: 129 clocks: 130 minItems: 5 131 maxItems: 5 132 clock-names: 133 items: 134 - const: mdp_core 135 - const: iface 136 - const: core 137 - const: alt_iface 138 - const: extp 139 hdmi-mux-supplies: false 140 141 - if: 142 properties: 143 compatible: 144 contains: 145 enum: 146 - qcom,hdmi-tx-8998 147 then: 148 properties: 149 clocks: 150 minItems: 8 151 maxItems: 8 152 clock-names: 153 items: 154 - const: mdp_core 155 - const: iface 156 - const: core 157 - const: alt_iface 158 - const: extp 159 - const: bus 160 - const: mnoc 161 - const: iface_mmss 162 163additionalProperties: false 164 165examples: 166 - | 167 #include <dt-bindings/gpio/gpio.h> 168 #include <dt-bindings/interrupt-controller/irq.h> 169 #include <dt-bindings/interrupt-controller/arm-gic.h> 170 hdmi: hdmi@4a00000 { 171 compatible = "qcom,hdmi-tx-8960"; 172 reg-names = "core_physical"; 173 reg = <0x04a00000 0x2f0>; 174 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; 175 clock-names = "core", 176 "master_iface", 177 "slave_iface"; 178 clocks = <&clk 61>, 179 <&clk 72>, 180 <&clk 98>; 181 hpd-gpios = <&msmgpio 72 GPIO_ACTIVE_HIGH>; 182 core-vdda-supply = <&pm8921_hdmi_mvs>; 183 hdmi-mux-supply = <&ext_3p3v>; 184 pinctrl-names = "default", "sleep"; 185 pinctrl-0 = <&hpd_active &ddc_active &cec_active>; 186 pinctrl-1 = <&hpd_suspend &ddc_suspend &cec_suspend>; 187 188 phys = <&hdmi_phy>; 189 }; 190 - | 191 #include <dt-bindings/clock/qcom,gcc-msm8996.h> 192 #include <dt-bindings/clock/qcom,mmcc-msm8996.h> 193 #include <dt-bindings/gpio/gpio.h> 194 #include <dt-bindings/interrupt-controller/irq.h> 195 #include <dt-bindings/interrupt-controller/arm-gic.h> 196 hdmi@9a0000 { 197 compatible = "qcom,hdmi-tx-8996"; 198 reg = <0x009a0000 0x50c>, 199 <0x00070000 0x6158>, 200 <0x009e0000 0xfff>; 201 reg-names = "core_physical", 202 "qfprom_physical", 203 "hdcp_physical"; 204 205 interrupt-parent = <&mdss>; 206 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; 207 208 clocks = <&mmcc MDSS_MDP_CLK>, 209 <&mmcc MDSS_AHB_CLK>, 210 <&mmcc MDSS_HDMI_CLK>, 211 <&mmcc MDSS_HDMI_AHB_CLK>, 212 <&mmcc MDSS_EXTPCLK_CLK>; 213 clock-names = "mdp_core", 214 "iface", 215 "core", 216 "alt_iface", 217 "extp"; 218 219 phys = <&hdmi_phy>; 220 #sound-dai-cells = <1>; 221 222 pinctrl-names = "default", "sleep"; 223 pinctrl-0 = <&hdmi_hpd_active &hdmi_ddc_active>; 224 pinctrl-1 = <&hdmi_hpd_suspend &hdmi_ddc_suspend>; 225 226 core-vdda-supply = <&vreg_l12a_1p8>; 227 core-vcc-supply = <&vreg_s4a_1p8>; 228 229 ports { 230 #address-cells = <1>; 231 #size-cells = <0>; 232 233 port@0 { 234 reg = <0>; 235 endpoint { 236 remote-endpoint = <&mdp5_intf3_out>; 237 }; 238 }; 239 }; 240 }; 241... 242