1*1c0ff333SLiu Ying# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*1c0ff333SLiu Ying%YAML 1.2 3*1c0ff333SLiu Ying--- 4*1c0ff333SLiu Ying$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-scaling-engine.yaml# 5*1c0ff333SLiu Ying$schema: http://devicetree.org/meta-schemas/core.yaml# 6*1c0ff333SLiu Ying 7*1c0ff333SLiu Yingtitle: Freescale i.MX8qxp Display Controller Scaling Engine 8*1c0ff333SLiu Ying 9*1c0ff333SLiu Yingdescription: | 10*1c0ff333SLiu Ying The unit can change the dimension of the input frame by nearest or linear 11*1c0ff333SLiu Ying re-sampling with 1/32 sub pixel precision. 12*1c0ff333SLiu Ying 13*1c0ff333SLiu Ying Internally it consist of two independent blocks for horizontal and vertical 14*1c0ff333SLiu Ying scaling. The sequence of both operations is arbitrary. 15*1c0ff333SLiu Ying 16*1c0ff333SLiu Ying Any frame dimensions between 1 and 16384 pixels in width and height are 17*1c0ff333SLiu Ying supported, except that the vertical scaler has a frame width maximum 18*1c0ff333SLiu Ying depending of the system's functional limitations. 19*1c0ff333SLiu Ying 20*1c0ff333SLiu Ying In general all scale factors are supported inside the supported frame 21*1c0ff333SLiu Ying dimensions. In range of scale factors 1/16..16 the filtered output colors 22*1c0ff333SLiu Ying are LSBit precise (e.g. DC ripple free). 23*1c0ff333SLiu Ying 24*1c0ff333SLiu Ying +-----------+ 25*1c0ff333SLiu Ying | Line | 26*1c0ff333SLiu Ying | Buffer | 27*1c0ff333SLiu Ying +-----------+ 28*1c0ff333SLiu Ying ^ 29*1c0ff333SLiu Ying | 30*1c0ff333SLiu Ying V 31*1c0ff333SLiu Ying |\ +-----------+ 32*1c0ff333SLiu Ying ------+ | | | 33*1c0ff333SLiu Ying | | +-->| Vertical |---- 34*1c0ff333SLiu Ying | ----+ | | Scaler | | 35*1c0ff333SLiu Ying | | |/ +-----------+ | 36*1c0ff333SLiu Ying | | | 37*1c0ff333SLiu Ying | | | 38*1c0ff333SLiu Ying | | | |\ 39*1c0ff333SLiu Ying | ------------- -------------+-----+ | 40*1c0ff333SLiu Ying Input --+ X | +--> Output 41*1c0ff333SLiu Ying | ------------- -------------+-----+ | 42*1c0ff333SLiu Ying | | | |/ 43*1c0ff333SLiu Ying | | | 44*1c0ff333SLiu Ying | | |\ +-----------+ | 45*1c0ff333SLiu Ying | ----+ | | | | 46*1c0ff333SLiu Ying | | +-->| Horizontal|---- 47*1c0ff333SLiu Ying ------+ | | Scaler | 48*1c0ff333SLiu Ying |/ +-----------+ 49*1c0ff333SLiu Ying 50*1c0ff333SLiu Ying The unit supports downscaling, upscaling, sub pixel translation and bob 51*1c0ff333SLiu Ying de-interlacing. 52*1c0ff333SLiu Ying 53*1c0ff333SLiu Yingmaintainers: 54*1c0ff333SLiu Ying - Liu Ying <victor.liu@nxp.com> 55*1c0ff333SLiu Ying 56*1c0ff333SLiu Yingproperties: 57*1c0ff333SLiu Ying compatible: 58*1c0ff333SLiu Ying enum: 59*1c0ff333SLiu Ying - fsl,imx8qxp-dc-hscaler 60*1c0ff333SLiu Ying - fsl,imx8qxp-dc-vscaler 61*1c0ff333SLiu Ying 62*1c0ff333SLiu Ying reg: 63*1c0ff333SLiu Ying maxItems: 2 64*1c0ff333SLiu Ying 65*1c0ff333SLiu Ying reg-names: 66*1c0ff333SLiu Ying items: 67*1c0ff333SLiu Ying - const: pec 68*1c0ff333SLiu Ying - const: cfg 69*1c0ff333SLiu Ying 70*1c0ff333SLiu Yingrequired: 71*1c0ff333SLiu Ying - compatible 72*1c0ff333SLiu Ying - reg 73*1c0ff333SLiu Ying - reg-names 74*1c0ff333SLiu Ying 75*1c0ff333SLiu YingadditionalProperties: false 76*1c0ff333SLiu Ying 77*1c0ff333SLiu Yingexamples: 78*1c0ff333SLiu Ying - | 79*1c0ff333SLiu Ying hscaler@561808c0 { 80*1c0ff333SLiu Ying compatible = "fsl,imx8qxp-dc-hscaler"; 81*1c0ff333SLiu Ying reg = <0x561808c0 0x10>, <0x56183000 0x18>; 82*1c0ff333SLiu Ying reg-names = "pec", "cfg"; 83*1c0ff333SLiu Ying }; 84