xref: /linux/Documentation/devicetree/bindings/clock/ti/ti,composite-clock.yaml (revision f7f0adfe64de08803990dc4cbecd2849c04e314a) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/ti/ti,composite-clock.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Texas Instruments composite clock
8
9maintainers:
10  - Tero Kristo <kristo@kernel.org>
11
12description: |
13  *Deprecated design pattern: one node per clock*
14
15  This binding assumes a register-mapped composite clock with multiple
16  different sub-types:
17
18    a multiplexer clock with multiple input clock signals or parents, one
19    of which can be selected as output, this behaves exactly as [1].
20
21    an adjustable clock rate divider, this behaves exactly as [2].
22
23    a gating function which can be used to enable and disable the output
24    clock, this behaves exactly as [3].
25
26  The binding must provide a list of the component clocks that shall be
27  merged to this clock. The component clocks shall be of one of the
28  "ti,*composite*-clock" types.
29
30  [1] Documentation/devicetree/bindings/clock/ti/ti,mux-clock.yaml
31  [2] Documentation/devicetree/bindings/clock/ti/ti,divider-clock.yaml
32  [3] Documentation/devicetree/bindings/clock/ti/ti,gate-clock.yaml
33
34properties:
35  compatible:
36    const: ti,composite-clock
37
38  "#clock-cells":
39    const: 0
40
41  clocks: true
42
43  clock-output-names:
44    maxItems: 1
45
46required:
47  - compatible
48  - "#clock-cells"
49  - clocks
50
51additionalProperties: false
52
53examples:
54  - |
55    bus {
56      #address-cells = <1>;
57      #size-cells = <0>;
58
59      usb_l4_gate_ick: clock-controller@a10 {
60        #clock-cells = <0>;
61        compatible = "ti,composite-gate-clock";
62        clocks = <&l4_ick>;
63        ti,bit-shift = <5>;
64        reg = <0x0a10>;
65      };
66
67      usb_l4_div_ick: clock-controller@a40 {
68        #clock-cells = <0>;
69        compatible = "ti,composite-divider-clock";
70        clocks = <&l4_ick>;
71        ti,bit-shift = <4>;
72        ti,max-div = <1>;
73        reg = <0x0a40>;
74        ti,index-starts-at-one;
75      };
76    };
77
78    clock-controller {
79      #clock-cells = <0>;
80      compatible = "ti,composite-clock";
81      clocks = <&usb_l4_gate_ick>, <&usb_l4_div_ick>;
82    };
83