xref: /linux/Documentation/devicetree/bindings/clock/samsung,exynos990-clock.yaml (revision f7f0adfe64de08803990dc4cbecd2849c04e314a) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/samsung,exynos990-clock.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung Exynos990 SoC clock controller
8
9maintainers:
10  - Igor Belwon <igor.belwon@mentallysanemainliners.org>
11  - Chanwoo Choi <cw00.choi@samsung.com>
12  - Krzysztof Kozlowski <krzk@kernel.org>
13
14description: |
15  Exynos990 clock controller is comprised of several CMU units, generating
16  clocks for different domains. Those CMU units are modeled as separate device
17  tree nodes, and might depend on each other. The root clock in that root tree
18  is an external clock: OSCCLK (26 MHz). This external clock must be defined
19  as a fixed-rate clock in dts.
20
21  CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
22  dividers; all other clocks of function blocks (other CMUs) are usually
23  derived from CMU_TOP.
24
25  Each clock is assigned an identifier and client nodes can use this identifier
26  to specify the clock which they consume. All clocks available for usage
27  in clock consumer nodes are defined as preprocessor macros in
28  'include/dt-bindings/clock/samsung,exynos990.h' header.
29
30properties:
31  compatible:
32    enum:
33      - samsung,exynos990-cmu-hsi0
34      - samsung,exynos990-cmu-top
35
36  clocks:
37    minItems: 1
38    maxItems: 5
39
40  clock-names:
41    minItems: 1
42    maxItems: 5
43
44  "#clock-cells":
45    const: 1
46
47  reg:
48    maxItems: 1
49
50required:
51  - compatible
52  - clocks
53  - clock-names
54  - "#clock-cells"
55  - reg
56
57allOf:
58  - if:
59      properties:
60        compatible:
61          contains:
62            const: samsung,exynos990-cmu-hsi0
63
64    then:
65      properties:
66        clocks:
67          items:
68            - description: External reference clock (26 MHz)
69            - description: CMU_HSI0 BUS clock (from CMU_TOP)
70            - description: CMU_HSI0 USB31DRD clock (from CMU_TOP)
71            - description: CMU_HSI0 USBDP_DEBUG clock (from CMU_TOP)
72            - description: CMU_HSI0 DPGTC clock (from CMU_TOP)
73
74        clock-names:
75          items:
76            - const: oscclk
77            - const: bus
78            - const: usb31drd
79            - const: usbdp_debug
80            - const: dpgtc
81
82  - if:
83      properties:
84        compatible:
85          contains:
86            const: samsung,exynos990-cmu-top
87
88    then:
89      properties:
90        clocks:
91          items:
92            - description: External reference clock (26 MHz)
93
94        clock-names:
95          items:
96            - const: oscclk
97
98additionalProperties: false
99
100examples:
101  - |
102    #include <dt-bindings/clock/samsung,exynos990.h>
103
104    cmu_hsi0: clock-controller@10a00000 {
105        compatible = "samsung,exynos990-cmu-hsi0";
106        reg = <0x10a00000 0x8000>;
107        #clock-cells = <1>;
108
109        clocks = <&oscclk>,
110                 <&cmu_top CLK_DOUT_CMU_HSI0_BUS>,
111                 <&cmu_top CLK_DOUT_CMU_HSI0_USB31DRD>,
112                 <&cmu_top CLK_DOUT_CMU_HSI0_USBDP_DEBUG>,
113                 <&cmu_top CLK_DOUT_CMU_HSI0_DPGTC>;
114        clock-names = "oscclk",
115                      "bus",
116                      "usb31drd",
117                      "usbdp_debug",
118                      "dpgtc";
119    };
120
121...
122