1*5b7c92e3SAnson Huang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*5b7c92e3SAnson Huang%YAML 1.2 3*5b7c92e3SAnson Huang--- 4*5b7c92e3SAnson Huang$id: http://devicetree.org/schemas/clock/imx7d-clock.yaml# 5*5b7c92e3SAnson Huang$schema: http://devicetree.org/meta-schemas/core.yaml# 6*5b7c92e3SAnson Huang 7*5b7c92e3SAnson Huangtitle: Clock bindings for Freescale i.MX7 Dual 8*5b7c92e3SAnson Huang 9*5b7c92e3SAnson Huangmaintainers: 10*5b7c92e3SAnson Huang - Frank Li <Frank.Li@nxp.com> 11*5b7c92e3SAnson Huang - Anson Huang <Anson.Huang@nxp.com> 12*5b7c92e3SAnson Huang 13*5b7c92e3SAnson Huangdescription: | 14*5b7c92e3SAnson Huang The clock consumer should specify the desired clock by having the clock 15*5b7c92e3SAnson Huang ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx7d-clock.h 16*5b7c92e3SAnson Huang for the full list of i.MX7 Dual clock IDs. 17*5b7c92e3SAnson Huang 18*5b7c92e3SAnson Huangproperties: 19*5b7c92e3SAnson Huang compatible: 20*5b7c92e3SAnson Huang const: fsl,imx7d-ccm 21*5b7c92e3SAnson Huang 22*5b7c92e3SAnson Huang reg: 23*5b7c92e3SAnson Huang maxItems: 1 24*5b7c92e3SAnson Huang 25*5b7c92e3SAnson Huang interrupts: 26*5b7c92e3SAnson Huang items: 27*5b7c92e3SAnson Huang - description: CCM interrupt request 1 28*5b7c92e3SAnson Huang - description: CCM interrupt request 2 29*5b7c92e3SAnson Huang 30*5b7c92e3SAnson Huang '#clock-cells': 31*5b7c92e3SAnson Huang const: 1 32*5b7c92e3SAnson Huang 33*5b7c92e3SAnson Huang clocks: 34*5b7c92e3SAnson Huang items: 35*5b7c92e3SAnson Huang - description: 32k osc 36*5b7c92e3SAnson Huang - description: 24m osc 37*5b7c92e3SAnson Huang 38*5b7c92e3SAnson Huang clock-names: 39*5b7c92e3SAnson Huang items: 40*5b7c92e3SAnson Huang - const: ckil 41*5b7c92e3SAnson Huang - const: osc 42*5b7c92e3SAnson Huang 43*5b7c92e3SAnson Huangrequired: 44*5b7c92e3SAnson Huang - compatible 45*5b7c92e3SAnson Huang - reg 46*5b7c92e3SAnson Huang - interrupts 47*5b7c92e3SAnson Huang - clocks 48*5b7c92e3SAnson Huang - clock-names 49*5b7c92e3SAnson Huang - '#clock-cells' 50*5b7c92e3SAnson Huang 51*5b7c92e3SAnson HuangadditionalProperties: false 52*5b7c92e3SAnson Huang 53*5b7c92e3SAnson Huangexamples: 54*5b7c92e3SAnson Huang - | 55*5b7c92e3SAnson Huang #include <dt-bindings/interrupt-controller/arm-gic.h> 56*5b7c92e3SAnson Huang 57*5b7c92e3SAnson Huang clock-controller@30380000 { 58*5b7c92e3SAnson Huang compatible = "fsl,imx7d-ccm"; 59*5b7c92e3SAnson Huang reg = <0x30380000 0x10000>; 60*5b7c92e3SAnson Huang interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 61*5b7c92e3SAnson Huang <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 62*5b7c92e3SAnson Huang #clock-cells = <1>; 63*5b7c92e3SAnson Huang clocks = <&ckil>, <&osc>; 64*5b7c92e3SAnson Huang clock-names = "ckil", "osc"; 65*5b7c92e3SAnson Huang }; 66