1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2022 Advanced Micro Devices, Inc. 4 * 5 * Author: Meng Li <li.meng@amd.com> 6 */ 7 8 #ifndef _LINUX_AMD_PSTATE_H 9 #define _LINUX_AMD_PSTATE_H 10 11 #include <linux/pm_qos.h> 12 13 /********************************************************************* 14 * AMD P-state INTERFACE * 15 *********************************************************************/ 16 17 /** 18 * union perf_cached - A union to cache performance-related data. 19 * @highest_perf: the maximum performance an individual processor may reach, 20 * assuming ideal conditions 21 * For platforms that support the preferred core feature, the highest_perf value maybe 22 * configured to any value in the range 166-255 by the firmware (because the preferred 23 * core ranking is encoded in the highest_perf value). To maintain consistency across 24 * all platforms, we split the highest_perf and preferred core ranking values into 25 * cpudata->perf.highest_perf and cpudata->prefcore_ranking. 26 * @nominal_perf: the maximum sustained performance level of the processor, 27 * assuming ideal operating conditions 28 * @lowest_nonlinear_perf: the lowest performance level at which nonlinear power 29 * savings are achieved 30 * @lowest_perf: the absolute lowest performance level of the processor 31 * @min_limit_perf: Cached value of the performance corresponding to policy->min 32 * @max_limit_perf: Cached value of the performance corresponding to policy->max 33 */ 34 union perf_cached { 35 struct { 36 u8 highest_perf; 37 u8 nominal_perf; 38 u8 lowest_nonlinear_perf; 39 u8 lowest_perf; 40 u8 min_limit_perf; 41 u8 max_limit_perf; 42 }; 43 u64 val; 44 }; 45 46 /** 47 * struct amd_aperf_mperf 48 * @aperf: actual performance frequency clock count 49 * @mperf: maximum performance frequency clock count 50 * @tsc: time stamp counter 51 */ 52 struct amd_aperf_mperf { 53 u64 aperf; 54 u64 mperf; 55 u64 tsc; 56 }; 57 58 /** 59 * struct amd_cpudata - private CPU data for AMD P-State 60 * @cpu: CPU number 61 * @req: constraint request to apply 62 * @cppc_req_cached: cached performance request hints 63 * @perf: cached performance-related data 64 * @prefcore_ranking: the preferred core ranking, the higher value indicates a higher 65 * priority. 66 * @min_limit_freq: Cached value of policy->min (in khz) 67 * @max_limit_freq: Cached value of policy->max (in khz) 68 * @nominal_freq: the frequency (in khz) that mapped to nominal_perf 69 * @lowest_nonlinear_freq: the frequency (in khz) that mapped to lowest_nonlinear_perf 70 * @cur: Difference of Aperf/Mperf/tsc count between last and current sample 71 * @prev: Last Aperf/Mperf/tsc count value read from register 72 * @freq: current cpu frequency value (in khz) 73 * @boost_supported: check whether the Processor or SBIOS supports boost mode 74 * @hw_prefcore: check whether HW supports preferred core featue. 75 * Only when hw_prefcore and early prefcore param are true, 76 * AMD P-State driver supports preferred core featue. 77 * @epp_cached: Cached CPPC energy-performance preference value 78 * @policy: Cpufreq policy value 79 * 80 * The amd_cpudata is key private data for each CPU thread in AMD P-State, and 81 * represents all the attributes and goals that AMD P-State requests at runtime. 82 */ 83 struct amd_cpudata { 84 int cpu; 85 86 struct freq_qos_request req[2]; 87 u64 cppc_req_cached; 88 89 union perf_cached perf; 90 91 u8 prefcore_ranking; 92 u32 min_limit_freq; 93 u32 max_limit_freq; 94 u32 nominal_freq; 95 u32 lowest_nonlinear_freq; 96 97 struct amd_aperf_mperf cur; 98 struct amd_aperf_mperf prev; 99 100 u64 freq; 101 bool boost_supported; 102 bool hw_prefcore; 103 104 /* EPP feature related attributes*/ 105 u32 policy; 106 bool suspended; 107 u8 epp_default; 108 }; 109 110 /* 111 * enum amd_pstate_mode - driver working mode of amd pstate 112 */ 113 enum amd_pstate_mode { 114 AMD_PSTATE_UNDEFINED = 0, 115 AMD_PSTATE_DISABLE, 116 AMD_PSTATE_PASSIVE, 117 AMD_PSTATE_ACTIVE, 118 AMD_PSTATE_GUIDED, 119 AMD_PSTATE_MAX, 120 }; 121 const char *amd_pstate_get_mode_string(enum amd_pstate_mode mode); 122 int amd_pstate_update_status(const char *buf, size_t size); 123 124 #endif /* _LINUX_AMD_PSTATE_H */ 125