1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
4 * All rights reserved. www.lanmedia.com
5 * Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl>
6 *
7 * This code is written by:
8 * Andrew Stanley-Jones (asj@cban.com)
9 * Rob Braun (bbraun@vix.com),
10 * Michael Graff (explorer@vix.com) and
11 * Matt Thomas (matt@3am-software.com).
12 *
13 * With Help By:
14 * David Boggs
15 * Ron Crane
16 * Alan Cox
17 *
18 * Driver for the LanMedia LMC5200, LMC5245, LMC1000, LMC1200 cards.
19 *
20 * To control link specific options lmcctl is required.
21 * It can be obtained from ftp.lanmedia.com.
22 *
23 * Linux driver notes:
24 * Linux uses the device struct lmc_private to pass private information
25 * around.
26 *
27 * The initialization portion of this driver (the lmc_reset() and the
28 * lmc_dec_reset() functions, as well as the led controls and the
29 * lmc_initcsrs() functions.
30 *
31 * The watchdog function runs every second and checks to see if
32 * we still have link, and that the timing source is what we expected
33 * it to be. If link is lost, the interface is marked down, and
34 * we no longer can transmit.
35 */
36
37 #include <linux/kernel.h>
38 #include <linux/module.h>
39 #include <linux/string.h>
40 #include <linux/timer.h>
41 #include <linux/ptrace.h>
42 #include <linux/errno.h>
43 #include <linux/ioport.h>
44 #include <linux/slab.h>
45 #include <linux/interrupt.h>
46 #include <linux/pci.h>
47 #include <linux/delay.h>
48 #include <linux/hdlc.h>
49 #include <linux/in.h>
50 #include <linux/if_arp.h>
51 #include <linux/netdevice.h>
52 #include <linux/etherdevice.h>
53 #include <linux/skbuff.h>
54 #include <linux/inet.h>
55 #include <linux/bitops.h>
56 #include <asm/processor.h> /* Processor type for cache alignment. */
57 #include <asm/io.h>
58 #include <asm/dma.h>
59 #include <linux/uaccess.h>
60 //#include <asm/spinlock.h>
61
62 #define DRIVER_MAJOR_VERSION 1
63 #define DRIVER_MINOR_VERSION 34
64 #define DRIVER_SUB_VERSION 0
65
66 #define DRIVER_VERSION ((DRIVER_MAJOR_VERSION << 8) + DRIVER_MINOR_VERSION)
67
68 #include "lmc.h"
69 #include "lmc_var.h"
70 #include "lmc_ioctl.h"
71 #include "lmc_debug.h"
72 #include "lmc_proto.h"
73
74 static int LMC_PKT_BUF_SZ = 1542;
75
76 static const struct pci_device_id lmc_pci_tbl[] = {
77 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
78 PCI_VENDOR_ID_LMC, PCI_ANY_ID },
79 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
80 PCI_ANY_ID, PCI_VENDOR_ID_LMC },
81 { 0 }
82 };
83
84 MODULE_DEVICE_TABLE(pci, lmc_pci_tbl);
85 MODULE_LICENSE("GPL v2");
86
87
88 static netdev_tx_t lmc_start_xmit(struct sk_buff *skb,
89 struct net_device *dev);
90 static int lmc_rx (struct net_device *dev);
91 static int lmc_open(struct net_device *dev);
92 static int lmc_close(struct net_device *dev);
93 static struct net_device_stats *lmc_get_stats(struct net_device *dev);
94 static irqreturn_t lmc_interrupt(int irq, void *dev_instance);
95 static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, size_t csr_size);
96 static void lmc_softreset(lmc_softc_t * const);
97 static void lmc_running_reset(struct net_device *dev);
98 static int lmc_ifdown(struct net_device * const);
99 static void lmc_watchdog(struct timer_list *t);
100 static void lmc_reset(lmc_softc_t * const sc);
101 static void lmc_dec_reset(lmc_softc_t * const sc);
102 static void lmc_driver_timeout(struct net_device *dev, unsigned int txqueue);
103
104 /*
105 * linux reserves 16 device specific IOCTLs. We call them
106 * LMCIOC* to control various bits of our world.
107 */
lmc_ioctl(struct net_device * dev,struct ifreq * ifr,int cmd)108 int lmc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
109 {
110 lmc_softc_t *sc = dev_to_sc(dev);
111 lmc_ctl_t ctl;
112 int ret = -EOPNOTSUPP;
113 u16 regVal;
114 unsigned long flags;
115
116 /*
117 * Most functions mess with the structure
118 * Disable interrupts while we do the polling
119 */
120
121 switch (cmd) {
122 /*
123 * Return current driver state. Since we keep this up
124 * To date internally, just copy this out to the user.
125 */
126 case LMCIOCGINFO: /*fold01*/
127 if (copy_to_user(ifr->ifr_data, &sc->ictl, sizeof(lmc_ctl_t)))
128 ret = -EFAULT;
129 else
130 ret = 0;
131 break;
132
133 case LMCIOCSINFO: /*fold01*/
134 if (!capable(CAP_NET_ADMIN)) {
135 ret = -EPERM;
136 break;
137 }
138
139 if(dev->flags & IFF_UP){
140 ret = -EBUSY;
141 break;
142 }
143
144 if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) {
145 ret = -EFAULT;
146 break;
147 }
148
149 spin_lock_irqsave(&sc->lmc_lock, flags);
150 sc->lmc_media->set_status (sc, &ctl);
151
152 if(ctl.crc_length != sc->ictl.crc_length) {
153 sc->lmc_media->set_crc_length(sc, ctl.crc_length);
154 if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16)
155 sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
156 else
157 sc->TxDescriptControlInit &= ~LMC_TDES_ADD_CRC_DISABLE;
158 }
159 spin_unlock_irqrestore(&sc->lmc_lock, flags);
160
161 ret = 0;
162 break;
163
164 case LMCIOCIFTYPE: /*fold01*/
165 {
166 u16 old_type = sc->if_type;
167 u16 new_type;
168
169 if (!capable(CAP_NET_ADMIN)) {
170 ret = -EPERM;
171 break;
172 }
173
174 if (copy_from_user(&new_type, ifr->ifr_data, sizeof(u16))) {
175 ret = -EFAULT;
176 break;
177 }
178
179
180 if (new_type == old_type)
181 {
182 ret = 0 ;
183 break; /* no change */
184 }
185
186 spin_lock_irqsave(&sc->lmc_lock, flags);
187 lmc_proto_close(sc);
188
189 sc->if_type = new_type;
190 lmc_proto_attach(sc);
191 ret = lmc_proto_open(sc);
192 spin_unlock_irqrestore(&sc->lmc_lock, flags);
193 break;
194 }
195
196 case LMCIOCGETXINFO: /*fold01*/
197 spin_lock_irqsave(&sc->lmc_lock, flags);
198 sc->lmc_xinfo.Magic0 = 0xBEEFCAFE;
199
200 sc->lmc_xinfo.PciCardType = sc->lmc_cardtype;
201 sc->lmc_xinfo.PciSlotNumber = 0;
202 sc->lmc_xinfo.DriverMajorVersion = DRIVER_MAJOR_VERSION;
203 sc->lmc_xinfo.DriverMinorVersion = DRIVER_MINOR_VERSION;
204 sc->lmc_xinfo.DriverSubVersion = DRIVER_SUB_VERSION;
205 sc->lmc_xinfo.XilinxRevisionNumber =
206 lmc_mii_readreg (sc, 0, 3) & 0xf;
207 sc->lmc_xinfo.MaxFrameSize = LMC_PKT_BUF_SZ;
208 sc->lmc_xinfo.link_status = sc->lmc_media->get_link_status (sc);
209 sc->lmc_xinfo.mii_reg16 = lmc_mii_readreg (sc, 0, 16);
210 spin_unlock_irqrestore(&sc->lmc_lock, flags);
211
212 sc->lmc_xinfo.Magic1 = 0xDEADBEEF;
213
214 if (copy_to_user(ifr->ifr_data, &sc->lmc_xinfo,
215 sizeof(struct lmc_xinfo)))
216 ret = -EFAULT;
217 else
218 ret = 0;
219
220 break;
221
222 case LMCIOCGETLMCSTATS:
223 spin_lock_irqsave(&sc->lmc_lock, flags);
224 if (sc->lmc_cardtype == LMC_CARDTYPE_T1) {
225 lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_LSB);
226 sc->extra_stats.framingBitErrorCount +=
227 lmc_mii_readreg(sc, 0, 18) & 0xff;
228 lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_MSB);
229 sc->extra_stats.framingBitErrorCount +=
230 (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
231 lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_LSB);
232 sc->extra_stats.lineCodeViolationCount +=
233 lmc_mii_readreg(sc, 0, 18) & 0xff;
234 lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_MSB);
235 sc->extra_stats.lineCodeViolationCount +=
236 (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
237 lmc_mii_writereg(sc, 0, 17, T1FRAMER_AERR);
238 regVal = lmc_mii_readreg(sc, 0, 18) & 0xff;
239
240 sc->extra_stats.lossOfFrameCount +=
241 (regVal & T1FRAMER_LOF_MASK) >> 4;
242 sc->extra_stats.changeOfFrameAlignmentCount +=
243 (regVal & T1FRAMER_COFA_MASK) >> 2;
244 sc->extra_stats.severelyErroredFrameCount +=
245 regVal & T1FRAMER_SEF_MASK;
246 }
247 spin_unlock_irqrestore(&sc->lmc_lock, flags);
248 if (copy_to_user(ifr->ifr_data, &sc->lmc_device->stats,
249 sizeof(sc->lmc_device->stats)) ||
250 copy_to_user(ifr->ifr_data + sizeof(sc->lmc_device->stats),
251 &sc->extra_stats, sizeof(sc->extra_stats)))
252 ret = -EFAULT;
253 else
254 ret = 0;
255 break;
256
257 case LMCIOCCLEARLMCSTATS:
258 if (!capable(CAP_NET_ADMIN)) {
259 ret = -EPERM;
260 break;
261 }
262
263 spin_lock_irqsave(&sc->lmc_lock, flags);
264 memset(&sc->lmc_device->stats, 0, sizeof(sc->lmc_device->stats));
265 memset(&sc->extra_stats, 0, sizeof(sc->extra_stats));
266 sc->extra_stats.check = STATCHECK;
267 sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
268 sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
269 sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
270 spin_unlock_irqrestore(&sc->lmc_lock, flags);
271 ret = 0;
272 break;
273
274 case LMCIOCSETCIRCUIT: /*fold01*/
275 if (!capable(CAP_NET_ADMIN)){
276 ret = -EPERM;
277 break;
278 }
279
280 if(dev->flags & IFF_UP){
281 ret = -EBUSY;
282 break;
283 }
284
285 if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) {
286 ret = -EFAULT;
287 break;
288 }
289 spin_lock_irqsave(&sc->lmc_lock, flags);
290 sc->lmc_media->set_circuit_type(sc, ctl.circuit_type);
291 sc->ictl.circuit_type = ctl.circuit_type;
292 spin_unlock_irqrestore(&sc->lmc_lock, flags);
293 ret = 0;
294
295 break;
296
297 case LMCIOCRESET: /*fold01*/
298 if (!capable(CAP_NET_ADMIN)){
299 ret = -EPERM;
300 break;
301 }
302
303 spin_lock_irqsave(&sc->lmc_lock, flags);
304 /* Reset driver and bring back to current state */
305 printk (" REG16 before reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
306 lmc_running_reset (dev);
307 printk (" REG16 after reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
308
309 LMC_EVENT_LOG(LMC_EVENT_FORCEDRESET, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
310 spin_unlock_irqrestore(&sc->lmc_lock, flags);
311
312 ret = 0;
313 break;
314
315 #ifdef DEBUG
316 case LMCIOCDUMPEVENTLOG:
317 if (copy_to_user(ifr->ifr_data, &lmcEventLogIndex, sizeof(u32))) {
318 ret = -EFAULT;
319 break;
320 }
321 if (copy_to_user(ifr->ifr_data + sizeof(u32), lmcEventLogBuf,
322 sizeof(lmcEventLogBuf)))
323 ret = -EFAULT;
324 else
325 ret = 0;
326
327 break;
328 #endif /* end ifdef _DBG_EVENTLOG */
329 case LMCIOCT1CONTROL: /*fold01*/
330 if (sc->lmc_cardtype != LMC_CARDTYPE_T1){
331 ret = -EOPNOTSUPP;
332 break;
333 }
334 break;
335 case LMCIOCXILINX: /*fold01*/
336 {
337 struct lmc_xilinx_control xc; /*fold02*/
338
339 if (!capable(CAP_NET_ADMIN)){
340 ret = -EPERM;
341 break;
342 }
343
344 /*
345 * Stop the xwitter whlie we restart the hardware
346 */
347 netif_stop_queue(dev);
348
349 if (copy_from_user(&xc, ifr->ifr_data, sizeof(struct lmc_xilinx_control))) {
350 ret = -EFAULT;
351 break;
352 }
353 switch(xc.command){
354 case lmc_xilinx_reset: /*fold02*/
355 {
356 u16 mii;
357 spin_lock_irqsave(&sc->lmc_lock, flags);
358 mii = lmc_mii_readreg (sc, 0, 16);
359
360 /*
361 * Make all of them 0 and make input
362 */
363 lmc_gpio_mkinput(sc, 0xff);
364
365 /*
366 * make the reset output
367 */
368 lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
369
370 /*
371 * RESET low to force configuration. This also forces
372 * the transmitter clock to be internal, but we expect to reset
373 * that later anyway.
374 */
375
376 sc->lmc_gpio &= ~LMC_GEP_RESET;
377 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
378
379
380 /*
381 * hold for more than 10 microseconds
382 */
383 udelay(50);
384
385 sc->lmc_gpio |= LMC_GEP_RESET;
386 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
387
388
389 /*
390 * stop driving Xilinx-related signals
391 */
392 lmc_gpio_mkinput(sc, 0xff);
393
394 /* Reset the frammer hardware */
395 sc->lmc_media->set_link_status (sc, 1);
396 sc->lmc_media->set_status (sc, NULL);
397 // lmc_softreset(sc);
398
399 {
400 int i;
401 for(i = 0; i < 5; i++){
402 lmc_led_on(sc, LMC_DS3_LED0);
403 mdelay(100);
404 lmc_led_off(sc, LMC_DS3_LED0);
405 lmc_led_on(sc, LMC_DS3_LED1);
406 mdelay(100);
407 lmc_led_off(sc, LMC_DS3_LED1);
408 lmc_led_on(sc, LMC_DS3_LED3);
409 mdelay(100);
410 lmc_led_off(sc, LMC_DS3_LED3);
411 lmc_led_on(sc, LMC_DS3_LED2);
412 mdelay(100);
413 lmc_led_off(sc, LMC_DS3_LED2);
414 }
415 }
416 spin_unlock_irqrestore(&sc->lmc_lock, flags);
417
418
419
420 ret = 0x0;
421
422 }
423
424 break;
425 case lmc_xilinx_load_prom: /*fold02*/
426 {
427 u16 mii;
428 int timeout = 500000;
429 spin_lock_irqsave(&sc->lmc_lock, flags);
430 mii = lmc_mii_readreg (sc, 0, 16);
431
432 /*
433 * Make all of them 0 and make input
434 */
435 lmc_gpio_mkinput(sc, 0xff);
436
437 /*
438 * make the reset output
439 */
440 lmc_gpio_mkoutput(sc, LMC_GEP_DP | LMC_GEP_RESET);
441
442 /*
443 * RESET low to force configuration. This also forces
444 * the transmitter clock to be internal, but we expect to reset
445 * that later anyway.
446 */
447
448 sc->lmc_gpio &= ~(LMC_GEP_RESET | LMC_GEP_DP);
449 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
450
451
452 /*
453 * hold for more than 10 microseconds
454 */
455 udelay(50);
456
457 sc->lmc_gpio |= LMC_GEP_DP | LMC_GEP_RESET;
458 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
459
460 /*
461 * busy wait for the chip to reset
462 */
463 while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
464 (timeout-- > 0))
465 cpu_relax();
466
467
468 /*
469 * stop driving Xilinx-related signals
470 */
471 lmc_gpio_mkinput(sc, 0xff);
472 spin_unlock_irqrestore(&sc->lmc_lock, flags);
473
474 ret = 0x0;
475
476
477 break;
478
479 }
480
481 case lmc_xilinx_load: /*fold02*/
482 {
483 char *data;
484 int pos;
485 int timeout = 500000;
486
487 if (!xc.data) {
488 ret = -EINVAL;
489 break;
490 }
491
492 data = memdup_user(xc.data, xc.len);
493 if (IS_ERR(data)) {
494 ret = PTR_ERR(data);
495 break;
496 }
497
498 printk("%s: Starting load of data Len: %d at 0x%p == 0x%p\n", dev->name, xc.len, xc.data, data);
499
500 spin_lock_irqsave(&sc->lmc_lock, flags);
501 lmc_gpio_mkinput(sc, 0xff);
502
503 /*
504 * Clear the Xilinx and start prgramming from the DEC
505 */
506
507 /*
508 * Set ouput as:
509 * Reset: 0 (active)
510 * DP: 0 (active)
511 * Mode: 1
512 *
513 */
514 sc->lmc_gpio = 0x00;
515 sc->lmc_gpio &= ~LMC_GEP_DP;
516 sc->lmc_gpio &= ~LMC_GEP_RESET;
517 sc->lmc_gpio |= LMC_GEP_MODE;
518 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
519
520 lmc_gpio_mkoutput(sc, LMC_GEP_MODE | LMC_GEP_DP | LMC_GEP_RESET);
521
522 /*
523 * Wait at least 10 us 20 to be safe
524 */
525 udelay(50);
526
527 /*
528 * Clear reset and activate programming lines
529 * Reset: Input
530 * DP: Input
531 * Clock: Output
532 * Data: Output
533 * Mode: Output
534 */
535 lmc_gpio_mkinput(sc, LMC_GEP_DP | LMC_GEP_RESET);
536
537 /*
538 * Set LOAD, DATA, Clock to 1
539 */
540 sc->lmc_gpio = 0x00;
541 sc->lmc_gpio |= LMC_GEP_MODE;
542 sc->lmc_gpio |= LMC_GEP_DATA;
543 sc->lmc_gpio |= LMC_GEP_CLK;
544 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
545
546 lmc_gpio_mkoutput(sc, LMC_GEP_DATA | LMC_GEP_CLK | LMC_GEP_MODE );
547
548 /*
549 * busy wait for the chip to reset
550 */
551 while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
552 (timeout-- > 0))
553 cpu_relax();
554
555 printk(KERN_DEBUG "%s: Waited %d for the Xilinx to clear it's memory\n", dev->name, 500000-timeout);
556
557 for(pos = 0; pos < xc.len; pos++){
558 switch(data[pos]){
559 case 0:
560 sc->lmc_gpio &= ~LMC_GEP_DATA; /* Data is 0 */
561 break;
562 case 1:
563 sc->lmc_gpio |= LMC_GEP_DATA; /* Data is 1 */
564 break;
565 default:
566 printk(KERN_WARNING "%s Bad data in xilinx programming data at %d, got %d wanted 0 or 1\n", dev->name, pos, data[pos]);
567 sc->lmc_gpio |= LMC_GEP_DATA; /* Assume it's 1 */
568 }
569 sc->lmc_gpio &= ~LMC_GEP_CLK; /* Clock to zero */
570 sc->lmc_gpio |= LMC_GEP_MODE;
571 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
572 udelay(1);
573
574 sc->lmc_gpio |= LMC_GEP_CLK; /* Put the clack back to one */
575 sc->lmc_gpio |= LMC_GEP_MODE;
576 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
577 udelay(1);
578 }
579 if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0){
580 printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (corrupted data)\n", dev->name);
581 }
582 else if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_DP) == 0){
583 printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (done)\n", dev->name);
584 }
585 else {
586 printk(KERN_DEBUG "%s: Done reprogramming Xilinx, %d bits, good luck!\n", dev->name, pos);
587 }
588
589 lmc_gpio_mkinput(sc, 0xff);
590
591 sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
592 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
593
594 sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
595 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
596 spin_unlock_irqrestore(&sc->lmc_lock, flags);
597
598 kfree(data);
599
600 ret = 0;
601
602 break;
603 }
604 default: /*fold02*/
605 ret = -EBADE;
606 break;
607 }
608
609 netif_wake_queue(dev);
610 sc->lmc_txfull = 0;
611
612 }
613 break;
614 default: /*fold01*/
615 /* If we don't know what to do, give the protocol a shot. */
616 ret = lmc_proto_ioctl (sc, ifr, cmd);
617 break;
618 }
619
620 return ret;
621 }
622
623
624 /* the watchdog process that cruises around */
lmc_watchdog(struct timer_list * t)625 static void lmc_watchdog(struct timer_list *t) /*fold00*/
626 {
627 lmc_softc_t *sc = from_timer(sc, t, timer);
628 struct net_device *dev = sc->lmc_device;
629 int link_status;
630 u32 ticks;
631 unsigned long flags;
632
633 spin_lock_irqsave(&sc->lmc_lock, flags);
634
635 if(sc->check != 0xBEAFCAFE){
636 printk("LMC: Corrupt net_device struct, breaking out\n");
637 spin_unlock_irqrestore(&sc->lmc_lock, flags);
638 return;
639 }
640
641
642 /* Make sure the tx jabber and rx watchdog are off,
643 * and the transmit and receive processes are running.
644 */
645
646 LMC_CSR_WRITE (sc, csr_15, 0x00000011);
647 sc->lmc_cmdmode |= TULIP_CMD_TXRUN | TULIP_CMD_RXRUN;
648 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
649
650 if (sc->lmc_ok == 0)
651 goto kick_timer;
652
653 LMC_EVENT_LOG(LMC_EVENT_WATCHDOG, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
654
655 /* --- begin time out check -----------------------------------
656 * check for a transmit interrupt timeout
657 * Has the packet xmt vs xmt serviced threshold been exceeded */
658 if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
659 sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
660 sc->tx_TimeoutInd == 0)
661 {
662
663 /* wait for the watchdog to come around again */
664 sc->tx_TimeoutInd = 1;
665 }
666 else if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
667 sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
668 sc->tx_TimeoutInd)
669 {
670
671 LMC_EVENT_LOG(LMC_EVENT_XMTINTTMO, LMC_CSR_READ (sc, csr_status), 0);
672
673 sc->tx_TimeoutDisplay = 1;
674 sc->extra_stats.tx_TimeoutCnt++;
675
676 /* DEC chip is stuck, hit it with a RESET!!!! */
677 lmc_running_reset (dev);
678
679
680 /* look at receive & transmit process state to make sure they are running */
681 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
682
683 /* look at: DSR - 02 for Reg 16
684 * CTS - 08
685 * DCD - 10
686 * RI - 20
687 * for Reg 17
688 */
689 LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg (sc, 0, 16), lmc_mii_readreg (sc, 0, 17));
690
691 /* reset the transmit timeout detection flag */
692 sc->tx_TimeoutInd = 0;
693 sc->lastlmc_taint_tx = sc->lmc_taint_tx;
694 sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
695 } else {
696 sc->tx_TimeoutInd = 0;
697 sc->lastlmc_taint_tx = sc->lmc_taint_tx;
698 sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
699 }
700
701 /* --- end time out check ----------------------------------- */
702
703
704 link_status = sc->lmc_media->get_link_status (sc);
705
706 /*
707 * hardware level link lost, but the interface is marked as up.
708 * Mark it as down.
709 */
710 if ((link_status == 0) && (sc->last_link_status != 0)) {
711 printk(KERN_WARNING "%s: hardware/physical link down\n", dev->name);
712 sc->last_link_status = 0;
713 /* lmc_reset (sc); Why reset??? The link can go down ok */
714
715 /* Inform the world that link has been lost */
716 netif_carrier_off(dev);
717 }
718
719 /*
720 * hardware link is up, but the interface is marked as down.
721 * Bring it back up again.
722 */
723 if (link_status != 0 && sc->last_link_status == 0) {
724 printk(KERN_WARNING "%s: hardware/physical link up\n", dev->name);
725 sc->last_link_status = 1;
726 /* lmc_reset (sc); Again why reset??? */
727
728 netif_carrier_on(dev);
729 }
730
731 /* Call media specific watchdog functions */
732 sc->lmc_media->watchdog(sc);
733
734 /*
735 * Poke the transmitter to make sure it
736 * never stops, even if we run out of mem
737 */
738 LMC_CSR_WRITE(sc, csr_rxpoll, 0);
739
740 /*
741 * Check for code that failed
742 * and try and fix it as appropriate
743 */
744 if(sc->failed_ring == 1){
745 /*
746 * Failed to setup the recv/xmit rin
747 * Try again
748 */
749 sc->failed_ring = 0;
750 lmc_softreset(sc);
751 }
752 if(sc->failed_recv_alloc == 1){
753 /*
754 * We failed to alloc mem in the
755 * interrupt handler, go through the rings
756 * and rebuild them
757 */
758 sc->failed_recv_alloc = 0;
759 lmc_softreset(sc);
760 }
761
762
763 /*
764 * remember the timer value
765 */
766 kick_timer:
767
768 ticks = LMC_CSR_READ (sc, csr_gp_timer);
769 LMC_CSR_WRITE (sc, csr_gp_timer, 0xffffffffUL);
770 sc->ictl.ticks = 0x0000ffff - (ticks & 0x0000ffff);
771
772 /*
773 * restart this timer.
774 */
775 sc->timer.expires = jiffies + (HZ);
776 add_timer (&sc->timer);
777
778 spin_unlock_irqrestore(&sc->lmc_lock, flags);
779 }
780
lmc_attach(struct net_device * dev,unsigned short encoding,unsigned short parity)781 static int lmc_attach(struct net_device *dev, unsigned short encoding,
782 unsigned short parity)
783 {
784 if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT)
785 return 0;
786 return -EINVAL;
787 }
788
789 static const struct net_device_ops lmc_ops = {
790 .ndo_open = lmc_open,
791 .ndo_stop = lmc_close,
792 .ndo_start_xmit = hdlc_start_xmit,
793 .ndo_do_ioctl = lmc_ioctl,
794 .ndo_tx_timeout = lmc_driver_timeout,
795 .ndo_get_stats = lmc_get_stats,
796 };
797
lmc_init_one(struct pci_dev * pdev,const struct pci_device_id * ent)798 static int lmc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
799 {
800 lmc_softc_t *sc;
801 struct net_device *dev;
802 u16 subdevice;
803 u16 AdapModelNum;
804 int err;
805 static int cards_found;
806
807 err = pcim_enable_device(pdev);
808 if (err) {
809 printk(KERN_ERR "lmc: pci enable failed: %d\n", err);
810 return err;
811 }
812
813 err = pci_request_regions(pdev, "lmc");
814 if (err) {
815 printk(KERN_ERR "lmc: pci_request_region failed\n");
816 return err;
817 }
818
819 /*
820 * Allocate our own device structure
821 */
822 sc = devm_kzalloc(&pdev->dev, sizeof(lmc_softc_t), GFP_KERNEL);
823 if (!sc)
824 return -ENOMEM;
825
826 dev = alloc_hdlcdev(sc);
827 if (!dev) {
828 printk(KERN_ERR "lmc:alloc_netdev for device failed\n");
829 return -ENOMEM;
830 }
831
832
833 dev->type = ARPHRD_HDLC;
834 dev_to_hdlc(dev)->xmit = lmc_start_xmit;
835 dev_to_hdlc(dev)->attach = lmc_attach;
836 dev->netdev_ops = &lmc_ops;
837 dev->watchdog_timeo = HZ; /* 1 second */
838 dev->tx_queue_len = 100;
839 sc->lmc_device = dev;
840 sc->name = dev->name;
841 sc->if_type = LMC_PPP;
842 sc->check = 0xBEAFCAFE;
843 dev->base_addr = pci_resource_start(pdev, 0);
844 dev->irq = pdev->irq;
845 pci_set_drvdata(pdev, dev);
846 SET_NETDEV_DEV(dev, &pdev->dev);
847
848 /*
849 * This will get the protocol layer ready and do any 1 time init's
850 * Must have a valid sc and dev structure
851 */
852 lmc_proto_attach(sc);
853
854 /* Init the spin lock so can call it latter */
855
856 spin_lock_init(&sc->lmc_lock);
857 pci_set_master(pdev);
858
859 printk(KERN_INFO "%s: detected at %lx, irq %d\n", dev->name,
860 dev->base_addr, dev->irq);
861
862 err = register_hdlc_device(dev);
863 if (err) {
864 printk(KERN_ERR "%s: register_netdev failed.\n", dev->name);
865 free_netdev(dev);
866 return err;
867 }
868
869 sc->lmc_cardtype = LMC_CARDTYPE_UNKNOWN;
870 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
871
872 /*
873 *
874 * Check either the subvendor or the subdevice, some systems reverse
875 * the setting in the bois, seems to be version and arch dependent?
876 * Fix the error, exchange the two values
877 */
878 if ((subdevice = pdev->subsystem_device) == PCI_VENDOR_ID_LMC)
879 subdevice = pdev->subsystem_vendor;
880
881 switch (subdevice) {
882 case PCI_DEVICE_ID_LMC_HSSI:
883 printk(KERN_INFO "%s: LMC HSSI\n", dev->name);
884 sc->lmc_cardtype = LMC_CARDTYPE_HSSI;
885 sc->lmc_media = &lmc_hssi_media;
886 break;
887 case PCI_DEVICE_ID_LMC_DS3:
888 printk(KERN_INFO "%s: LMC DS3\n", dev->name);
889 sc->lmc_cardtype = LMC_CARDTYPE_DS3;
890 sc->lmc_media = &lmc_ds3_media;
891 break;
892 case PCI_DEVICE_ID_LMC_SSI:
893 printk(KERN_INFO "%s: LMC SSI\n", dev->name);
894 sc->lmc_cardtype = LMC_CARDTYPE_SSI;
895 sc->lmc_media = &lmc_ssi_media;
896 break;
897 case PCI_DEVICE_ID_LMC_T1:
898 printk(KERN_INFO "%s: LMC T1\n", dev->name);
899 sc->lmc_cardtype = LMC_CARDTYPE_T1;
900 sc->lmc_media = &lmc_t1_media;
901 break;
902 default:
903 printk(KERN_WARNING "%s: LMC UNKNOWN CARD!\n", dev->name);
904 break;
905 }
906
907 lmc_initcsrs (sc, dev->base_addr, 8);
908
909 lmc_gpio_mkinput (sc, 0xff);
910 sc->lmc_gpio = 0; /* drive no signals yet */
911
912 sc->lmc_media->defaults (sc);
913
914 sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
915
916 /* verify that the PCI Sub System ID matches the Adapter Model number
917 * from the MII register
918 */
919 AdapModelNum = (lmc_mii_readreg (sc, 0, 3) & 0x3f0) >> 4;
920
921 if ((AdapModelNum != LMC_ADAP_T1 || /* detect LMC1200 */
922 subdevice != PCI_DEVICE_ID_LMC_T1) &&
923 (AdapModelNum != LMC_ADAP_SSI || /* detect LMC1000 */
924 subdevice != PCI_DEVICE_ID_LMC_SSI) &&
925 (AdapModelNum != LMC_ADAP_DS3 || /* detect LMC5245 */
926 subdevice != PCI_DEVICE_ID_LMC_DS3) &&
927 (AdapModelNum != LMC_ADAP_HSSI || /* detect LMC5200 */
928 subdevice != PCI_DEVICE_ID_LMC_HSSI))
929 printk(KERN_WARNING "%s: Model number (%d) miscompare for PCI"
930 " Subsystem ID = 0x%04x\n",
931 dev->name, AdapModelNum, subdevice);
932
933 /*
934 * reset clock
935 */
936 LMC_CSR_WRITE (sc, csr_gp_timer, 0xFFFFFFFFUL);
937
938 sc->board_idx = cards_found++;
939 sc->extra_stats.check = STATCHECK;
940 sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
941 sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
942 sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
943
944 sc->lmc_ok = 0;
945 sc->last_link_status = 0;
946
947 return 0;
948 }
949
950 /*
951 * Called from pci when removing module.
952 */
lmc_remove_one(struct pci_dev * pdev)953 static void lmc_remove_one(struct pci_dev *pdev)
954 {
955 struct net_device *dev = pci_get_drvdata(pdev);
956
957 if (dev) {
958 printk(KERN_DEBUG "%s: removing...\n", dev->name);
959 unregister_hdlc_device(dev);
960 free_netdev(dev);
961 }
962 }
963
964 /* After this is called, packets can be sent.
965 * Does not initialize the addresses
966 */
lmc_open(struct net_device * dev)967 static int lmc_open(struct net_device *dev)
968 {
969 lmc_softc_t *sc = dev_to_sc(dev);
970 int err;
971
972 lmc_led_on(sc, LMC_DS3_LED0);
973
974 lmc_dec_reset(sc);
975 lmc_reset(sc);
976
977 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ(sc, csr_status), 0);
978 LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg(sc, 0, 16),
979 lmc_mii_readreg(sc, 0, 17));
980
981 if (sc->lmc_ok)
982 return 0;
983
984 lmc_softreset (sc);
985
986 /* Since we have to use PCI bus, this should work on x86,alpha,ppc */
987 if (request_irq (dev->irq, lmc_interrupt, IRQF_SHARED, dev->name, dev)){
988 printk(KERN_WARNING "%s: could not get irq: %d\n", dev->name, dev->irq);
989 return -EAGAIN;
990 }
991 sc->got_irq = 1;
992
993 /* Assert Terminal Active */
994 sc->lmc_miireg16 |= LMC_MII16_LED_ALL;
995 sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
996
997 /*
998 * reset to last state.
999 */
1000 sc->lmc_media->set_status (sc, NULL);
1001
1002 /* setup default bits to be used in tulip_desc_t transmit descriptor
1003 * -baz */
1004 sc->TxDescriptControlInit = (
1005 LMC_TDES_INTERRUPT_ON_COMPLETION
1006 | LMC_TDES_FIRST_SEGMENT
1007 | LMC_TDES_LAST_SEGMENT
1008 | LMC_TDES_SECOND_ADDR_CHAINED
1009 | LMC_TDES_DISABLE_PADDING
1010 );
1011
1012 if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16) {
1013 /* disable 32 bit CRC generated by ASIC */
1014 sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
1015 }
1016 sc->lmc_media->set_crc_length(sc, sc->ictl.crc_length);
1017 /* Acknoledge the Terminal Active and light LEDs */
1018
1019 /* dev->flags |= IFF_UP; */
1020
1021 if ((err = lmc_proto_open(sc)) != 0)
1022 return err;
1023
1024 netif_start_queue(dev);
1025 sc->extra_stats.tx_tbusy0++;
1026
1027 /*
1028 * select what interrupts we want to get
1029 */
1030 sc->lmc_intrmask = 0;
1031 /* Should be using the default interrupt mask defined in the .h file. */
1032 sc->lmc_intrmask |= (TULIP_STS_NORMALINTR
1033 | TULIP_STS_RXINTR
1034 | TULIP_STS_TXINTR
1035 | TULIP_STS_ABNRMLINTR
1036 | TULIP_STS_SYSERROR
1037 | TULIP_STS_TXSTOPPED
1038 | TULIP_STS_TXUNDERFLOW
1039 | TULIP_STS_RXSTOPPED
1040 | TULIP_STS_RXNOBUF
1041 );
1042 LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1043
1044 sc->lmc_cmdmode |= TULIP_CMD_TXRUN;
1045 sc->lmc_cmdmode |= TULIP_CMD_RXRUN;
1046 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1047
1048 sc->lmc_ok = 1; /* Run watchdog */
1049
1050 /*
1051 * Set the if up now - pfb
1052 */
1053
1054 sc->last_link_status = 1;
1055
1056 /*
1057 * Setup a timer for the watchdog on probe, and start it running.
1058 * Since lmc_ok == 0, it will be a NOP for now.
1059 */
1060 timer_setup(&sc->timer, lmc_watchdog, 0);
1061 sc->timer.expires = jiffies + HZ;
1062 add_timer (&sc->timer);
1063
1064 return 0;
1065 }
1066
1067 /* Total reset to compensate for the AdTran DSU doing bad things
1068 * under heavy load
1069 */
1070
lmc_running_reset(struct net_device * dev)1071 static void lmc_running_reset (struct net_device *dev) /*fold00*/
1072 {
1073 lmc_softc_t *sc = dev_to_sc(dev);
1074
1075 /* stop interrupts */
1076 /* Clear the interrupt mask */
1077 LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1078
1079 lmc_dec_reset (sc);
1080 lmc_reset (sc);
1081 lmc_softreset (sc);
1082 /* sc->lmc_miireg16 |= LMC_MII16_LED_ALL; */
1083 sc->lmc_media->set_link_status (sc, 1);
1084 sc->lmc_media->set_status (sc, NULL);
1085
1086 netif_wake_queue(dev);
1087
1088 sc->lmc_txfull = 0;
1089 sc->extra_stats.tx_tbusy0++;
1090
1091 sc->lmc_intrmask = TULIP_DEFAULT_INTR_MASK;
1092 LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1093
1094 sc->lmc_cmdmode |= (TULIP_CMD_TXRUN | TULIP_CMD_RXRUN);
1095 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1096 }
1097
1098
1099 /* This is what is called when you ifconfig down a device.
1100 * This disables the timer for the watchdog and keepalives,
1101 * and disables the irq for dev.
1102 */
lmc_close(struct net_device * dev)1103 static int lmc_close(struct net_device *dev)
1104 {
1105 /* not calling release_region() as we should */
1106 lmc_softc_t *sc = dev_to_sc(dev);
1107
1108 sc->lmc_ok = 0;
1109 sc->lmc_media->set_link_status (sc, 0);
1110 del_timer (&sc->timer);
1111 lmc_proto_close(sc);
1112 lmc_ifdown (dev);
1113
1114 return 0;
1115 }
1116
1117 /* Ends the transfer of packets */
1118 /* When the interface goes down, this is called */
lmc_ifdown(struct net_device * dev)1119 static int lmc_ifdown (struct net_device *dev) /*fold00*/
1120 {
1121 lmc_softc_t *sc = dev_to_sc(dev);
1122 u32 csr6;
1123 int i;
1124
1125 /* Don't let anything else go on right now */
1126 // dev->start = 0;
1127 netif_stop_queue(dev);
1128 sc->extra_stats.tx_tbusy1++;
1129
1130 /* stop interrupts */
1131 /* Clear the interrupt mask */
1132 LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1133
1134 /* Stop Tx and Rx on the chip */
1135 csr6 = LMC_CSR_READ (sc, csr_command);
1136 csr6 &= ~LMC_DEC_ST; /* Turn off the Transmission bit */
1137 csr6 &= ~LMC_DEC_SR; /* Turn off the Receive bit */
1138 LMC_CSR_WRITE (sc, csr_command, csr6);
1139
1140 sc->lmc_device->stats.rx_missed_errors +=
1141 LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
1142
1143 /* release the interrupt */
1144 if(sc->got_irq == 1){
1145 free_irq (dev->irq, dev);
1146 sc->got_irq = 0;
1147 }
1148
1149 /* free skbuffs in the Rx queue */
1150 for (i = 0; i < LMC_RXDESCS; i++)
1151 {
1152 struct sk_buff *skb = sc->lmc_rxq[i];
1153 sc->lmc_rxq[i] = NULL;
1154 sc->lmc_rxring[i].status = 0;
1155 sc->lmc_rxring[i].length = 0;
1156 sc->lmc_rxring[i].buffer1 = 0xDEADBEEF;
1157 if (skb != NULL)
1158 dev_kfree_skb(skb);
1159 sc->lmc_rxq[i] = NULL;
1160 }
1161
1162 for (i = 0; i < LMC_TXDESCS; i++)
1163 {
1164 if (sc->lmc_txq[i] != NULL)
1165 dev_kfree_skb(sc->lmc_txq[i]);
1166 sc->lmc_txq[i] = NULL;
1167 }
1168
1169 lmc_led_off (sc, LMC_MII16_LED_ALL);
1170
1171 netif_wake_queue(dev);
1172 sc->extra_stats.tx_tbusy0++;
1173
1174 return 0;
1175 }
1176
1177 /* Interrupt handling routine. This will take an incoming packet, or clean
1178 * up after a trasmit.
1179 */
lmc_interrupt(int irq,void * dev_instance)1180 static irqreturn_t lmc_interrupt (int irq, void *dev_instance) /*fold00*/
1181 {
1182 struct net_device *dev = (struct net_device *) dev_instance;
1183 lmc_softc_t *sc = dev_to_sc(dev);
1184 u32 csr;
1185 int i;
1186 s32 stat;
1187 unsigned int badtx;
1188 u32 firstcsr;
1189 int max_work = LMC_RXDESCS;
1190 int handled = 0;
1191
1192 spin_lock(&sc->lmc_lock);
1193
1194 /*
1195 * Read the csr to find what interrupts we have (if any)
1196 */
1197 csr = LMC_CSR_READ (sc, csr_status);
1198
1199 /*
1200 * Make sure this is our interrupt
1201 */
1202 if ( ! (csr & sc->lmc_intrmask)) {
1203 goto lmc_int_fail_out;
1204 }
1205
1206 firstcsr = csr;
1207
1208 /* always go through this loop at least once */
1209 while (csr & sc->lmc_intrmask) {
1210 handled = 1;
1211
1212 /*
1213 * Clear interrupt bits, we handle all case below
1214 */
1215 LMC_CSR_WRITE (sc, csr_status, csr);
1216
1217 /*
1218 * One of
1219 * - Transmit process timed out CSR5<1>
1220 * - Transmit jabber timeout CSR5<3>
1221 * - Transmit underflow CSR5<5>
1222 * - Transmit Receiver buffer unavailable CSR5<7>
1223 * - Receive process stopped CSR5<8>
1224 * - Receive watchdog timeout CSR5<9>
1225 * - Early transmit interrupt CSR5<10>
1226 *
1227 * Is this really right? Should we do a running reset for jabber?
1228 * (being a WAN card and all)
1229 */
1230 if (csr & TULIP_STS_ABNRMLINTR){
1231 lmc_running_reset (dev);
1232 break;
1233 }
1234
1235 if (csr & TULIP_STS_RXINTR)
1236 lmc_rx (dev);
1237
1238 if (csr & (TULIP_STS_TXINTR | TULIP_STS_TXNOBUF | TULIP_STS_TXSTOPPED)) {
1239
1240 int n_compl = 0 ;
1241 /* reset the transmit timeout detection flag -baz */
1242 sc->extra_stats.tx_NoCompleteCnt = 0;
1243
1244 badtx = sc->lmc_taint_tx;
1245 i = badtx % LMC_TXDESCS;
1246
1247 while ((badtx < sc->lmc_next_tx)) {
1248 stat = sc->lmc_txring[i].status;
1249
1250 LMC_EVENT_LOG (LMC_EVENT_XMTINT, stat,
1251 sc->lmc_txring[i].length);
1252 /*
1253 * If bit 31 is 1 the tulip owns it break out of the loop
1254 */
1255 if (stat & 0x80000000)
1256 break;
1257
1258 n_compl++ ; /* i.e., have an empty slot in ring */
1259 /*
1260 * If we have no skbuff or have cleared it
1261 * Already continue to the next buffer
1262 */
1263 if (sc->lmc_txq[i] == NULL)
1264 continue;
1265
1266 /*
1267 * Check the total error summary to look for any errors
1268 */
1269 if (stat & 0x8000) {
1270 sc->lmc_device->stats.tx_errors++;
1271 if (stat & 0x4104)
1272 sc->lmc_device->stats.tx_aborted_errors++;
1273 if (stat & 0x0C00)
1274 sc->lmc_device->stats.tx_carrier_errors++;
1275 if (stat & 0x0200)
1276 sc->lmc_device->stats.tx_window_errors++;
1277 if (stat & 0x0002)
1278 sc->lmc_device->stats.tx_fifo_errors++;
1279 } else {
1280 sc->lmc_device->stats.tx_bytes += sc->lmc_txring[i].length & 0x7ff;
1281
1282 sc->lmc_device->stats.tx_packets++;
1283 }
1284
1285 dev_consume_skb_irq(sc->lmc_txq[i]);
1286 sc->lmc_txq[i] = NULL;
1287
1288 badtx++;
1289 i = badtx % LMC_TXDESCS;
1290 }
1291
1292 if (sc->lmc_next_tx - badtx > LMC_TXDESCS)
1293 {
1294 printk ("%s: out of sync pointer\n", dev->name);
1295 badtx += LMC_TXDESCS;
1296 }
1297 LMC_EVENT_LOG(LMC_EVENT_TBUSY0, n_compl, 0);
1298 sc->lmc_txfull = 0;
1299 netif_wake_queue(dev);
1300 sc->extra_stats.tx_tbusy0++;
1301
1302
1303 #ifdef DEBUG
1304 sc->extra_stats.dirtyTx = badtx;
1305 sc->extra_stats.lmc_next_tx = sc->lmc_next_tx;
1306 sc->extra_stats.lmc_txfull = sc->lmc_txfull;
1307 #endif
1308 sc->lmc_taint_tx = badtx;
1309
1310 /*
1311 * Why was there a break here???
1312 */
1313 } /* end handle transmit interrupt */
1314
1315 if (csr & TULIP_STS_SYSERROR) {
1316 u32 error;
1317 printk (KERN_WARNING "%s: system bus error csr: %#8.8x\n", dev->name, csr);
1318 error = csr>>23 & 0x7;
1319 switch(error){
1320 case 0x000:
1321 printk(KERN_WARNING "%s: Parity Fault (bad)\n", dev->name);
1322 break;
1323 case 0x001:
1324 printk(KERN_WARNING "%s: Master Abort (naughty)\n", dev->name);
1325 break;
1326 case 0x002:
1327 printk(KERN_WARNING "%s: Target Abort (not so naughty)\n", dev->name);
1328 break;
1329 default:
1330 printk(KERN_WARNING "%s: This bus error code was supposed to be reserved!\n", dev->name);
1331 }
1332 lmc_dec_reset (sc);
1333 lmc_reset (sc);
1334 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
1335 LMC_EVENT_LOG(LMC_EVENT_RESET2,
1336 lmc_mii_readreg (sc, 0, 16),
1337 lmc_mii_readreg (sc, 0, 17));
1338
1339 }
1340
1341
1342 if(max_work-- <= 0)
1343 break;
1344
1345 /*
1346 * Get current csr status to make sure
1347 * we've cleared all interrupts
1348 */
1349 csr = LMC_CSR_READ (sc, csr_status);
1350 } /* end interrupt loop */
1351 LMC_EVENT_LOG(LMC_EVENT_INT, firstcsr, csr);
1352
1353 lmc_int_fail_out:
1354
1355 spin_unlock(&sc->lmc_lock);
1356
1357 return IRQ_RETVAL(handled);
1358 }
1359
lmc_start_xmit(struct sk_buff * skb,struct net_device * dev)1360 static netdev_tx_t lmc_start_xmit(struct sk_buff *skb,
1361 struct net_device *dev)
1362 {
1363 lmc_softc_t *sc = dev_to_sc(dev);
1364 u32 flag;
1365 int entry;
1366 unsigned long flags;
1367
1368 spin_lock_irqsave(&sc->lmc_lock, flags);
1369
1370 /* normal path, tbusy known to be zero */
1371
1372 entry = sc->lmc_next_tx % LMC_TXDESCS;
1373
1374 sc->lmc_txq[entry] = skb;
1375 sc->lmc_txring[entry].buffer1 = virt_to_bus (skb->data);
1376
1377 LMC_CONSOLE_LOG("xmit", skb->data, skb->len);
1378
1379 #ifndef GCOM
1380 /* If the queue is less than half full, don't interrupt */
1381 if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS / 2)
1382 {
1383 /* Do not interrupt on completion of this packet */
1384 flag = 0x60000000;
1385 netif_wake_queue(dev);
1386 }
1387 else if (sc->lmc_next_tx - sc->lmc_taint_tx == LMC_TXDESCS / 2)
1388 {
1389 /* This generates an interrupt on completion of this packet */
1390 flag = 0xe0000000;
1391 netif_wake_queue(dev);
1392 }
1393 else if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS - 1)
1394 {
1395 /* Do not interrupt on completion of this packet */
1396 flag = 0x60000000;
1397 netif_wake_queue(dev);
1398 }
1399 else
1400 {
1401 /* This generates an interrupt on completion of this packet */
1402 flag = 0xe0000000;
1403 sc->lmc_txfull = 1;
1404 netif_stop_queue(dev);
1405 }
1406 #else
1407 flag = LMC_TDES_INTERRUPT_ON_COMPLETION;
1408
1409 if (sc->lmc_next_tx - sc->lmc_taint_tx >= LMC_TXDESCS - 1)
1410 { /* ring full, go busy */
1411 sc->lmc_txfull = 1;
1412 netif_stop_queue(dev);
1413 sc->extra_stats.tx_tbusy1++;
1414 LMC_EVENT_LOG(LMC_EVENT_TBUSY1, entry, 0);
1415 }
1416 #endif
1417
1418
1419 if (entry == LMC_TXDESCS - 1) /* last descriptor in ring */
1420 flag |= LMC_TDES_END_OF_RING; /* flag as such for Tulip */
1421
1422 /* don't pad small packets either */
1423 flag = sc->lmc_txring[entry].length = (skb->len) | flag |
1424 sc->TxDescriptControlInit;
1425
1426 /* set the transmit timeout flag to be checked in
1427 * the watchdog timer handler. -baz
1428 */
1429
1430 sc->extra_stats.tx_NoCompleteCnt++;
1431 sc->lmc_next_tx++;
1432
1433 /* give ownership to the chip */
1434 LMC_EVENT_LOG(LMC_EVENT_XMT, flag, entry);
1435 sc->lmc_txring[entry].status = 0x80000000;
1436
1437 /* send now! */
1438 LMC_CSR_WRITE (sc, csr_txpoll, 0);
1439
1440 spin_unlock_irqrestore(&sc->lmc_lock, flags);
1441
1442 return NETDEV_TX_OK;
1443 }
1444
1445
lmc_rx(struct net_device * dev)1446 static int lmc_rx(struct net_device *dev)
1447 {
1448 lmc_softc_t *sc = dev_to_sc(dev);
1449 int i;
1450 int rx_work_limit = LMC_RXDESCS;
1451 int rxIntLoopCnt; /* debug -baz */
1452 int localLengthErrCnt = 0;
1453 long stat;
1454 struct sk_buff *skb, *nsb;
1455 u16 len;
1456
1457 lmc_led_on(sc, LMC_DS3_LED3);
1458
1459 rxIntLoopCnt = 0; /* debug -baz */
1460
1461 i = sc->lmc_next_rx % LMC_RXDESCS;
1462
1463 while (((stat = sc->lmc_rxring[i].status) & LMC_RDES_OWN_BIT) != DESC_OWNED_BY_DC21X4)
1464 {
1465 rxIntLoopCnt++; /* debug -baz */
1466 len = ((stat & LMC_RDES_FRAME_LENGTH) >> RDES_FRAME_LENGTH_BIT_NUMBER);
1467 if ((stat & 0x0300) != 0x0300) { /* Check first segment and last segment */
1468 if ((stat & 0x0000ffff) != 0x7fff) {
1469 /* Oversized frame */
1470 sc->lmc_device->stats.rx_length_errors++;
1471 goto skip_packet;
1472 }
1473 }
1474
1475 if (stat & 0x00000008) { /* Catch a dribbling bit error */
1476 sc->lmc_device->stats.rx_errors++;
1477 sc->lmc_device->stats.rx_frame_errors++;
1478 goto skip_packet;
1479 }
1480
1481
1482 if (stat & 0x00000004) { /* Catch a CRC error by the Xilinx */
1483 sc->lmc_device->stats.rx_errors++;
1484 sc->lmc_device->stats.rx_crc_errors++;
1485 goto skip_packet;
1486 }
1487
1488 if (len > LMC_PKT_BUF_SZ) {
1489 sc->lmc_device->stats.rx_length_errors++;
1490 localLengthErrCnt++;
1491 goto skip_packet;
1492 }
1493
1494 if (len < sc->lmc_crcSize + 2) {
1495 sc->lmc_device->stats.rx_length_errors++;
1496 sc->extra_stats.rx_SmallPktCnt++;
1497 localLengthErrCnt++;
1498 goto skip_packet;
1499 }
1500
1501 if(stat & 0x00004000){
1502 printk(KERN_WARNING "%s: Receiver descriptor error, receiver out of sync?\n", dev->name);
1503 }
1504
1505 len -= sc->lmc_crcSize;
1506
1507 skb = sc->lmc_rxq[i];
1508
1509 /*
1510 * We ran out of memory at some point
1511 * just allocate an skb buff and continue.
1512 */
1513
1514 if (!skb) {
1515 nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1516 if (nsb) {
1517 sc->lmc_rxq[i] = nsb;
1518 nsb->dev = dev;
1519 sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
1520 }
1521 sc->failed_recv_alloc = 1;
1522 goto skip_packet;
1523 }
1524
1525 sc->lmc_device->stats.rx_packets++;
1526 sc->lmc_device->stats.rx_bytes += len;
1527
1528 LMC_CONSOLE_LOG("recv", skb->data, len);
1529
1530 /*
1531 * I'm not sure of the sanity of this
1532 * Packets could be arriving at a constant
1533 * 44.210mbits/sec and we're going to copy
1534 * them into a new buffer??
1535 */
1536
1537 if(len > (LMC_MTU - (LMC_MTU>>2))){ /* len > LMC_MTU * 0.75 */
1538 /*
1539 * If it's a large packet don't copy it just hand it up
1540 */
1541 give_it_anyways:
1542
1543 sc->lmc_rxq[i] = NULL;
1544 sc->lmc_rxring[i].buffer1 = 0x0;
1545
1546 skb_put (skb, len);
1547 skb->protocol = lmc_proto_type(sc, skb);
1548 skb_reset_mac_header(skb);
1549 /* skb_reset_network_header(skb); */
1550 skb->dev = dev;
1551 lmc_proto_netif(sc, skb);
1552
1553 /*
1554 * This skb will be destroyed by the upper layers, make a new one
1555 */
1556 nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1557 if (nsb) {
1558 sc->lmc_rxq[i] = nsb;
1559 nsb->dev = dev;
1560 sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
1561 /* Transferred to 21140 below */
1562 }
1563 else {
1564 /*
1565 * We've run out of memory, stop trying to allocate
1566 * memory and exit the interrupt handler
1567 *
1568 * The chip may run out of receivers and stop
1569 * in which care we'll try to allocate the buffer
1570 * again. (once a second)
1571 */
1572 sc->extra_stats.rx_BuffAllocErr++;
1573 LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
1574 sc->failed_recv_alloc = 1;
1575 goto skip_out_of_mem;
1576 }
1577 }
1578 else {
1579 nsb = dev_alloc_skb(len);
1580 if(!nsb) {
1581 goto give_it_anyways;
1582 }
1583 skb_copy_from_linear_data(skb, skb_put(nsb, len), len);
1584
1585 nsb->protocol = lmc_proto_type(sc, nsb);
1586 skb_reset_mac_header(nsb);
1587 /* skb_reset_network_header(nsb); */
1588 nsb->dev = dev;
1589 lmc_proto_netif(sc, nsb);
1590 }
1591
1592 skip_packet:
1593 LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
1594 sc->lmc_rxring[i].status = DESC_OWNED_BY_DC21X4;
1595
1596 sc->lmc_next_rx++;
1597 i = sc->lmc_next_rx % LMC_RXDESCS;
1598 rx_work_limit--;
1599 if (rx_work_limit < 0)
1600 break;
1601 }
1602
1603 /* detect condition for LMC1000 where DSU cable attaches and fills
1604 * descriptors with bogus packets
1605 *
1606 if (localLengthErrCnt > LMC_RXDESCS - 3) {
1607 sc->extra_stats.rx_BadPktSurgeCnt++;
1608 LMC_EVENT_LOG(LMC_EVENT_BADPKTSURGE, localLengthErrCnt,
1609 sc->extra_stats.rx_BadPktSurgeCnt);
1610 } */
1611
1612 /* save max count of receive descriptors serviced */
1613 if (rxIntLoopCnt > sc->extra_stats.rxIntLoopCnt)
1614 sc->extra_stats.rxIntLoopCnt = rxIntLoopCnt; /* debug -baz */
1615
1616 #ifdef DEBUG
1617 if (rxIntLoopCnt == 0)
1618 {
1619 for (i = 0; i < LMC_RXDESCS; i++)
1620 {
1621 if ((sc->lmc_rxring[i].status & LMC_RDES_OWN_BIT)
1622 != DESC_OWNED_BY_DC21X4)
1623 {
1624 rxIntLoopCnt++;
1625 }
1626 }
1627 LMC_EVENT_LOG(LMC_EVENT_RCVEND, rxIntLoopCnt, 0);
1628 }
1629 #endif
1630
1631
1632 lmc_led_off(sc, LMC_DS3_LED3);
1633
1634 skip_out_of_mem:
1635 return 0;
1636 }
1637
lmc_get_stats(struct net_device * dev)1638 static struct net_device_stats *lmc_get_stats(struct net_device *dev)
1639 {
1640 lmc_softc_t *sc = dev_to_sc(dev);
1641 unsigned long flags;
1642
1643 spin_lock_irqsave(&sc->lmc_lock, flags);
1644
1645 sc->lmc_device->stats.rx_missed_errors += LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
1646
1647 spin_unlock_irqrestore(&sc->lmc_lock, flags);
1648
1649 return &sc->lmc_device->stats;
1650 }
1651
1652 static struct pci_driver lmc_driver = {
1653 .name = "lmc",
1654 .id_table = lmc_pci_tbl,
1655 .probe = lmc_init_one,
1656 .remove = lmc_remove_one,
1657 };
1658
1659 module_pci_driver(lmc_driver);
1660
lmc_mii_readreg(lmc_softc_t * const sc,unsigned devaddr,unsigned regno)1661 unsigned lmc_mii_readreg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno) /*fold00*/
1662 {
1663 int i;
1664 int command = (0xf6 << 10) | (devaddr << 5) | regno;
1665 int retval = 0;
1666
1667 LMC_MII_SYNC (sc);
1668
1669 for (i = 15; i >= 0; i--)
1670 {
1671 int dataval = (command & (1 << i)) ? 0x20000 : 0;
1672
1673 LMC_CSR_WRITE (sc, csr_9, dataval);
1674 lmc_delay ();
1675 /* __SLOW_DOWN_IO; */
1676 LMC_CSR_WRITE (sc, csr_9, dataval | 0x10000);
1677 lmc_delay ();
1678 /* __SLOW_DOWN_IO; */
1679 }
1680
1681 for (i = 19; i > 0; i--)
1682 {
1683 LMC_CSR_WRITE (sc, csr_9, 0x40000);
1684 lmc_delay ();
1685 /* __SLOW_DOWN_IO; */
1686 retval = (retval << 1) | ((LMC_CSR_READ (sc, csr_9) & 0x80000) ? 1 : 0);
1687 LMC_CSR_WRITE (sc, csr_9, 0x40000 | 0x10000);
1688 lmc_delay ();
1689 /* __SLOW_DOWN_IO; */
1690 }
1691
1692 return (retval >> 1) & 0xffff;
1693 }
1694
lmc_mii_writereg(lmc_softc_t * const sc,unsigned devaddr,unsigned regno,unsigned data)1695 void lmc_mii_writereg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno, unsigned data) /*fold00*/
1696 {
1697 int i = 32;
1698 int command = (0x5002 << 16) | (devaddr << 23) | (regno << 18) | data;
1699
1700 LMC_MII_SYNC (sc);
1701
1702 i = 31;
1703 while (i >= 0)
1704 {
1705 int datav;
1706
1707 if (command & (1 << i))
1708 datav = 0x20000;
1709 else
1710 datav = 0x00000;
1711
1712 LMC_CSR_WRITE (sc, csr_9, datav);
1713 lmc_delay ();
1714 /* __SLOW_DOWN_IO; */
1715 LMC_CSR_WRITE (sc, csr_9, (datav | 0x10000));
1716 lmc_delay ();
1717 /* __SLOW_DOWN_IO; */
1718 i--;
1719 }
1720
1721 i = 2;
1722 while (i > 0)
1723 {
1724 LMC_CSR_WRITE (sc, csr_9, 0x40000);
1725 lmc_delay ();
1726 /* __SLOW_DOWN_IO; */
1727 LMC_CSR_WRITE (sc, csr_9, 0x50000);
1728 lmc_delay ();
1729 /* __SLOW_DOWN_IO; */
1730 i--;
1731 }
1732 }
1733
lmc_softreset(lmc_softc_t * const sc)1734 static void lmc_softreset (lmc_softc_t * const sc) /*fold00*/
1735 {
1736 int i;
1737
1738 /* Initialize the receive rings and buffers. */
1739 sc->lmc_txfull = 0;
1740 sc->lmc_next_rx = 0;
1741 sc->lmc_next_tx = 0;
1742 sc->lmc_taint_rx = 0;
1743 sc->lmc_taint_tx = 0;
1744
1745 /*
1746 * Setup each one of the receiver buffers
1747 * allocate an skbuff for each one, setup the descriptor table
1748 * and point each buffer at the next one
1749 */
1750
1751 for (i = 0; i < LMC_RXDESCS; i++)
1752 {
1753 struct sk_buff *skb;
1754
1755 if (sc->lmc_rxq[i] == NULL)
1756 {
1757 skb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1758 if(skb == NULL){
1759 printk(KERN_WARNING "%s: Failed to allocate receiver ring, will try again\n", sc->name);
1760 sc->failed_ring = 1;
1761 break;
1762 }
1763 else{
1764 sc->lmc_rxq[i] = skb;
1765 }
1766 }
1767 else
1768 {
1769 skb = sc->lmc_rxq[i];
1770 }
1771
1772 skb->dev = sc->lmc_device;
1773
1774 /* owned by 21140 */
1775 sc->lmc_rxring[i].status = 0x80000000;
1776
1777 /* used to be PKT_BUF_SZ now uses skb since we lose some to head room */
1778 sc->lmc_rxring[i].length = skb_tailroom(skb);
1779
1780 /* use to be tail which is dumb since you're thinking why write
1781 * to the end of the packj,et but since there's nothing there tail == data
1782 */
1783 sc->lmc_rxring[i].buffer1 = virt_to_bus (skb->data);
1784
1785 /* This is fair since the structure is static and we have the next address */
1786 sc->lmc_rxring[i].buffer2 = virt_to_bus (&sc->lmc_rxring[i + 1]);
1787
1788 }
1789
1790 /*
1791 * Sets end of ring
1792 */
1793 if (i != 0) {
1794 sc->lmc_rxring[i - 1].length |= 0x02000000; /* Set end of buffers flag */
1795 sc->lmc_rxring[i - 1].buffer2 = virt_to_bus(&sc->lmc_rxring[0]); /* Point back to the start */
1796 }
1797 LMC_CSR_WRITE (sc, csr_rxlist, virt_to_bus (sc->lmc_rxring)); /* write base address */
1798
1799 /* Initialize the transmit rings and buffers */
1800 for (i = 0; i < LMC_TXDESCS; i++)
1801 {
1802 if (sc->lmc_txq[i] != NULL){ /* have buffer */
1803 dev_kfree_skb(sc->lmc_txq[i]); /* free it */
1804 sc->lmc_device->stats.tx_dropped++; /* We just dropped a packet */
1805 }
1806 sc->lmc_txq[i] = NULL;
1807 sc->lmc_txring[i].status = 0x00000000;
1808 sc->lmc_txring[i].buffer2 = virt_to_bus (&sc->lmc_txring[i + 1]);
1809 }
1810 sc->lmc_txring[i - 1].buffer2 = virt_to_bus (&sc->lmc_txring[0]);
1811 LMC_CSR_WRITE (sc, csr_txlist, virt_to_bus (sc->lmc_txring));
1812 }
1813
lmc_gpio_mkinput(lmc_softc_t * const sc,u32 bits)1814 void lmc_gpio_mkinput(lmc_softc_t * const sc, u32 bits) /*fold00*/
1815 {
1816 sc->lmc_gpio_io &= ~bits;
1817 LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
1818 }
1819
lmc_gpio_mkoutput(lmc_softc_t * const sc,u32 bits)1820 void lmc_gpio_mkoutput(lmc_softc_t * const sc, u32 bits) /*fold00*/
1821 {
1822 sc->lmc_gpio_io |= bits;
1823 LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
1824 }
1825
lmc_led_on(lmc_softc_t * const sc,u32 led)1826 void lmc_led_on(lmc_softc_t * const sc, u32 led) /*fold00*/
1827 {
1828 if ((~sc->lmc_miireg16) & led) /* Already on! */
1829 return;
1830
1831 sc->lmc_miireg16 &= ~led;
1832 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1833 }
1834
lmc_led_off(lmc_softc_t * const sc,u32 led)1835 void lmc_led_off(lmc_softc_t * const sc, u32 led) /*fold00*/
1836 {
1837 if (sc->lmc_miireg16 & led) /* Already set don't do anything */
1838 return;
1839
1840 sc->lmc_miireg16 |= led;
1841 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1842 }
1843
lmc_reset(lmc_softc_t * const sc)1844 static void lmc_reset(lmc_softc_t * const sc) /*fold00*/
1845 {
1846 sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
1847 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1848
1849 sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
1850 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1851
1852 /*
1853 * make some of the GPIO pins be outputs
1854 */
1855 lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
1856
1857 /*
1858 * RESET low to force state reset. This also forces
1859 * the transmitter clock to be internal, but we expect to reset
1860 * that later anyway.
1861 */
1862 sc->lmc_gpio &= ~(LMC_GEP_RESET);
1863 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
1864
1865 /*
1866 * hold for more than 10 microseconds
1867 */
1868 udelay(50);
1869
1870 /*
1871 * stop driving Xilinx-related signals
1872 */
1873 lmc_gpio_mkinput(sc, LMC_GEP_RESET);
1874
1875 /*
1876 * Call media specific init routine
1877 */
1878 sc->lmc_media->init(sc);
1879
1880 sc->extra_stats.resetCount++;
1881 }
1882
lmc_dec_reset(lmc_softc_t * const sc)1883 static void lmc_dec_reset(lmc_softc_t * const sc) /*fold00*/
1884 {
1885 u32 val;
1886
1887 /*
1888 * disable all interrupts
1889 */
1890 sc->lmc_intrmask = 0;
1891 LMC_CSR_WRITE(sc, csr_intr, sc->lmc_intrmask);
1892
1893 /*
1894 * Reset the chip with a software reset command.
1895 * Wait 10 microseconds (actually 50 PCI cycles but at
1896 * 33MHz that comes to two microseconds but wait a
1897 * bit longer anyways)
1898 */
1899 LMC_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
1900 udelay(25);
1901 #ifdef __sparc__
1902 sc->lmc_busmode = LMC_CSR_READ(sc, csr_busmode);
1903 sc->lmc_busmode = 0x00100000;
1904 sc->lmc_busmode &= ~TULIP_BUSMODE_SWRESET;
1905 LMC_CSR_WRITE(sc, csr_busmode, sc->lmc_busmode);
1906 #endif
1907 sc->lmc_cmdmode = LMC_CSR_READ(sc, csr_command);
1908
1909 /*
1910 * We want:
1911 * no ethernet address in frames we write
1912 * disable padding (txdesc, padding disable)
1913 * ignore runt frames (rdes0 bit 15)
1914 * no receiver watchdog or transmitter jabber timer
1915 * (csr15 bit 0,14 == 1)
1916 * if using 16-bit CRC, turn off CRC (trans desc, crc disable)
1917 */
1918
1919 sc->lmc_cmdmode |= ( TULIP_CMD_PROMISCUOUS
1920 | TULIP_CMD_FULLDUPLEX
1921 | TULIP_CMD_PASSBADPKT
1922 | TULIP_CMD_NOHEARTBEAT
1923 | TULIP_CMD_PORTSELECT
1924 | TULIP_CMD_RECEIVEALL
1925 | TULIP_CMD_MUSTBEONE
1926 );
1927 sc->lmc_cmdmode &= ~( TULIP_CMD_OPERMODE
1928 | TULIP_CMD_THRESHOLDCTL
1929 | TULIP_CMD_STOREFWD
1930 | TULIP_CMD_TXTHRSHLDCTL
1931 );
1932
1933 LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode);
1934
1935 /*
1936 * disable receiver watchdog and transmit jabber
1937 */
1938 val = LMC_CSR_READ(sc, csr_sia_general);
1939 val |= (TULIP_WATCHDOG_TXDISABLE | TULIP_WATCHDOG_RXDISABLE);
1940 LMC_CSR_WRITE(sc, csr_sia_general, val);
1941 }
1942
lmc_initcsrs(lmc_softc_t * const sc,lmc_csrptr_t csr_base,size_t csr_size)1943 static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, /*fold00*/
1944 size_t csr_size)
1945 {
1946 sc->lmc_csrs.csr_busmode = csr_base + 0 * csr_size;
1947 sc->lmc_csrs.csr_txpoll = csr_base + 1 * csr_size;
1948 sc->lmc_csrs.csr_rxpoll = csr_base + 2 * csr_size;
1949 sc->lmc_csrs.csr_rxlist = csr_base + 3 * csr_size;
1950 sc->lmc_csrs.csr_txlist = csr_base + 4 * csr_size;
1951 sc->lmc_csrs.csr_status = csr_base + 5 * csr_size;
1952 sc->lmc_csrs.csr_command = csr_base + 6 * csr_size;
1953 sc->lmc_csrs.csr_intr = csr_base + 7 * csr_size;
1954 sc->lmc_csrs.csr_missed_frames = csr_base + 8 * csr_size;
1955 sc->lmc_csrs.csr_9 = csr_base + 9 * csr_size;
1956 sc->lmc_csrs.csr_10 = csr_base + 10 * csr_size;
1957 sc->lmc_csrs.csr_11 = csr_base + 11 * csr_size;
1958 sc->lmc_csrs.csr_12 = csr_base + 12 * csr_size;
1959 sc->lmc_csrs.csr_13 = csr_base + 13 * csr_size;
1960 sc->lmc_csrs.csr_14 = csr_base + 14 * csr_size;
1961 sc->lmc_csrs.csr_15 = csr_base + 15 * csr_size;
1962 }
1963
lmc_driver_timeout(struct net_device * dev,unsigned int txqueue)1964 static void lmc_driver_timeout(struct net_device *dev, unsigned int txqueue)
1965 {
1966 lmc_softc_t *sc = dev_to_sc(dev);
1967 u32 csr6;
1968 unsigned long flags;
1969
1970 spin_lock_irqsave(&sc->lmc_lock, flags);
1971
1972 printk("%s: Xmitter busy|\n", dev->name);
1973
1974 sc->extra_stats.tx_tbusy_calls++;
1975 if (jiffies - dev_trans_start(dev) < TX_TIMEOUT)
1976 goto bug_out;
1977
1978 /*
1979 * Chip seems to have locked up
1980 * Reset it
1981 * This whips out all our descriptor
1982 * table and starts from scartch
1983 */
1984
1985 LMC_EVENT_LOG(LMC_EVENT_XMTPRCTMO,
1986 LMC_CSR_READ (sc, csr_status),
1987 sc->extra_stats.tx_ProcTimeout);
1988
1989 lmc_running_reset (dev);
1990
1991 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
1992 LMC_EVENT_LOG(LMC_EVENT_RESET2,
1993 lmc_mii_readreg (sc, 0, 16),
1994 lmc_mii_readreg (sc, 0, 17));
1995
1996 /* restart the tx processes */
1997 csr6 = LMC_CSR_READ (sc, csr_command);
1998 LMC_CSR_WRITE (sc, csr_command, csr6 | 0x0002);
1999 LMC_CSR_WRITE (sc, csr_command, csr6 | 0x2002);
2000
2001 /* immediate transmit */
2002 LMC_CSR_WRITE (sc, csr_txpoll, 0);
2003
2004 sc->lmc_device->stats.tx_errors++;
2005 sc->extra_stats.tx_ProcTimeout++; /* -baz */
2006
2007 netif_trans_update(dev); /* prevent tx timeout */
2008
2009 bug_out:
2010
2011 spin_unlock_irqrestore(&sc->lmc_lock, flags);
2012 }
2013