1 /*
2 * Copyright (C) 2009 Wolfgang Grandegger <wg@grandegger.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the version 2 of the GNU General Public License
6 * as published by the Free Software Foundation
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
16 */
17
18 #include <linux/kernel.h>
19 #include <linux/module.h>
20 #include <linux/platform_device.h>
21 #include <linux/interrupt.h>
22 #include <linux/netdevice.h>
23 #include <linux/delay.h>
24 #include <linux/irq.h>
25 #include <linux/io.h>
26 #include <linux/can/dev.h>
27 #include <linux/can/platform/sja1000.h>
28
29 #include "sja1000.h"
30
31 #define DRV_NAME "sja1000_isa"
32
33 #define MAXDEV 8
34
35 MODULE_AUTHOR("Wolfgang Grandegger <wg@grandegger.com>");
36 MODULE_DESCRIPTION("Socket-CAN driver for SJA1000 on the ISA bus");
37 MODULE_LICENSE("GPL v2");
38
39 #define CLK_DEFAULT 16000000 /* 16 MHz */
40 #define CDR_DEFAULT (CDR_CBP | CDR_CLK_OFF)
41 #define OCR_DEFAULT OCR_TX0_PUSHPULL
42
43 static unsigned long port[MAXDEV];
44 static unsigned long mem[MAXDEV];
45 static int __devinitdata irq[MAXDEV];
46 static int __devinitdata clk[MAXDEV];
47 static unsigned char __devinitdata cdr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
48 static unsigned char __devinitdata ocr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
49 static int __devinitdata indirect[MAXDEV] = {[0 ... (MAXDEV - 1)] = -1};
50
51 module_param_array(port, ulong, NULL, S_IRUGO);
52 MODULE_PARM_DESC(port, "I/O port number");
53
54 module_param_array(mem, ulong, NULL, S_IRUGO);
55 MODULE_PARM_DESC(mem, "I/O memory address");
56
57 module_param_array(indirect, int, NULL, S_IRUGO);
58 MODULE_PARM_DESC(indirect, "Indirect access via address and data port");
59
60 module_param_array(irq, int, NULL, S_IRUGO);
61 MODULE_PARM_DESC(irq, "IRQ number");
62
63 module_param_array(clk, int, NULL, S_IRUGO);
64 MODULE_PARM_DESC(clk, "External oscillator clock frequency "
65 "(default=16000000 [16 MHz])");
66
67 module_param_array(cdr, byte, NULL, S_IRUGO);
68 MODULE_PARM_DESC(cdr, "Clock divider register "
69 "(default=0x48 [CDR_CBP | CDR_CLK_OFF])");
70
71 module_param_array(ocr, byte, NULL, S_IRUGO);
72 MODULE_PARM_DESC(ocr, "Output control register "
73 "(default=0x18 [OCR_TX0_PUSHPULL])");
74
75 #define SJA1000_IOSIZE 0x20
76 #define SJA1000_IOSIZE_INDIRECT 0x02
77
78 static struct platform_device *sja1000_isa_devs[MAXDEV];
79
sja1000_isa_mem_read_reg(const struct sja1000_priv * priv,int reg)80 static u8 sja1000_isa_mem_read_reg(const struct sja1000_priv *priv, int reg)
81 {
82 return readb(priv->reg_base + reg);
83 }
84
sja1000_isa_mem_write_reg(const struct sja1000_priv * priv,int reg,u8 val)85 static void sja1000_isa_mem_write_reg(const struct sja1000_priv *priv,
86 int reg, u8 val)
87 {
88 writeb(val, priv->reg_base + reg);
89 }
90
sja1000_isa_port_read_reg(const struct sja1000_priv * priv,int reg)91 static u8 sja1000_isa_port_read_reg(const struct sja1000_priv *priv, int reg)
92 {
93 return inb((unsigned long)priv->reg_base + reg);
94 }
95
sja1000_isa_port_write_reg(const struct sja1000_priv * priv,int reg,u8 val)96 static void sja1000_isa_port_write_reg(const struct sja1000_priv *priv,
97 int reg, u8 val)
98 {
99 outb(val, (unsigned long)priv->reg_base + reg);
100 }
101
sja1000_isa_port_read_reg_indirect(const struct sja1000_priv * priv,int reg)102 static u8 sja1000_isa_port_read_reg_indirect(const struct sja1000_priv *priv,
103 int reg)
104 {
105 unsigned long base = (unsigned long)priv->reg_base;
106
107 outb(reg, base);
108 return inb(base + 1);
109 }
110
sja1000_isa_port_write_reg_indirect(const struct sja1000_priv * priv,int reg,u8 val)111 static void sja1000_isa_port_write_reg_indirect(const struct sja1000_priv *priv,
112 int reg, u8 val)
113 {
114 unsigned long base = (unsigned long)priv->reg_base;
115
116 outb(reg, base);
117 outb(val, base + 1);
118 }
119
sja1000_isa_probe(struct platform_device * pdev)120 static int __devinit sja1000_isa_probe(struct platform_device *pdev)
121 {
122 struct net_device *dev;
123 struct sja1000_priv *priv;
124 void __iomem *base = NULL;
125 int iosize = SJA1000_IOSIZE;
126 int idx = pdev->id;
127 int err;
128
129 dev_dbg(&pdev->dev, "probing idx=%d: port=%#lx, mem=%#lx, irq=%d\n",
130 idx, port[idx], mem[idx], irq[idx]);
131
132 if (mem[idx]) {
133 if (!request_mem_region(mem[idx], iosize, DRV_NAME)) {
134 err = -EBUSY;
135 goto exit;
136 }
137 base = ioremap_nocache(mem[idx], iosize);
138 if (!base) {
139 err = -ENOMEM;
140 goto exit_release;
141 }
142 } else {
143 if (indirect[idx] > 0 ||
144 (indirect[idx] == -1 && indirect[0] > 0))
145 iosize = SJA1000_IOSIZE_INDIRECT;
146 if (!request_region(port[idx], iosize, DRV_NAME)) {
147 err = -EBUSY;
148 goto exit;
149 }
150 }
151
152 dev = alloc_sja1000dev(0);
153 if (!dev) {
154 err = -ENOMEM;
155 goto exit_unmap;
156 }
157 priv = netdev_priv(dev);
158
159 dev->irq = irq[idx];
160 priv->irq_flags = IRQF_SHARED;
161 if (mem[idx]) {
162 priv->reg_base = base;
163 dev->base_addr = mem[idx];
164 priv->read_reg = sja1000_isa_mem_read_reg;
165 priv->write_reg = sja1000_isa_mem_write_reg;
166 } else {
167 priv->reg_base = (void __iomem *)port[idx];
168 dev->base_addr = port[idx];
169
170 if (iosize == SJA1000_IOSIZE_INDIRECT) {
171 priv->read_reg = sja1000_isa_port_read_reg_indirect;
172 priv->write_reg = sja1000_isa_port_write_reg_indirect;
173 } else {
174 priv->read_reg = sja1000_isa_port_read_reg;
175 priv->write_reg = sja1000_isa_port_write_reg;
176 }
177 }
178
179 if (clk[idx])
180 priv->can.clock.freq = clk[idx] / 2;
181 else if (clk[0])
182 priv->can.clock.freq = clk[0] / 2;
183 else
184 priv->can.clock.freq = CLK_DEFAULT / 2;
185
186 if (ocr[idx] != 0xff)
187 priv->ocr = ocr[idx];
188 else if (ocr[0] != 0xff)
189 priv->ocr = ocr[0];
190 else
191 priv->ocr = OCR_DEFAULT;
192
193 if (cdr[idx] != 0xff)
194 priv->cdr = cdr[idx];
195 else if (cdr[0] != 0xff)
196 priv->cdr = cdr[0];
197 else
198 priv->cdr = CDR_DEFAULT;
199
200 dev_set_drvdata(&pdev->dev, dev);
201 SET_NETDEV_DEV(dev, &pdev->dev);
202
203 err = register_sja1000dev(dev);
204 if (err) {
205 dev_err(&pdev->dev, "registering %s failed (err=%d)\n",
206 DRV_NAME, err);
207 goto exit_unmap;
208 }
209
210 dev_info(&pdev->dev, "%s device registered (reg_base=0x%p, irq=%d)\n",
211 DRV_NAME, priv->reg_base, dev->irq);
212 return 0;
213
214 exit_unmap:
215 if (mem[idx])
216 iounmap(base);
217 exit_release:
218 if (mem[idx])
219 release_mem_region(mem[idx], iosize);
220 else
221 release_region(port[idx], iosize);
222 exit:
223 return err;
224 }
225
sja1000_isa_remove(struct platform_device * pdev)226 static int __devexit sja1000_isa_remove(struct platform_device *pdev)
227 {
228 struct net_device *dev = dev_get_drvdata(&pdev->dev);
229 struct sja1000_priv *priv = netdev_priv(dev);
230 int idx = pdev->id;
231
232 unregister_sja1000dev(dev);
233 dev_set_drvdata(&pdev->dev, NULL);
234
235 if (mem[idx]) {
236 iounmap(priv->reg_base);
237 release_mem_region(mem[idx], SJA1000_IOSIZE);
238 } else {
239 if (priv->read_reg == sja1000_isa_port_read_reg_indirect)
240 release_region(port[idx], SJA1000_IOSIZE_INDIRECT);
241 else
242 release_region(port[idx], SJA1000_IOSIZE);
243 }
244 free_sja1000dev(dev);
245
246 return 0;
247 }
248
249 static struct platform_driver sja1000_isa_driver = {
250 .probe = sja1000_isa_probe,
251 .remove = __devexit_p(sja1000_isa_remove),
252 .driver = {
253 .name = DRV_NAME,
254 .owner = THIS_MODULE,
255 },
256 };
257
sja1000_isa_init(void)258 static int __init sja1000_isa_init(void)
259 {
260 int idx, err;
261
262 for (idx = 0; idx < MAXDEV; idx++) {
263 if ((port[idx] || mem[idx]) && irq[idx]) {
264 sja1000_isa_devs[idx] =
265 platform_device_alloc(DRV_NAME, idx);
266 if (!sja1000_isa_devs[idx]) {
267 err = -ENOMEM;
268 goto exit_free_devices;
269 }
270 err = platform_device_add(sja1000_isa_devs[idx]);
271 if (err) {
272 platform_device_put(sja1000_isa_devs[idx]);
273 goto exit_free_devices;
274 }
275 pr_debug("%s: platform device %d: port=%#lx, mem=%#lx, "
276 "irq=%d\n",
277 DRV_NAME, idx, port[idx], mem[idx], irq[idx]);
278 } else if (idx == 0 || port[idx] || mem[idx]) {
279 pr_err("%s: insufficient parameters supplied\n",
280 DRV_NAME);
281 err = -EINVAL;
282 goto exit_free_devices;
283 }
284 }
285
286 err = platform_driver_register(&sja1000_isa_driver);
287 if (err)
288 goto exit_free_devices;
289
290 pr_info("Legacy %s driver for max. %d devices registered\n",
291 DRV_NAME, MAXDEV);
292
293 return 0;
294
295 exit_free_devices:
296 while (--idx >= 0) {
297 if (sja1000_isa_devs[idx])
298 platform_device_unregister(sja1000_isa_devs[idx]);
299 }
300
301 return err;
302 }
303
sja1000_isa_exit(void)304 static void __exit sja1000_isa_exit(void)
305 {
306 int idx;
307
308 platform_driver_unregister(&sja1000_isa_driver);
309 for (idx = 0; idx < MAXDEV; idx++) {
310 if (sja1000_isa_devs[idx])
311 platform_device_unregister(sja1000_isa_devs[idx]);
312 }
313 }
314
315 module_init(sja1000_isa_init);
316 module_exit(sja1000_isa_exit);
317