1376ac44cSSasha Levin #include "kvm/virtio-rng.h" 2376ac44cSSasha Levin 3376ac44cSSasha Levin #include "kvm/virtio-pci.h" 4376ac44cSSasha Levin 5376ac44cSSasha Levin #include "kvm/disk-image.h" 6376ac44cSSasha Levin #include "kvm/virtio.h" 7376ac44cSSasha Levin #include "kvm/ioport.h" 8376ac44cSSasha Levin #include "kvm/mutex.h" 9376ac44cSSasha Levin #include "kvm/util.h" 10376ac44cSSasha Levin #include "kvm/kvm.h" 11376ac44cSSasha Levin #include "kvm/pci.h" 12376ac44cSSasha Levin #include "kvm/threadpool.h" 13376ac44cSSasha Levin 14376ac44cSSasha Levin #include <linux/virtio_ring.h> 15376ac44cSSasha Levin #include <linux/virtio_rng.h> 16376ac44cSSasha Levin 17376ac44cSSasha Levin #include <fcntl.h> 18376ac44cSSasha Levin #include <sys/types.h> 19376ac44cSSasha Levin #include <sys/stat.h> 20376ac44cSSasha Levin #include <pthread.h> 21376ac44cSSasha Levin 22376ac44cSSasha Levin #define PCI_VENDOR_ID_REDHAT_QUMRANET 0x1af4 23376ac44cSSasha Levin #define PCI_DEVICE_ID_VIRTIO_RNG 0x1004 24376ac44cSSasha Levin #define PCI_SUBSYSTEM_VENDOR_ID_REDHAT_QUMRANET 0x1af4 25376ac44cSSasha Levin #define PCI_SUBSYSTEM_ID_VIRTIO_RNG 0x0004 26376ac44cSSasha Levin #define PCI_VIRTIO_RNG_DEVNUM 4 27376ac44cSSasha Levin 28376ac44cSSasha Levin #define VIRTIO_RNG_IRQ 11 29376ac44cSSasha Levin #define VIRTIO_RNG_PIN 1 30376ac44cSSasha Levin 31376ac44cSSasha Levin #define NUM_VIRT_QUEUES 1 32376ac44cSSasha Levin #define VIRTIO_RNG_QUEUE_SIZE 128 33376ac44cSSasha Levin 3480ffe4d1SSasha Levin struct rng_dev { 353fdf659dSSasha Levin u8 status; 363fdf659dSSasha Levin u16 config_vector; 3780ffe4d1SSasha Levin int fd; 38376ac44cSSasha Levin 39376ac44cSSasha Levin /* virtio queue */ 403fdf659dSSasha Levin u16 queue_selector; 41376ac44cSSasha Levin struct virt_queue vqs[NUM_VIRT_QUEUES]; 42376ac44cSSasha Levin void *jobs[NUM_VIRT_QUEUES]; 43376ac44cSSasha Levin }; 44376ac44cSSasha Levin 4580ffe4d1SSasha Levin static struct rng_dev rdev; 46376ac44cSSasha Levin 473fdf659dSSasha Levin static bool virtio_rng_pci_io_in(struct kvm *kvm, u16 port, void *data, int size, u32 count) 48376ac44cSSasha Levin { 49376ac44cSSasha Levin unsigned long offset; 50376ac44cSSasha Levin bool ret = true; 51376ac44cSSasha Levin 52376ac44cSSasha Levin offset = port - IOPORT_VIRTIO_RNG; 53376ac44cSSasha Levin 54376ac44cSSasha Levin switch (offset) { 55376ac44cSSasha Levin case VIRTIO_PCI_HOST_FEATURES: 56376ac44cSSasha Levin case VIRTIO_PCI_GUEST_FEATURES: 57376ac44cSSasha Levin case VIRTIO_PCI_QUEUE_SEL: 58376ac44cSSasha Levin case VIRTIO_PCI_QUEUE_NOTIFY: 59376ac44cSSasha Levin ret = false; 60376ac44cSSasha Levin break; 61376ac44cSSasha Levin case VIRTIO_PCI_QUEUE_PFN: 6280ffe4d1SSasha Levin ioport__write32(data, rdev.vqs[rdev.queue_selector].pfn); 63376ac44cSSasha Levin break; 64376ac44cSSasha Levin case VIRTIO_PCI_QUEUE_NUM: 65376ac44cSSasha Levin ioport__write16(data, VIRTIO_RNG_QUEUE_SIZE); 66376ac44cSSasha Levin break; 67376ac44cSSasha Levin case VIRTIO_PCI_STATUS: 6880ffe4d1SSasha Levin ioport__write8(data, rdev.status); 69376ac44cSSasha Levin break; 70376ac44cSSasha Levin case VIRTIO_PCI_ISR: 71376ac44cSSasha Levin ioport__write8(data, 0x1); 72376ac44cSSasha Levin kvm__irq_line(kvm, VIRTIO_RNG_IRQ, 0); 73376ac44cSSasha Levin break; 74376ac44cSSasha Levin case VIRTIO_MSI_CONFIG_VECTOR: 7580ffe4d1SSasha Levin ioport__write16(data, rdev.config_vector); 76376ac44cSSasha Levin break; 77376ac44cSSasha Levin default: 78376ac44cSSasha Levin ret = false; 79*407475bfSPekka Enberg break; 80376ac44cSSasha Levin }; 81376ac44cSSasha Levin 82376ac44cSSasha Levin return ret; 83376ac44cSSasha Levin } 84376ac44cSSasha Levin 8580ffe4d1SSasha Levin static bool virtio_rng_do_io_request(struct kvm *kvm, struct virt_queue *queue) 86376ac44cSSasha Levin { 87376ac44cSSasha Levin struct iovec iov[VIRTIO_RNG_QUEUE_SIZE]; 88376ac44cSSasha Levin unsigned int len = 0; 89*407475bfSPekka Enberg u16 out, in, head; 90376ac44cSSasha Levin 9180ffe4d1SSasha Levin head = virt_queue__get_iov(queue, iov, &out, &in, kvm); 9280ffe4d1SSasha Levin len = readv(rdev.fd, iov, in); 93*407475bfSPekka Enberg 94376ac44cSSasha Levin virt_queue__set_used_elem(queue, head, len); 95376ac44cSSasha Levin 96376ac44cSSasha Levin return true; 97376ac44cSSasha Levin } 98376ac44cSSasha Levin 99376ac44cSSasha Levin static void virtio_rng_do_io(struct kvm *kvm, void *param) 100376ac44cSSasha Levin { 101376ac44cSSasha Levin struct virt_queue *vq = param; 102376ac44cSSasha Levin 103376ac44cSSasha Levin while (virt_queue__available(vq)) { 104376ac44cSSasha Levin virtio_rng_do_io_request(kvm, vq); 105376ac44cSSasha Levin kvm__irq_line(kvm, VIRTIO_RNG_IRQ, 1); 106376ac44cSSasha Levin } 107376ac44cSSasha Levin } 108376ac44cSSasha Levin 1093fdf659dSSasha Levin static bool virtio_rng_pci_io_out(struct kvm *kvm, u16 port, void *data, int size, u32 count) 110376ac44cSSasha Levin { 111376ac44cSSasha Levin unsigned long offset; 112376ac44cSSasha Levin bool ret = true; 113376ac44cSSasha Levin 114376ac44cSSasha Levin offset = port - IOPORT_VIRTIO_RNG; 115376ac44cSSasha Levin 116376ac44cSSasha Levin switch (offset) { 117376ac44cSSasha Levin case VIRTIO_MSI_QUEUE_VECTOR: 118376ac44cSSasha Levin case VIRTIO_PCI_GUEST_FEATURES: 119376ac44cSSasha Levin break; 120376ac44cSSasha Levin case VIRTIO_PCI_QUEUE_PFN: { 121376ac44cSSasha Levin struct virt_queue *queue; 122376ac44cSSasha Levin void *p; 123376ac44cSSasha Levin 12480ffe4d1SSasha Levin queue = &rdev.vqs[rdev.queue_selector]; 125376ac44cSSasha Levin queue->pfn = ioport__read32(data); 126376ac44cSSasha Levin p = guest_flat_to_host(kvm, queue->pfn << 12); 127376ac44cSSasha Levin 128376ac44cSSasha Levin vring_init(&queue->vring, VIRTIO_RNG_QUEUE_SIZE, p, 4096); 129376ac44cSSasha Levin 130*407475bfSPekka Enberg rdev.jobs[rdev.queue_selector] = thread_pool__add_job(kvm, virtio_rng_do_io, queue); 131376ac44cSSasha Levin 132376ac44cSSasha Levin break; 133376ac44cSSasha Levin } 134376ac44cSSasha Levin case VIRTIO_PCI_QUEUE_SEL: 13580ffe4d1SSasha Levin rdev.queue_selector = ioport__read16(data); 136376ac44cSSasha Levin break; 137376ac44cSSasha Levin case VIRTIO_PCI_QUEUE_NOTIFY: { 1383fdf659dSSasha Levin u16 queue_index; 139376ac44cSSasha Levin queue_index = ioport__read16(data); 14080ffe4d1SSasha Levin thread_pool__do_job(rdev.jobs[queue_index]); 141376ac44cSSasha Levin break; 142376ac44cSSasha Levin } 143376ac44cSSasha Levin case VIRTIO_PCI_STATUS: 14480ffe4d1SSasha Levin rdev.status = ioport__read8(data); 145376ac44cSSasha Levin break; 146376ac44cSSasha Levin case VIRTIO_MSI_CONFIG_VECTOR: 14780ffe4d1SSasha Levin rdev.config_vector = VIRTIO_MSI_NO_VECTOR; 148376ac44cSSasha Levin break; 149376ac44cSSasha Levin default: 150376ac44cSSasha Levin ret = false; 151*407475bfSPekka Enberg break; 152376ac44cSSasha Levin }; 153376ac44cSSasha Levin 154376ac44cSSasha Levin return ret; 155376ac44cSSasha Levin } 156376ac44cSSasha Levin 157376ac44cSSasha Levin static struct ioport_operations virtio_rng_io_ops = { 158376ac44cSSasha Levin .io_in = virtio_rng_pci_io_in, 159376ac44cSSasha Levin .io_out = virtio_rng_pci_io_out, 160376ac44cSSasha Levin }; 161376ac44cSSasha Levin 162376ac44cSSasha Levin static struct pci_device_header virtio_rng_pci_device = { 163376ac44cSSasha Levin .vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET, 164376ac44cSSasha Levin .device_id = PCI_DEVICE_ID_VIRTIO_RNG, 165376ac44cSSasha Levin .header_type = PCI_HEADER_TYPE_NORMAL, 166376ac44cSSasha Levin .revision_id = 0, 167376ac44cSSasha Levin .class = 0x010000, 168376ac44cSSasha Levin .subsys_vendor_id = PCI_SUBSYSTEM_VENDOR_ID_REDHAT_QUMRANET, 169376ac44cSSasha Levin .subsys_id = PCI_SUBSYSTEM_ID_VIRTIO_RNG, 170376ac44cSSasha Levin .bar[0] = IOPORT_VIRTIO_RNG | PCI_BASE_ADDRESS_SPACE_IO, 171376ac44cSSasha Levin .irq_pin = VIRTIO_RNG_PIN, 172376ac44cSSasha Levin .irq_line = VIRTIO_RNG_IRQ, 173376ac44cSSasha Levin }; 174376ac44cSSasha Levin 175376ac44cSSasha Levin void virtio_rng__init(struct kvm *kvm) 176376ac44cSSasha Levin { 17780ffe4d1SSasha Levin rdev.fd = open("/dev/urandom", O_RDONLY); 17880ffe4d1SSasha Levin if (rdev.fd < 0) 179376ac44cSSasha Levin die("Failed initializing RNG"); 180376ac44cSSasha Levin 181376ac44cSSasha Levin pci__register(&virtio_rng_pci_device, PCI_VIRTIO_RNG_DEVNUM); 182376ac44cSSasha Levin 183376ac44cSSasha Levin ioport__register(IOPORT_VIRTIO_RNG, &virtio_rng_io_ops, IOPORT_VIRTIO_RNG_SIZE); 184376ac44cSSasha Levin } 185