1 #include "kvm/virtio-pci.h" 2 3 #include "kvm/ioport.h" 4 #include "kvm/kvm.h" 5 #include "kvm/kvm-cpu.h" 6 #include "kvm/virtio-pci-dev.h" 7 #include "kvm/irq.h" 8 #include "kvm/virtio.h" 9 #include "kvm/ioeventfd.h" 10 #include "kvm/util.h" 11 12 #include <sys/ioctl.h> 13 #include <linux/virtio_pci.h> 14 #include <linux/byteorder.h> 15 #include <assert.h> 16 #include <string.h> 17 18 #define ALIGN_UP(x, s) ALIGN((x) + (s) - 1, (s)) 19 #define VIRTIO_NR_MSIX (VIRTIO_PCI_MAX_VQ + VIRTIO_PCI_MAX_CONFIG) 20 #define VIRTIO_MSIX_TABLE_SIZE (VIRTIO_NR_MSIX * 16) 21 #define VIRTIO_MSIX_PBA_SIZE (ALIGN_UP(VIRTIO_MSIX_TABLE_SIZE, 64) / 8) 22 #define VIRTIO_MSIX_BAR_SIZE (1UL << fls_long(VIRTIO_MSIX_TABLE_SIZE + \ 23 VIRTIO_MSIX_PBA_SIZE)) 24 25 static u16 virtio_pci__port_addr(struct virtio_pci *vpci) 26 { 27 return pci__bar_address(&vpci->pci_hdr, 0); 28 } 29 30 static u32 virtio_pci__mmio_addr(struct virtio_pci *vpci) 31 { 32 return pci__bar_address(&vpci->pci_hdr, 1); 33 } 34 35 static u32 virtio_pci__msix_io_addr(struct virtio_pci *vpci) 36 { 37 return pci__bar_address(&vpci->pci_hdr, 2); 38 } 39 40 static int virtio_pci__add_msix_route(struct virtio_pci *vpci, u32 vec) 41 { 42 int gsi; 43 struct msi_msg *msg; 44 45 if (vec == VIRTIO_MSI_NO_VECTOR) 46 return -EINVAL; 47 48 msg = &vpci->msix_table[vec].msg; 49 gsi = irq__add_msix_route(vpci->kvm, msg, vpci->dev_hdr.dev_num << 3); 50 /* 51 * We don't need IRQ routing if we can use 52 * MSI injection via the KVM_SIGNAL_MSI ioctl. 53 */ 54 if (gsi == -ENXIO && vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 55 return gsi; 56 57 if (gsi < 0) 58 die("failed to configure MSIs"); 59 60 return gsi; 61 } 62 63 static void virtio_pci__del_msix_route(struct virtio_pci *vpci, u32 gsi) 64 { 65 struct msi_msg msg = { 0 }; 66 67 irq__update_msix_route(vpci->kvm, gsi, &msg); 68 } 69 70 static void virtio_pci__ioevent_callback(struct kvm *kvm, void *param) 71 { 72 struct virtio_pci_ioevent_param *ioeventfd = param; 73 struct virtio_pci *vpci = ioeventfd->vdev->virtio; 74 75 ioeventfd->vdev->ops->notify_vq(kvm, vpci->dev, ioeventfd->vq); 76 } 77 78 static int virtio_pci__init_ioeventfd(struct kvm *kvm, struct virtio_device *vdev, u32 vq) 79 { 80 struct ioevent ioevent; 81 struct virtio_pci *vpci = vdev->virtio; 82 u32 mmio_addr = virtio_pci__mmio_addr(vpci); 83 u16 port_addr = virtio_pci__port_addr(vpci); 84 int r, flags = 0; 85 int fd; 86 87 vpci->ioeventfds[vq] = (struct virtio_pci_ioevent_param) { 88 .vdev = vdev, 89 .vq = vq, 90 }; 91 92 ioevent = (struct ioevent) { 93 .fn = virtio_pci__ioevent_callback, 94 .fn_ptr = &vpci->ioeventfds[vq], 95 .datamatch = vq, 96 .fn_kvm = kvm, 97 }; 98 99 /* 100 * Vhost will poll the eventfd in host kernel side, otherwise we 101 * need to poll in userspace. 102 */ 103 if (!vdev->use_vhost) 104 flags |= IOEVENTFD_FLAG_USER_POLL; 105 106 /* ioport */ 107 ioevent.io_addr = port_addr + VIRTIO_PCI_QUEUE_NOTIFY; 108 ioevent.io_len = sizeof(u16); 109 ioevent.fd = fd = eventfd(0, 0); 110 r = ioeventfd__add_event(&ioevent, flags | IOEVENTFD_FLAG_PIO); 111 if (r) 112 return r; 113 114 /* mmio */ 115 ioevent.io_addr = mmio_addr + VIRTIO_PCI_QUEUE_NOTIFY; 116 ioevent.io_len = sizeof(u16); 117 ioevent.fd = eventfd(0, 0); 118 r = ioeventfd__add_event(&ioevent, flags); 119 if (r) 120 goto free_ioport_evt; 121 122 if (vdev->ops->notify_vq_eventfd) 123 vdev->ops->notify_vq_eventfd(kvm, vpci->dev, vq, fd); 124 return 0; 125 126 free_ioport_evt: 127 ioeventfd__del_event(port_addr + VIRTIO_PCI_QUEUE_NOTIFY, vq); 128 return r; 129 } 130 131 static int virtio_pci_init_vq(struct kvm *kvm, struct virtio_device *vdev, 132 int vq) 133 { 134 int ret; 135 struct virtio_pci *vpci = vdev->virtio; 136 137 ret = virtio_pci__init_ioeventfd(kvm, vdev, vq); 138 if (ret) { 139 pr_err("couldn't add ioeventfd for vq %d: %d", vq, ret); 140 return ret; 141 } 142 return vdev->ops->init_vq(kvm, vpci->dev, vq); 143 } 144 145 static void virtio_pci_exit_vq(struct kvm *kvm, struct virtio_device *vdev, 146 int vq) 147 { 148 struct virtio_pci *vpci = vdev->virtio; 149 u32 mmio_addr = virtio_pci__mmio_addr(vpci); 150 u16 port_addr = virtio_pci__port_addr(vpci); 151 152 virtio_pci__del_msix_route(vpci, vpci->gsis[vq]); 153 vpci->gsis[vq] = 0; 154 vpci->vq_vector[vq] = VIRTIO_MSI_NO_VECTOR; 155 ioeventfd__del_event(mmio_addr + VIRTIO_PCI_QUEUE_NOTIFY, vq); 156 ioeventfd__del_event(port_addr + VIRTIO_PCI_QUEUE_NOTIFY, vq); 157 virtio_exit_vq(kvm, vdev, vpci->dev, vq); 158 } 159 160 static inline bool virtio_pci__msix_enabled(struct virtio_pci *vpci) 161 { 162 return vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_ENABLE); 163 } 164 165 static bool virtio_pci__specific_data_in(struct kvm *kvm, struct virtio_device *vdev, 166 void *data, u32 size, unsigned long offset) 167 { 168 u32 config_offset; 169 struct virtio_pci *vpci = vdev->virtio; 170 int type = virtio__get_dev_specific_field(offset - 20, 171 virtio_pci__msix_enabled(vpci), 172 &config_offset); 173 if (type == VIRTIO_PCI_O_MSIX) { 174 switch (offset) { 175 case VIRTIO_MSI_CONFIG_VECTOR: 176 ioport__write16(data, vpci->config_vector); 177 break; 178 case VIRTIO_MSI_QUEUE_VECTOR: 179 ioport__write16(data, vpci->vq_vector[vpci->queue_selector]); 180 break; 181 }; 182 183 return true; 184 } else if (type == VIRTIO_PCI_O_CONFIG) { 185 return virtio_access_config(kvm, vdev, vpci->dev, config_offset, 186 data, size, false); 187 } 188 189 return false; 190 } 191 192 static bool virtio_pci__data_in(struct kvm_cpu *vcpu, struct virtio_device *vdev, 193 unsigned long offset, void *data, u32 size) 194 { 195 bool ret = true; 196 struct virtio_pci *vpci; 197 struct virt_queue *vq; 198 struct kvm *kvm; 199 u32 val; 200 201 kvm = vcpu->kvm; 202 vpci = vdev->virtio; 203 204 switch (offset) { 205 case VIRTIO_PCI_HOST_FEATURES: 206 val = vdev->ops->get_host_features(kvm, vpci->dev); 207 ioport__write32(data, val); 208 break; 209 case VIRTIO_PCI_QUEUE_PFN: 210 vq = vdev->ops->get_vq(kvm, vpci->dev, vpci->queue_selector); 211 ioport__write32(data, vq->vring_addr.pfn); 212 break; 213 case VIRTIO_PCI_QUEUE_NUM: 214 val = vdev->ops->get_size_vq(kvm, vpci->dev, vpci->queue_selector); 215 ioport__write16(data, val); 216 break; 217 case VIRTIO_PCI_STATUS: 218 ioport__write8(data, vpci->status); 219 break; 220 case VIRTIO_PCI_ISR: 221 ioport__write8(data, vpci->isr); 222 kvm__irq_line(kvm, vpci->legacy_irq_line, VIRTIO_IRQ_LOW); 223 vpci->isr = VIRTIO_IRQ_LOW; 224 break; 225 default: 226 ret = virtio_pci__specific_data_in(kvm, vdev, data, size, offset); 227 break; 228 }; 229 230 return ret; 231 } 232 233 static void update_msix_map(struct virtio_pci *vpci, 234 struct msix_table *msix_entry, u32 vecnum) 235 { 236 u32 gsi, i; 237 238 /* Find the GSI number used for that vector */ 239 if (vecnum == vpci->config_vector) { 240 gsi = vpci->config_gsi; 241 } else { 242 for (i = 0; i < VIRTIO_PCI_MAX_VQ; i++) 243 if (vpci->vq_vector[i] == vecnum) 244 break; 245 if (i == VIRTIO_PCI_MAX_VQ) 246 return; 247 gsi = vpci->gsis[i]; 248 } 249 250 if (gsi == 0) 251 return; 252 253 msix_entry = &msix_entry[vecnum]; 254 irq__update_msix_route(vpci->kvm, gsi, &msix_entry->msg); 255 } 256 257 static bool virtio_pci__specific_data_out(struct kvm *kvm, struct virtio_device *vdev, 258 void *data, u32 size, unsigned long offset) 259 { 260 struct virtio_pci *vpci = vdev->virtio; 261 u32 config_offset, vec; 262 int gsi; 263 int type = virtio__get_dev_specific_field(offset - 20, virtio_pci__msix_enabled(vpci), 264 &config_offset); 265 if (type == VIRTIO_PCI_O_MSIX) { 266 switch (offset) { 267 case VIRTIO_MSI_CONFIG_VECTOR: 268 vec = vpci->config_vector = ioport__read16(data); 269 270 gsi = virtio_pci__add_msix_route(vpci, vec); 271 if (gsi < 0) 272 break; 273 274 vpci->config_gsi = gsi; 275 break; 276 case VIRTIO_MSI_QUEUE_VECTOR: 277 vec = ioport__read16(data); 278 vpci->vq_vector[vpci->queue_selector] = vec; 279 280 gsi = virtio_pci__add_msix_route(vpci, vec); 281 if (gsi < 0) 282 break; 283 284 vpci->gsis[vpci->queue_selector] = gsi; 285 if (vdev->ops->notify_vq_gsi) 286 vdev->ops->notify_vq_gsi(kvm, vpci->dev, 287 vpci->queue_selector, 288 gsi); 289 break; 290 }; 291 292 return true; 293 } else if (type == VIRTIO_PCI_O_CONFIG) { 294 return virtio_access_config(kvm, vdev, vpci->dev, config_offset, 295 data, size, true); 296 } 297 298 return false; 299 } 300 301 static bool virtio_pci__data_out(struct kvm_cpu *vcpu, struct virtio_device *vdev, 302 unsigned long offset, void *data, u32 size) 303 { 304 bool ret = true; 305 struct virtio_pci *vpci; 306 struct virt_queue *vq; 307 struct kvm *kvm; 308 u32 val; 309 unsigned int vq_count; 310 311 kvm = vcpu->kvm; 312 vpci = vdev->virtio; 313 vq_count = vdev->ops->get_vq_count(kvm, vpci->dev); 314 315 switch (offset) { 316 case VIRTIO_PCI_GUEST_FEATURES: 317 val = ioport__read32(data); 318 virtio_set_guest_features(kvm, vdev, vpci->dev, val); 319 break; 320 case VIRTIO_PCI_QUEUE_PFN: 321 val = ioport__read32(data); 322 if (val) { 323 vq = vdev->ops->get_vq(kvm, vpci->dev, 324 vpci->queue_selector); 325 vq->vring_addr = (struct vring_addr) { 326 .legacy = true, 327 .pfn = val, 328 .align = VIRTIO_PCI_VRING_ALIGN, 329 .pgsize = 1 << VIRTIO_PCI_QUEUE_ADDR_SHIFT, 330 }; 331 virtio_pci_init_vq(kvm, vdev, vpci->queue_selector); 332 } else { 333 virtio_pci_exit_vq(kvm, vdev, vpci->queue_selector); 334 } 335 break; 336 case VIRTIO_PCI_QUEUE_SEL: 337 val = ioport__read16(data); 338 if (val >= vq_count) { 339 WARN_ONCE(1, "QUEUE_SEL value (%u) is larger than VQ count (%u)\n", 340 val, vq_count); 341 return false; 342 } 343 vpci->queue_selector = val; 344 break; 345 case VIRTIO_PCI_QUEUE_NOTIFY: 346 val = ioport__read16(data); 347 if (val >= vq_count) { 348 WARN_ONCE(1, "QUEUE_SEL value (%u) is larger than VQ count (%u)\n", 349 val, vq_count); 350 return false; 351 } 352 vdev->ops->notify_vq(kvm, vpci->dev, val); 353 break; 354 case VIRTIO_PCI_STATUS: 355 vpci->status = ioport__read8(data); 356 if (!vpci->status) /* Sample endianness on reset */ 357 vdev->endian = kvm_cpu__get_endianness(vcpu); 358 virtio_notify_status(kvm, vdev, vpci->dev, vpci->status); 359 break; 360 default: 361 ret = virtio_pci__specific_data_out(kvm, vdev, data, size, offset); 362 break; 363 }; 364 365 return ret; 366 } 367 368 static void virtio_pci__msix_mmio_callback(struct kvm_cpu *vcpu, 369 u64 addr, u8 *data, u32 len, 370 u8 is_write, void *ptr) 371 { 372 struct virtio_device *vdev = ptr; 373 struct virtio_pci *vpci = vdev->virtio; 374 struct msix_table *table; 375 u32 msix_io_addr = virtio_pci__msix_io_addr(vpci); 376 u32 pba_offset; 377 int vecnum; 378 size_t offset; 379 380 BUILD_BUG_ON(VIRTIO_NR_MSIX > (sizeof(vpci->msix_pba) * 8)); 381 382 pba_offset = vpci->pci_hdr.msix.pba_offset & ~PCI_MSIX_TABLE_BIR; 383 if (addr >= msix_io_addr + pba_offset) { 384 /* Read access to PBA */ 385 if (is_write) 386 return; 387 offset = addr - (msix_io_addr + pba_offset); 388 if ((offset + len) > sizeof (vpci->msix_pba)) 389 return; 390 memcpy(data, (void *)&vpci->msix_pba + offset, len); 391 return; 392 } 393 394 table = vpci->msix_table; 395 offset = addr - msix_io_addr; 396 397 vecnum = offset / sizeof(struct msix_table); 398 offset = offset % sizeof(struct msix_table); 399 400 if (!is_write) { 401 memcpy(data, (void *)&table[vecnum] + offset, len); 402 return; 403 } 404 405 memcpy((void *)&table[vecnum] + offset, data, len); 406 407 /* Did we just update the address or payload? */ 408 if (offset < offsetof(struct msix_table, ctrl)) 409 update_msix_map(vpci, table, vecnum); 410 } 411 412 static void virtio_pci__signal_msi(struct kvm *kvm, struct virtio_pci *vpci, 413 int vec) 414 { 415 struct kvm_msi msi = { 416 .address_lo = vpci->msix_table[vec].msg.address_lo, 417 .address_hi = vpci->msix_table[vec].msg.address_hi, 418 .data = vpci->msix_table[vec].msg.data, 419 }; 420 421 if (kvm->msix_needs_devid) { 422 msi.flags = KVM_MSI_VALID_DEVID; 423 msi.devid = vpci->dev_hdr.dev_num << 3; 424 } 425 426 irq__signal_msi(kvm, &msi); 427 } 428 429 int virtio_pci__signal_vq(struct kvm *kvm, struct virtio_device *vdev, u32 vq) 430 { 431 struct virtio_pci *vpci = vdev->virtio; 432 int tbl = vpci->vq_vector[vq]; 433 434 if (virtio_pci__msix_enabled(vpci) && tbl != VIRTIO_MSI_NO_VECTOR) { 435 if (vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_MASKALL) || 436 vpci->msix_table[tbl].ctrl & cpu_to_le16(PCI_MSIX_ENTRY_CTRL_MASKBIT)) { 437 438 vpci->msix_pba |= 1 << tbl; 439 return 0; 440 } 441 442 if (vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 443 virtio_pci__signal_msi(kvm, vpci, vpci->vq_vector[vq]); 444 else 445 kvm__irq_trigger(kvm, vpci->gsis[vq]); 446 } else { 447 vpci->isr = VIRTIO_IRQ_HIGH; 448 kvm__irq_line(kvm, vpci->legacy_irq_line, VIRTIO_IRQ_HIGH); 449 } 450 return 0; 451 } 452 453 int virtio_pci__signal_config(struct kvm *kvm, struct virtio_device *vdev) 454 { 455 struct virtio_pci *vpci = vdev->virtio; 456 int tbl = vpci->config_vector; 457 458 if (virtio_pci__msix_enabled(vpci) && tbl != VIRTIO_MSI_NO_VECTOR) { 459 if (vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_MASKALL) || 460 vpci->msix_table[tbl].ctrl & cpu_to_le16(PCI_MSIX_ENTRY_CTRL_MASKBIT)) { 461 462 vpci->msix_pba |= 1 << tbl; 463 return 0; 464 } 465 466 if (vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 467 virtio_pci__signal_msi(kvm, vpci, tbl); 468 else 469 kvm__irq_trigger(kvm, vpci->config_gsi); 470 } else { 471 vpci->isr = VIRTIO_PCI_ISR_CONFIG; 472 kvm__irq_trigger(kvm, vpci->legacy_irq_line); 473 } 474 475 return 0; 476 } 477 478 static void virtio_pci__io_mmio_callback(struct kvm_cpu *vcpu, 479 u64 addr, u8 *data, u32 len, 480 u8 is_write, void *ptr) 481 { 482 struct virtio_device *vdev = ptr; 483 struct virtio_pci *vpci = vdev->virtio; 484 u32 ioport_addr = virtio_pci__port_addr(vpci); 485 u32 base_addr; 486 487 if (addr >= ioport_addr && 488 addr < ioport_addr + pci__bar_size(&vpci->pci_hdr, 0)) 489 base_addr = ioport_addr; 490 else 491 base_addr = virtio_pci__mmio_addr(vpci); 492 493 if (!is_write) 494 virtio_pci__data_in(vcpu, vdev, addr - base_addr, data, len); 495 else 496 virtio_pci__data_out(vcpu, vdev, addr - base_addr, data, len); 497 } 498 499 static int virtio_pci__bar_activate(struct kvm *kvm, 500 struct pci_device_header *pci_hdr, 501 int bar_num, void *data) 502 { 503 struct virtio_device *vdev = data; 504 u32 bar_addr, bar_size; 505 int r = -EINVAL; 506 507 assert(bar_num <= 2); 508 509 bar_addr = pci__bar_address(pci_hdr, bar_num); 510 bar_size = pci__bar_size(pci_hdr, bar_num); 511 512 switch (bar_num) { 513 case 0: 514 r = kvm__register_pio(kvm, bar_addr, bar_size, 515 virtio_pci__io_mmio_callback, vdev); 516 break; 517 case 1: 518 r = kvm__register_mmio(kvm, bar_addr, bar_size, false, 519 virtio_pci__io_mmio_callback, vdev); 520 break; 521 case 2: 522 r = kvm__register_mmio(kvm, bar_addr, bar_size, false, 523 virtio_pci__msix_mmio_callback, vdev); 524 break; 525 } 526 527 return r; 528 } 529 530 static int virtio_pci__bar_deactivate(struct kvm *kvm, 531 struct pci_device_header *pci_hdr, 532 int bar_num, void *data) 533 { 534 u32 bar_addr; 535 bool success; 536 int r = -EINVAL; 537 538 assert(bar_num <= 2); 539 540 bar_addr = pci__bar_address(pci_hdr, bar_num); 541 542 switch (bar_num) { 543 case 0: 544 r = kvm__deregister_pio(kvm, bar_addr); 545 break; 546 case 1: 547 case 2: 548 success = kvm__deregister_mmio(kvm, bar_addr); 549 /* kvm__deregister_mmio fails when the region is not found. */ 550 r = (success ? 0 : -ENOENT); 551 break; 552 } 553 554 return r; 555 } 556 557 int virtio_pci__init(struct kvm *kvm, void *dev, struct virtio_device *vdev, 558 int device_id, int subsys_id, int class) 559 { 560 struct virtio_pci *vpci = vdev->virtio; 561 u32 mmio_addr, msix_io_block; 562 u16 port_addr; 563 int r; 564 565 vpci->kvm = kvm; 566 vpci->dev = dev; 567 568 BUILD_BUG_ON(!is_power_of_two(PCI_IO_SIZE)); 569 570 port_addr = pci_get_io_port_block(PCI_IO_SIZE); 571 mmio_addr = pci_get_mmio_block(PCI_IO_SIZE); 572 msix_io_block = pci_get_mmio_block(VIRTIO_MSIX_BAR_SIZE); 573 574 vpci->pci_hdr = (struct pci_device_header) { 575 .vendor_id = cpu_to_le16(PCI_VENDOR_ID_REDHAT_QUMRANET), 576 .device_id = cpu_to_le16(device_id), 577 .command = PCI_COMMAND_IO | PCI_COMMAND_MEMORY, 578 .header_type = PCI_HEADER_TYPE_NORMAL, 579 .revision_id = 0, 580 .class[0] = class & 0xff, 581 .class[1] = (class >> 8) & 0xff, 582 .class[2] = (class >> 16) & 0xff, 583 .subsys_vendor_id = cpu_to_le16(PCI_SUBSYSTEM_VENDOR_ID_REDHAT_QUMRANET), 584 .subsys_id = cpu_to_le16(subsys_id), 585 .bar[0] = cpu_to_le32(port_addr 586 | PCI_BASE_ADDRESS_SPACE_IO), 587 .bar[1] = cpu_to_le32(mmio_addr 588 | PCI_BASE_ADDRESS_SPACE_MEMORY), 589 .bar[2] = cpu_to_le32(msix_io_block 590 | PCI_BASE_ADDRESS_SPACE_MEMORY), 591 .status = cpu_to_le16(PCI_STATUS_CAP_LIST), 592 .capabilities = (void *)&vpci->pci_hdr.msix - (void *)&vpci->pci_hdr, 593 .bar_size[0] = cpu_to_le32(PCI_IO_SIZE), 594 .bar_size[1] = cpu_to_le32(PCI_IO_SIZE), 595 .bar_size[2] = cpu_to_le32(VIRTIO_MSIX_BAR_SIZE), 596 }; 597 598 r = pci__register_bar_regions(kvm, &vpci->pci_hdr, 599 virtio_pci__bar_activate, 600 virtio_pci__bar_deactivate, vdev); 601 if (r < 0) 602 return r; 603 604 vpci->dev_hdr = (struct device_header) { 605 .bus_type = DEVICE_BUS_PCI, 606 .data = &vpci->pci_hdr, 607 }; 608 609 vpci->pci_hdr.msix.cap = PCI_CAP_ID_MSIX; 610 vpci->pci_hdr.msix.next = 0; 611 /* 612 * We at most have VIRTIO_NR_MSIX entries (VIRTIO_PCI_MAX_VQ 613 * entries for virt queue, VIRTIO_PCI_MAX_CONFIG entries for 614 * config). 615 * 616 * To quote the PCI spec: 617 * 618 * System software reads this field to determine the 619 * MSI-X Table Size N, which is encoded as N-1. 620 * For example, a returned value of "00000000011" 621 * indicates a table size of 4. 622 */ 623 vpci->pci_hdr.msix.ctrl = cpu_to_le16(VIRTIO_NR_MSIX - 1); 624 625 /* Both table and PBA are mapped to the same BAR (2) */ 626 vpci->pci_hdr.msix.table_offset = cpu_to_le32(2); 627 vpci->pci_hdr.msix.pba_offset = cpu_to_le32(2 | VIRTIO_MSIX_TABLE_SIZE); 628 vpci->config_vector = 0; 629 630 if (irq__can_signal_msi(kvm)) 631 vpci->features |= VIRTIO_PCI_F_SIGNAL_MSI; 632 633 vpci->legacy_irq_line = pci__assign_irq(&vpci->pci_hdr); 634 635 r = device__register(&vpci->dev_hdr); 636 if (r < 0) 637 return r; 638 639 return 0; 640 } 641 642 int virtio_pci__reset(struct kvm *kvm, struct virtio_device *vdev) 643 { 644 unsigned int vq; 645 struct virtio_pci *vpci = vdev->virtio; 646 647 virtio_pci__del_msix_route(vpci, vpci->config_gsi); 648 vpci->config_gsi = 0; 649 vpci->config_vector = VIRTIO_MSI_NO_VECTOR; 650 651 for (vq = 0; vq < vdev->ops->get_vq_count(kvm, vpci->dev); vq++) 652 virtio_pci_exit_vq(kvm, vdev, vq); 653 654 return 0; 655 } 656 657 int virtio_pci__exit(struct kvm *kvm, struct virtio_device *vdev) 658 { 659 struct virtio_pci *vpci = vdev->virtio; 660 661 virtio_pci__reset(kvm, vdev); 662 kvm__deregister_mmio(kvm, virtio_pci__mmio_addr(vpci)); 663 kvm__deregister_mmio(kvm, virtio_pci__msix_io_addr(vpci)); 664 kvm__deregister_pio(kvm, virtio_pci__port_addr(vpci)); 665 666 return 0; 667 } 668