1 #include "kvm/virtio-pci.h" 2 3 #include "kvm/ioport.h" 4 #include "kvm/kvm.h" 5 #include "kvm/kvm-cpu.h" 6 #include "kvm/virtio-pci-dev.h" 7 #include "kvm/irq.h" 8 #include "kvm/virtio.h" 9 #include "kvm/ioeventfd.h" 10 #include "kvm/util.h" 11 12 #include <sys/ioctl.h> 13 #include <linux/virtio_pci.h> 14 #include <linux/byteorder.h> 15 #include <assert.h> 16 #include <string.h> 17 18 #define ALIGN_UP(x, s) ALIGN((x) + (s) - 1, (s)) 19 #define VIRTIO_NR_MSIX (VIRTIO_PCI_MAX_VQ + VIRTIO_PCI_MAX_CONFIG) 20 #define VIRTIO_MSIX_TABLE_SIZE (VIRTIO_NR_MSIX * 16) 21 #define VIRTIO_MSIX_PBA_SIZE (ALIGN_UP(VIRTIO_MSIX_TABLE_SIZE, 64) / 8) 22 #define VIRTIO_MSIX_BAR_SIZE (1UL << fls_long(VIRTIO_MSIX_TABLE_SIZE + \ 23 VIRTIO_MSIX_PBA_SIZE)) 24 25 static u16 virtio_pci__port_addr(struct virtio_pci *vpci) 26 { 27 return pci__bar_address(&vpci->pci_hdr, 0); 28 } 29 30 static u32 virtio_pci__mmio_addr(struct virtio_pci *vpci) 31 { 32 return pci__bar_address(&vpci->pci_hdr, 1); 33 } 34 35 static u32 virtio_pci__msix_io_addr(struct virtio_pci *vpci) 36 { 37 return pci__bar_address(&vpci->pci_hdr, 2); 38 } 39 40 static int virtio_pci__add_msix_route(struct virtio_pci *vpci, u32 vec) 41 { 42 int gsi; 43 struct msi_msg *msg; 44 45 if (vec == VIRTIO_MSI_NO_VECTOR) 46 return -EINVAL; 47 48 msg = &vpci->msix_table[vec].msg; 49 gsi = irq__add_msix_route(vpci->kvm, msg, vpci->dev_hdr.dev_num << 3); 50 /* 51 * We don't need IRQ routing if we can use 52 * MSI injection via the KVM_SIGNAL_MSI ioctl. 53 */ 54 if (gsi == -ENXIO && vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 55 return gsi; 56 57 if (gsi < 0) 58 die("failed to configure MSIs"); 59 60 return gsi; 61 } 62 63 static void virtio_pci__del_msix_route(struct virtio_pci *vpci, u32 gsi) 64 { 65 struct msi_msg msg = { 0 }; 66 67 irq__update_msix_route(vpci->kvm, gsi, &msg); 68 } 69 70 static void virtio_pci__ioevent_callback(struct kvm *kvm, void *param) 71 { 72 struct virtio_pci_ioevent_param *ioeventfd = param; 73 struct virtio_pci *vpci = ioeventfd->vdev->virtio; 74 75 ioeventfd->vdev->ops->notify_vq(kvm, vpci->dev, ioeventfd->vq); 76 } 77 78 static int virtio_pci__init_ioeventfd(struct kvm *kvm, struct virtio_device *vdev, u32 vq) 79 { 80 struct ioevent ioevent; 81 struct virtio_pci *vpci = vdev->virtio; 82 u32 mmio_addr = virtio_pci__mmio_addr(vpci); 83 u16 port_addr = virtio_pci__port_addr(vpci); 84 int r, flags = 0; 85 int fd; 86 87 vpci->ioeventfds[vq] = (struct virtio_pci_ioevent_param) { 88 .vdev = vdev, 89 .vq = vq, 90 }; 91 92 ioevent = (struct ioevent) { 93 .fn = virtio_pci__ioevent_callback, 94 .fn_ptr = &vpci->ioeventfds[vq], 95 .datamatch = vq, 96 .fn_kvm = kvm, 97 }; 98 99 /* 100 * Vhost will poll the eventfd in host kernel side, otherwise we 101 * need to poll in userspace. 102 */ 103 if (!vdev->use_vhost) 104 flags |= IOEVENTFD_FLAG_USER_POLL; 105 106 /* ioport */ 107 ioevent.io_addr = port_addr + VIRTIO_PCI_QUEUE_NOTIFY; 108 ioevent.io_len = sizeof(u16); 109 ioevent.fd = fd = eventfd(0, 0); 110 r = ioeventfd__add_event(&ioevent, flags | IOEVENTFD_FLAG_PIO); 111 if (r) 112 return r; 113 114 /* mmio */ 115 ioevent.io_addr = mmio_addr + VIRTIO_PCI_QUEUE_NOTIFY; 116 ioevent.io_len = sizeof(u16); 117 ioevent.fd = eventfd(0, 0); 118 r = ioeventfd__add_event(&ioevent, flags); 119 if (r) 120 goto free_ioport_evt; 121 122 if (vdev->ops->notify_vq_eventfd) 123 vdev->ops->notify_vq_eventfd(kvm, vpci->dev, vq, fd); 124 return 0; 125 126 free_ioport_evt: 127 ioeventfd__del_event(port_addr + VIRTIO_PCI_QUEUE_NOTIFY, vq); 128 return r; 129 } 130 131 static void virtio_pci_exit_vq(struct kvm *kvm, struct virtio_device *vdev, 132 int vq) 133 { 134 struct virtio_pci *vpci = vdev->virtio; 135 u32 mmio_addr = virtio_pci__mmio_addr(vpci); 136 u16 port_addr = virtio_pci__port_addr(vpci); 137 138 virtio_pci__del_msix_route(vpci, vpci->gsis[vq]); 139 vpci->gsis[vq] = 0; 140 vpci->vq_vector[vq] = VIRTIO_MSI_NO_VECTOR; 141 ioeventfd__del_event(mmio_addr + VIRTIO_PCI_QUEUE_NOTIFY, vq); 142 ioeventfd__del_event(port_addr + VIRTIO_PCI_QUEUE_NOTIFY, vq); 143 virtio_exit_vq(kvm, vdev, vpci->dev, vq); 144 } 145 146 static inline bool virtio_pci__msix_enabled(struct virtio_pci *vpci) 147 { 148 return vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_ENABLE); 149 } 150 151 static bool virtio_pci__specific_data_in(struct kvm *kvm, struct virtio_device *vdev, 152 void *data, u32 size, unsigned long offset) 153 { 154 u32 config_offset; 155 struct virtio_pci *vpci = vdev->virtio; 156 int type = virtio__get_dev_specific_field(offset - 20, 157 virtio_pci__msix_enabled(vpci), 158 &config_offset); 159 if (type == VIRTIO_PCI_O_MSIX) { 160 switch (offset) { 161 case VIRTIO_MSI_CONFIG_VECTOR: 162 ioport__write16(data, vpci->config_vector); 163 break; 164 case VIRTIO_MSI_QUEUE_VECTOR: 165 ioport__write16(data, vpci->vq_vector[vpci->queue_selector]); 166 break; 167 }; 168 169 return true; 170 } else if (type == VIRTIO_PCI_O_CONFIG) { 171 return virtio_access_config(kvm, vdev, vpci->dev, config_offset, 172 data, size, false); 173 } 174 175 return false; 176 } 177 178 static bool virtio_pci__data_in(struct kvm_cpu *vcpu, struct virtio_device *vdev, 179 unsigned long offset, void *data, u32 size) 180 { 181 bool ret = true; 182 struct virtio_pci *vpci; 183 struct virt_queue *vq; 184 struct kvm *kvm; 185 u32 val; 186 187 kvm = vcpu->kvm; 188 vpci = vdev->virtio; 189 190 switch (offset) { 191 case VIRTIO_PCI_HOST_FEATURES: 192 val = vdev->ops->get_host_features(kvm, vpci->dev); 193 ioport__write32(data, val); 194 break; 195 case VIRTIO_PCI_QUEUE_PFN: 196 vq = vdev->ops->get_vq(kvm, vpci->dev, vpci->queue_selector); 197 ioport__write32(data, vq->vring_addr.pfn); 198 break; 199 case VIRTIO_PCI_QUEUE_NUM: 200 val = vdev->ops->get_size_vq(kvm, vpci->dev, vpci->queue_selector); 201 ioport__write16(data, val); 202 break; 203 case VIRTIO_PCI_STATUS: 204 ioport__write8(data, vpci->status); 205 break; 206 case VIRTIO_PCI_ISR: 207 ioport__write8(data, vpci->isr); 208 kvm__irq_line(kvm, vpci->legacy_irq_line, VIRTIO_IRQ_LOW); 209 vpci->isr = VIRTIO_IRQ_LOW; 210 break; 211 default: 212 ret = virtio_pci__specific_data_in(kvm, vdev, data, size, offset); 213 break; 214 }; 215 216 return ret; 217 } 218 219 static void update_msix_map(struct virtio_pci *vpci, 220 struct msix_table *msix_entry, u32 vecnum) 221 { 222 u32 gsi, i; 223 224 /* Find the GSI number used for that vector */ 225 if (vecnum == vpci->config_vector) { 226 gsi = vpci->config_gsi; 227 } else { 228 for (i = 0; i < VIRTIO_PCI_MAX_VQ; i++) 229 if (vpci->vq_vector[i] == vecnum) 230 break; 231 if (i == VIRTIO_PCI_MAX_VQ) 232 return; 233 gsi = vpci->gsis[i]; 234 } 235 236 if (gsi == 0) 237 return; 238 239 msix_entry = &msix_entry[vecnum]; 240 irq__update_msix_route(vpci->kvm, gsi, &msix_entry->msg); 241 } 242 243 static bool virtio_pci__specific_data_out(struct kvm *kvm, struct virtio_device *vdev, 244 void *data, u32 size, unsigned long offset) 245 { 246 struct virtio_pci *vpci = vdev->virtio; 247 u32 config_offset, vec; 248 int gsi; 249 int type = virtio__get_dev_specific_field(offset - 20, virtio_pci__msix_enabled(vpci), 250 &config_offset); 251 if (type == VIRTIO_PCI_O_MSIX) { 252 switch (offset) { 253 case VIRTIO_MSI_CONFIG_VECTOR: 254 vec = vpci->config_vector = ioport__read16(data); 255 256 gsi = virtio_pci__add_msix_route(vpci, vec); 257 if (gsi < 0) 258 break; 259 260 vpci->config_gsi = gsi; 261 break; 262 case VIRTIO_MSI_QUEUE_VECTOR: 263 vec = ioport__read16(data); 264 vpci->vq_vector[vpci->queue_selector] = vec; 265 266 gsi = virtio_pci__add_msix_route(vpci, vec); 267 if (gsi < 0) 268 break; 269 270 vpci->gsis[vpci->queue_selector] = gsi; 271 if (vdev->ops->notify_vq_gsi) 272 vdev->ops->notify_vq_gsi(kvm, vpci->dev, 273 vpci->queue_selector, 274 gsi); 275 break; 276 }; 277 278 return true; 279 } else if (type == VIRTIO_PCI_O_CONFIG) { 280 return virtio_access_config(kvm, vdev, vpci->dev, config_offset, 281 data, size, true); 282 } 283 284 return false; 285 } 286 287 static bool virtio_pci__data_out(struct kvm_cpu *vcpu, struct virtio_device *vdev, 288 unsigned long offset, void *data, u32 size) 289 { 290 bool ret = true; 291 struct virtio_pci *vpci; 292 struct virt_queue *vq; 293 struct kvm *kvm; 294 u32 val; 295 unsigned int vq_count; 296 297 kvm = vcpu->kvm; 298 vpci = vdev->virtio; 299 vq_count = vdev->ops->get_vq_count(kvm, vpci->dev); 300 301 switch (offset) { 302 case VIRTIO_PCI_GUEST_FEATURES: 303 val = ioport__read32(data); 304 virtio_set_guest_features(kvm, vdev, vpci->dev, val); 305 break; 306 case VIRTIO_PCI_QUEUE_PFN: 307 val = ioport__read32(data); 308 if (val) { 309 vq = vdev->ops->get_vq(kvm, vpci->dev, 310 vpci->queue_selector); 311 vq->vring_addr = (struct vring_addr) { 312 .legacy = true, 313 .pfn = val, 314 .align = VIRTIO_PCI_VRING_ALIGN, 315 .pgsize = 1 << VIRTIO_PCI_QUEUE_ADDR_SHIFT, 316 }; 317 virtio_pci__init_ioeventfd(kvm, vdev, 318 vpci->queue_selector); 319 vdev->ops->init_vq(kvm, vpci->dev, 320 vpci->queue_selector); 321 } else { 322 virtio_pci_exit_vq(kvm, vdev, vpci->queue_selector); 323 } 324 break; 325 case VIRTIO_PCI_QUEUE_SEL: 326 val = ioport__read16(data); 327 if (val >= vq_count) { 328 WARN_ONCE(1, "QUEUE_SEL value (%u) is larger than VQ count (%u)\n", 329 val, vq_count); 330 return false; 331 } 332 vpci->queue_selector = val; 333 break; 334 case VIRTIO_PCI_QUEUE_NOTIFY: 335 val = ioport__read16(data); 336 if (val >= vq_count) { 337 WARN_ONCE(1, "QUEUE_SEL value (%u) is larger than VQ count (%u)\n", 338 val, vq_count); 339 return false; 340 } 341 vdev->ops->notify_vq(kvm, vpci->dev, val); 342 break; 343 case VIRTIO_PCI_STATUS: 344 vpci->status = ioport__read8(data); 345 if (!vpci->status) /* Sample endianness on reset */ 346 vdev->endian = kvm_cpu__get_endianness(vcpu); 347 virtio_notify_status(kvm, vdev, vpci->dev, vpci->status); 348 break; 349 default: 350 ret = virtio_pci__specific_data_out(kvm, vdev, data, size, offset); 351 break; 352 }; 353 354 return ret; 355 } 356 357 static void virtio_pci__msix_mmio_callback(struct kvm_cpu *vcpu, 358 u64 addr, u8 *data, u32 len, 359 u8 is_write, void *ptr) 360 { 361 struct virtio_device *vdev = ptr; 362 struct virtio_pci *vpci = vdev->virtio; 363 struct msix_table *table; 364 u32 msix_io_addr = virtio_pci__msix_io_addr(vpci); 365 u32 pba_offset; 366 int vecnum; 367 size_t offset; 368 369 BUILD_BUG_ON(VIRTIO_NR_MSIX > (sizeof(vpci->msix_pba) * 8)); 370 371 pba_offset = vpci->pci_hdr.msix.pba_offset & ~PCI_MSIX_TABLE_BIR; 372 if (addr >= msix_io_addr + pba_offset) { 373 /* Read access to PBA */ 374 if (is_write) 375 return; 376 offset = addr - (msix_io_addr + pba_offset); 377 if ((offset + len) > sizeof (vpci->msix_pba)) 378 return; 379 memcpy(data, (void *)&vpci->msix_pba + offset, len); 380 return; 381 } 382 383 table = vpci->msix_table; 384 offset = addr - msix_io_addr; 385 386 vecnum = offset / sizeof(struct msix_table); 387 offset = offset % sizeof(struct msix_table); 388 389 if (!is_write) { 390 memcpy(data, (void *)&table[vecnum] + offset, len); 391 return; 392 } 393 394 memcpy((void *)&table[vecnum] + offset, data, len); 395 396 /* Did we just update the address or payload? */ 397 if (offset < offsetof(struct msix_table, ctrl)) 398 update_msix_map(vpci, table, vecnum); 399 } 400 401 static void virtio_pci__signal_msi(struct kvm *kvm, struct virtio_pci *vpci, 402 int vec) 403 { 404 struct kvm_msi msi = { 405 .address_lo = vpci->msix_table[vec].msg.address_lo, 406 .address_hi = vpci->msix_table[vec].msg.address_hi, 407 .data = vpci->msix_table[vec].msg.data, 408 }; 409 410 if (kvm->msix_needs_devid) { 411 msi.flags = KVM_MSI_VALID_DEVID; 412 msi.devid = vpci->dev_hdr.dev_num << 3; 413 } 414 415 irq__signal_msi(kvm, &msi); 416 } 417 418 int virtio_pci__signal_vq(struct kvm *kvm, struct virtio_device *vdev, u32 vq) 419 { 420 struct virtio_pci *vpci = vdev->virtio; 421 int tbl = vpci->vq_vector[vq]; 422 423 if (virtio_pci__msix_enabled(vpci) && tbl != VIRTIO_MSI_NO_VECTOR) { 424 if (vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_MASKALL) || 425 vpci->msix_table[tbl].ctrl & cpu_to_le16(PCI_MSIX_ENTRY_CTRL_MASKBIT)) { 426 427 vpci->msix_pba |= 1 << tbl; 428 return 0; 429 } 430 431 if (vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 432 virtio_pci__signal_msi(kvm, vpci, vpci->vq_vector[vq]); 433 else 434 kvm__irq_trigger(kvm, vpci->gsis[vq]); 435 } else { 436 vpci->isr = VIRTIO_IRQ_HIGH; 437 kvm__irq_line(kvm, vpci->legacy_irq_line, VIRTIO_IRQ_HIGH); 438 } 439 return 0; 440 } 441 442 int virtio_pci__signal_config(struct kvm *kvm, struct virtio_device *vdev) 443 { 444 struct virtio_pci *vpci = vdev->virtio; 445 int tbl = vpci->config_vector; 446 447 if (virtio_pci__msix_enabled(vpci) && tbl != VIRTIO_MSI_NO_VECTOR) { 448 if (vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_MASKALL) || 449 vpci->msix_table[tbl].ctrl & cpu_to_le16(PCI_MSIX_ENTRY_CTRL_MASKBIT)) { 450 451 vpci->msix_pba |= 1 << tbl; 452 return 0; 453 } 454 455 if (vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 456 virtio_pci__signal_msi(kvm, vpci, tbl); 457 else 458 kvm__irq_trigger(kvm, vpci->config_gsi); 459 } else { 460 vpci->isr = VIRTIO_PCI_ISR_CONFIG; 461 kvm__irq_trigger(kvm, vpci->legacy_irq_line); 462 } 463 464 return 0; 465 } 466 467 static void virtio_pci__io_mmio_callback(struct kvm_cpu *vcpu, 468 u64 addr, u8 *data, u32 len, 469 u8 is_write, void *ptr) 470 { 471 struct virtio_device *vdev = ptr; 472 struct virtio_pci *vpci = vdev->virtio; 473 u32 ioport_addr = virtio_pci__port_addr(vpci); 474 u32 base_addr; 475 476 if (addr >= ioport_addr && 477 addr < ioport_addr + pci__bar_size(&vpci->pci_hdr, 0)) 478 base_addr = ioport_addr; 479 else 480 base_addr = virtio_pci__mmio_addr(vpci); 481 482 if (!is_write) 483 virtio_pci__data_in(vcpu, vdev, addr - base_addr, data, len); 484 else 485 virtio_pci__data_out(vcpu, vdev, addr - base_addr, data, len); 486 } 487 488 static int virtio_pci__bar_activate(struct kvm *kvm, 489 struct pci_device_header *pci_hdr, 490 int bar_num, void *data) 491 { 492 struct virtio_device *vdev = data; 493 u32 bar_addr, bar_size; 494 int r = -EINVAL; 495 496 assert(bar_num <= 2); 497 498 bar_addr = pci__bar_address(pci_hdr, bar_num); 499 bar_size = pci__bar_size(pci_hdr, bar_num); 500 501 switch (bar_num) { 502 case 0: 503 r = kvm__register_pio(kvm, bar_addr, bar_size, 504 virtio_pci__io_mmio_callback, vdev); 505 break; 506 case 1: 507 r = kvm__register_mmio(kvm, bar_addr, bar_size, false, 508 virtio_pci__io_mmio_callback, vdev); 509 break; 510 case 2: 511 r = kvm__register_mmio(kvm, bar_addr, bar_size, false, 512 virtio_pci__msix_mmio_callback, vdev); 513 break; 514 } 515 516 return r; 517 } 518 519 static int virtio_pci__bar_deactivate(struct kvm *kvm, 520 struct pci_device_header *pci_hdr, 521 int bar_num, void *data) 522 { 523 u32 bar_addr; 524 bool success; 525 int r = -EINVAL; 526 527 assert(bar_num <= 2); 528 529 bar_addr = pci__bar_address(pci_hdr, bar_num); 530 531 switch (bar_num) { 532 case 0: 533 r = kvm__deregister_pio(kvm, bar_addr); 534 break; 535 case 1: 536 case 2: 537 success = kvm__deregister_mmio(kvm, bar_addr); 538 /* kvm__deregister_mmio fails when the region is not found. */ 539 r = (success ? 0 : -ENOENT); 540 break; 541 } 542 543 return r; 544 } 545 546 int virtio_pci__init(struct kvm *kvm, void *dev, struct virtio_device *vdev, 547 int device_id, int subsys_id, int class) 548 { 549 struct virtio_pci *vpci = vdev->virtio; 550 u32 mmio_addr, msix_io_block; 551 u16 port_addr; 552 int r; 553 554 vpci->kvm = kvm; 555 vpci->dev = dev; 556 557 BUILD_BUG_ON(!is_power_of_two(PCI_IO_SIZE)); 558 559 port_addr = pci_get_io_port_block(PCI_IO_SIZE); 560 mmio_addr = pci_get_mmio_block(PCI_IO_SIZE); 561 msix_io_block = pci_get_mmio_block(VIRTIO_MSIX_BAR_SIZE); 562 563 vpci->pci_hdr = (struct pci_device_header) { 564 .vendor_id = cpu_to_le16(PCI_VENDOR_ID_REDHAT_QUMRANET), 565 .device_id = cpu_to_le16(device_id), 566 .command = PCI_COMMAND_IO | PCI_COMMAND_MEMORY, 567 .header_type = PCI_HEADER_TYPE_NORMAL, 568 .revision_id = 0, 569 .class[0] = class & 0xff, 570 .class[1] = (class >> 8) & 0xff, 571 .class[2] = (class >> 16) & 0xff, 572 .subsys_vendor_id = cpu_to_le16(PCI_SUBSYSTEM_VENDOR_ID_REDHAT_QUMRANET), 573 .subsys_id = cpu_to_le16(subsys_id), 574 .bar[0] = cpu_to_le32(port_addr 575 | PCI_BASE_ADDRESS_SPACE_IO), 576 .bar[1] = cpu_to_le32(mmio_addr 577 | PCI_BASE_ADDRESS_SPACE_MEMORY), 578 .bar[2] = cpu_to_le32(msix_io_block 579 | PCI_BASE_ADDRESS_SPACE_MEMORY), 580 .status = cpu_to_le16(PCI_STATUS_CAP_LIST), 581 .capabilities = (void *)&vpci->pci_hdr.msix - (void *)&vpci->pci_hdr, 582 .bar_size[0] = cpu_to_le32(PCI_IO_SIZE), 583 .bar_size[1] = cpu_to_le32(PCI_IO_SIZE), 584 .bar_size[2] = cpu_to_le32(VIRTIO_MSIX_BAR_SIZE), 585 }; 586 587 r = pci__register_bar_regions(kvm, &vpci->pci_hdr, 588 virtio_pci__bar_activate, 589 virtio_pci__bar_deactivate, vdev); 590 if (r < 0) 591 return r; 592 593 vpci->dev_hdr = (struct device_header) { 594 .bus_type = DEVICE_BUS_PCI, 595 .data = &vpci->pci_hdr, 596 }; 597 598 vpci->pci_hdr.msix.cap = PCI_CAP_ID_MSIX; 599 vpci->pci_hdr.msix.next = 0; 600 /* 601 * We at most have VIRTIO_NR_MSIX entries (VIRTIO_PCI_MAX_VQ 602 * entries for virt queue, VIRTIO_PCI_MAX_CONFIG entries for 603 * config). 604 * 605 * To quote the PCI spec: 606 * 607 * System software reads this field to determine the 608 * MSI-X Table Size N, which is encoded as N-1. 609 * For example, a returned value of "00000000011" 610 * indicates a table size of 4. 611 */ 612 vpci->pci_hdr.msix.ctrl = cpu_to_le16(VIRTIO_NR_MSIX - 1); 613 614 /* Both table and PBA are mapped to the same BAR (2) */ 615 vpci->pci_hdr.msix.table_offset = cpu_to_le32(2); 616 vpci->pci_hdr.msix.pba_offset = cpu_to_le32(2 | VIRTIO_MSIX_TABLE_SIZE); 617 vpci->config_vector = 0; 618 619 if (irq__can_signal_msi(kvm)) 620 vpci->features |= VIRTIO_PCI_F_SIGNAL_MSI; 621 622 vpci->legacy_irq_line = pci__assign_irq(&vpci->pci_hdr); 623 624 r = device__register(&vpci->dev_hdr); 625 if (r < 0) 626 return r; 627 628 return 0; 629 } 630 631 int virtio_pci__reset(struct kvm *kvm, struct virtio_device *vdev) 632 { 633 unsigned int vq; 634 struct virtio_pci *vpci = vdev->virtio; 635 636 virtio_pci__del_msix_route(vpci, vpci->config_gsi); 637 vpci->config_gsi = 0; 638 vpci->config_vector = VIRTIO_MSI_NO_VECTOR; 639 640 for (vq = 0; vq < vdev->ops->get_vq_count(kvm, vpci->dev); vq++) 641 virtio_pci_exit_vq(kvm, vdev, vq); 642 643 return 0; 644 } 645 646 int virtio_pci__exit(struct kvm *kvm, struct virtio_device *vdev) 647 { 648 struct virtio_pci *vpci = vdev->virtio; 649 650 virtio_pci__reset(kvm, vdev); 651 kvm__deregister_mmio(kvm, virtio_pci__mmio_addr(vpci)); 652 kvm__deregister_mmio(kvm, virtio_pci__msix_io_addr(vpci)); 653 kvm__deregister_pio(kvm, virtio_pci__port_addr(vpci)); 654 655 return 0; 656 } 657