1 #include "kvm/virtio-pci.h" 2 3 #include "kvm/ioport.h" 4 #include "kvm/kvm.h" 5 #include "kvm/kvm-cpu.h" 6 #include "kvm/virtio-pci-dev.h" 7 #include "kvm/irq.h" 8 #include "kvm/virtio.h" 9 #include "kvm/ioeventfd.h" 10 11 #include <sys/ioctl.h> 12 #include <linux/virtio_pci.h> 13 #include <linux/byteorder.h> 14 #include <string.h> 15 16 static void virtio_pci__ioevent_callback(struct kvm *kvm, void *param) 17 { 18 struct virtio_pci_ioevent_param *ioeventfd = param; 19 struct virtio_pci *vpci = ioeventfd->vdev->virtio; 20 21 ioeventfd->vdev->ops->notify_vq(kvm, vpci->dev, ioeventfd->vq); 22 } 23 24 static int virtio_pci__init_ioeventfd(struct kvm *kvm, struct virtio_device *vdev, u32 vq) 25 { 26 struct ioevent ioevent; 27 struct virtio_pci *vpci = vdev->virtio; 28 int r, flags = 0; 29 int fd; 30 31 vpci->ioeventfds[vq] = (struct virtio_pci_ioevent_param) { 32 .vdev = vdev, 33 .vq = vq, 34 }; 35 36 ioevent = (struct ioevent) { 37 .fn = virtio_pci__ioevent_callback, 38 .fn_ptr = &vpci->ioeventfds[vq], 39 .datamatch = vq, 40 .fn_kvm = kvm, 41 }; 42 43 /* 44 * Vhost will poll the eventfd in host kernel side, otherwise we 45 * need to poll in userspace. 46 */ 47 if (!vdev->use_vhost) 48 flags |= IOEVENTFD_FLAG_USER_POLL; 49 50 /* ioport */ 51 ioevent.io_addr = vpci->port_addr + VIRTIO_PCI_QUEUE_NOTIFY; 52 ioevent.io_len = sizeof(u16); 53 ioevent.fd = fd = eventfd(0, 0); 54 r = ioeventfd__add_event(&ioevent, flags | IOEVENTFD_FLAG_PIO); 55 if (r) 56 return r; 57 58 /* mmio */ 59 ioevent.io_addr = vpci->mmio_addr + VIRTIO_PCI_QUEUE_NOTIFY; 60 ioevent.io_len = sizeof(u16); 61 ioevent.fd = eventfd(0, 0); 62 r = ioeventfd__add_event(&ioevent, flags); 63 if (r) 64 goto free_ioport_evt; 65 66 if (vdev->ops->notify_vq_eventfd) 67 vdev->ops->notify_vq_eventfd(kvm, vpci->dev, vq, fd); 68 return 0; 69 70 free_ioport_evt: 71 ioeventfd__del_event(vpci->port_addr + VIRTIO_PCI_QUEUE_NOTIFY, vq); 72 return r; 73 } 74 75 static inline bool virtio_pci__msix_enabled(struct virtio_pci *vpci) 76 { 77 return vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_ENABLE); 78 } 79 80 static bool virtio_pci__specific_io_in(struct kvm *kvm, struct virtio_device *vdev, u16 port, 81 void *data, int size, int offset) 82 { 83 u32 config_offset; 84 struct virtio_pci *vpci = vdev->virtio; 85 int type = virtio__get_dev_specific_field(offset - 20, 86 virtio_pci__msix_enabled(vpci), 87 &config_offset); 88 if (type == VIRTIO_PCI_O_MSIX) { 89 switch (offset) { 90 case VIRTIO_MSI_CONFIG_VECTOR: 91 ioport__write16(data, vpci->config_vector); 92 break; 93 case VIRTIO_MSI_QUEUE_VECTOR: 94 ioport__write16(data, vpci->vq_vector[vpci->queue_selector]); 95 break; 96 }; 97 98 return true; 99 } else if (type == VIRTIO_PCI_O_CONFIG) { 100 u8 cfg; 101 102 cfg = vdev->ops->get_config(kvm, vpci->dev)[config_offset]; 103 ioport__write8(data, cfg); 104 return true; 105 } 106 107 return false; 108 } 109 110 static bool virtio_pci__io_in(struct ioport *ioport, struct kvm_cpu *vcpu, u16 port, void *data, int size) 111 { 112 unsigned long offset; 113 bool ret = true; 114 struct virtio_device *vdev; 115 struct virtio_pci *vpci; 116 struct kvm *kvm; 117 u32 val; 118 119 kvm = vcpu->kvm; 120 vdev = ioport->priv; 121 vpci = vdev->virtio; 122 offset = port - vpci->port_addr; 123 124 switch (offset) { 125 case VIRTIO_PCI_HOST_FEATURES: 126 val = vdev->ops->get_host_features(kvm, vpci->dev); 127 ioport__write32(data, val); 128 break; 129 case VIRTIO_PCI_QUEUE_PFN: 130 val = vdev->ops->get_pfn_vq(kvm, vpci->dev, vpci->queue_selector); 131 ioport__write32(data, val); 132 break; 133 case VIRTIO_PCI_QUEUE_NUM: 134 val = vdev->ops->get_size_vq(kvm, vpci->dev, vpci->queue_selector); 135 ioport__write16(data, val); 136 break; 137 case VIRTIO_PCI_STATUS: 138 ioport__write8(data, vpci->status); 139 break; 140 case VIRTIO_PCI_ISR: 141 ioport__write8(data, vpci->isr); 142 kvm__irq_line(kvm, vpci->legacy_irq_line, VIRTIO_IRQ_LOW); 143 vpci->isr = VIRTIO_IRQ_LOW; 144 break; 145 default: 146 ret = virtio_pci__specific_io_in(kvm, vdev, port, data, size, offset); 147 break; 148 }; 149 150 return ret; 151 } 152 153 static void update_msix_map(struct virtio_pci *vpci, 154 struct msix_table *msix_entry, u32 vecnum) 155 { 156 u32 gsi, i; 157 158 /* Find the GSI number used for that vector */ 159 if (vecnum == vpci->config_vector) { 160 gsi = vpci->config_gsi; 161 } else { 162 for (i = 0; i < VIRTIO_PCI_MAX_VQ; i++) 163 if (vpci->vq_vector[i] == vecnum) 164 break; 165 if (i == VIRTIO_PCI_MAX_VQ) 166 return; 167 gsi = vpci->gsis[i]; 168 } 169 170 if (gsi == 0) 171 return; 172 173 msix_entry = &msix_entry[vecnum]; 174 irq__update_msix_route(vpci->kvm, gsi, &msix_entry->msg); 175 } 176 177 static bool virtio_pci__specific_io_out(struct kvm *kvm, struct virtio_device *vdev, u16 port, 178 void *data, int size, int offset) 179 { 180 struct virtio_pci *vpci = vdev->virtio; 181 u32 config_offset, vec; 182 int gsi; 183 int type = virtio__get_dev_specific_field(offset - 20, virtio_pci__msix_enabled(vpci), 184 &config_offset); 185 if (type == VIRTIO_PCI_O_MSIX) { 186 switch (offset) { 187 case VIRTIO_MSI_CONFIG_VECTOR: 188 vec = vpci->config_vector = ioport__read16(data); 189 if (vec == VIRTIO_MSI_NO_VECTOR) 190 break; 191 192 gsi = irq__add_msix_route(kvm, 193 &vpci->msix_table[vec].msg, 194 vpci->dev_hdr.dev_num << 3); 195 /* 196 * We don't need IRQ routing if we can use 197 * MSI injection via the KVM_SIGNAL_MSI ioctl. 198 */ 199 if (gsi == -ENXIO && 200 vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 201 break; 202 203 if (gsi < 0) { 204 die("failed to configure MSIs"); 205 break; 206 } 207 208 vpci->config_gsi = gsi; 209 break; 210 case VIRTIO_MSI_QUEUE_VECTOR: 211 vec = ioport__read16(data); 212 vpci->vq_vector[vpci->queue_selector] = vec; 213 214 if (vec == VIRTIO_MSI_NO_VECTOR) 215 break; 216 217 gsi = irq__add_msix_route(kvm, 218 &vpci->msix_table[vec].msg, 219 vpci->dev_hdr.dev_num << 3); 220 /* 221 * We don't need IRQ routing if we can use 222 * MSI injection via the KVM_SIGNAL_MSI ioctl. 223 */ 224 if (gsi == -ENXIO && 225 vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 226 break; 227 228 if (gsi < 0) { 229 die("failed to configure MSIs"); 230 break; 231 } 232 233 vpci->gsis[vpci->queue_selector] = gsi; 234 if (vdev->ops->notify_vq_gsi) 235 vdev->ops->notify_vq_gsi(kvm, vpci->dev, 236 vpci->queue_selector, 237 gsi); 238 break; 239 }; 240 241 return true; 242 } else if (type == VIRTIO_PCI_O_CONFIG) { 243 vdev->ops->get_config(kvm, vpci->dev)[config_offset] = *(u8 *)data; 244 245 return true; 246 } 247 248 return false; 249 } 250 251 static bool virtio_pci__io_out(struct ioport *ioport, struct kvm_cpu *vcpu, u16 port, void *data, int size) 252 { 253 unsigned long offset; 254 bool ret = true; 255 struct virtio_device *vdev; 256 struct virtio_pci *vpci; 257 struct kvm *kvm; 258 u32 val; 259 260 kvm = vcpu->kvm; 261 vdev = ioport->priv; 262 vpci = vdev->virtio; 263 offset = port - vpci->port_addr; 264 265 switch (offset) { 266 case VIRTIO_PCI_GUEST_FEATURES: 267 val = ioport__read32(data); 268 virtio_set_guest_features(kvm, vdev, vpci->dev, val); 269 break; 270 case VIRTIO_PCI_QUEUE_PFN: 271 val = ioport__read32(data); 272 virtio_pci__init_ioeventfd(kvm, vdev, vpci->queue_selector); 273 vdev->ops->init_vq(kvm, vpci->dev, vpci->queue_selector, 274 1 << VIRTIO_PCI_QUEUE_ADDR_SHIFT, 275 VIRTIO_PCI_VRING_ALIGN, val); 276 break; 277 case VIRTIO_PCI_QUEUE_SEL: 278 vpci->queue_selector = ioport__read16(data); 279 break; 280 case VIRTIO_PCI_QUEUE_NOTIFY: 281 val = ioport__read16(data); 282 vdev->ops->notify_vq(kvm, vpci->dev, val); 283 break; 284 case VIRTIO_PCI_STATUS: 285 vpci->status = ioport__read8(data); 286 if (!vpci->status) /* Sample endianness on reset */ 287 vdev->endian = kvm_cpu__get_endianness(vcpu); 288 virtio_notify_status(kvm, vdev, vpci->dev, vpci->status); 289 break; 290 default: 291 ret = virtio_pci__specific_io_out(kvm, vdev, port, data, size, offset); 292 break; 293 }; 294 295 return ret; 296 } 297 298 static struct ioport_operations virtio_pci__io_ops = { 299 .io_in = virtio_pci__io_in, 300 .io_out = virtio_pci__io_out, 301 }; 302 303 static void virtio_pci__msix_mmio_callback(struct kvm_cpu *vcpu, 304 u64 addr, u8 *data, u32 len, 305 u8 is_write, void *ptr) 306 { 307 struct virtio_pci *vpci = ptr; 308 struct msix_table *table; 309 int vecnum; 310 size_t offset; 311 312 if (addr > vpci->msix_io_block + PCI_IO_SIZE) { 313 if (is_write) 314 return; 315 table = (struct msix_table *)&vpci->msix_pba; 316 offset = addr - (vpci->msix_io_block + PCI_IO_SIZE); 317 } else { 318 table = vpci->msix_table; 319 offset = addr - vpci->msix_io_block; 320 } 321 vecnum = offset / sizeof(struct msix_table); 322 offset = offset % sizeof(struct msix_table); 323 324 if (!is_write) { 325 memcpy(data, (void *)&table[vecnum] + offset, len); 326 return; 327 } 328 329 memcpy((void *)&table[vecnum] + offset, data, len); 330 331 /* Did we just update the address or payload? */ 332 if (offset < offsetof(struct msix_table, ctrl)) 333 update_msix_map(vpci, table, vecnum); 334 } 335 336 static void virtio_pci__signal_msi(struct kvm *kvm, struct virtio_pci *vpci, 337 int vec) 338 { 339 struct kvm_msi msi = { 340 .address_lo = vpci->msix_table[vec].msg.address_lo, 341 .address_hi = vpci->msix_table[vec].msg.address_hi, 342 .data = vpci->msix_table[vec].msg.data, 343 }; 344 345 if (kvm->msix_needs_devid) { 346 msi.flags = KVM_MSI_VALID_DEVID; 347 msi.devid = vpci->dev_hdr.dev_num << 3; 348 } 349 350 irq__signal_msi(kvm, &msi); 351 } 352 353 int virtio_pci__signal_vq(struct kvm *kvm, struct virtio_device *vdev, u32 vq) 354 { 355 struct virtio_pci *vpci = vdev->virtio; 356 int tbl = vpci->vq_vector[vq]; 357 358 if (virtio_pci__msix_enabled(vpci) && tbl != VIRTIO_MSI_NO_VECTOR) { 359 if (vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_MASKALL) || 360 vpci->msix_table[tbl].ctrl & cpu_to_le16(PCI_MSIX_ENTRY_CTRL_MASKBIT)) { 361 362 vpci->msix_pba |= 1 << tbl; 363 return 0; 364 } 365 366 if (vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 367 virtio_pci__signal_msi(kvm, vpci, vpci->vq_vector[vq]); 368 else 369 kvm__irq_trigger(kvm, vpci->gsis[vq]); 370 } else { 371 vpci->isr = VIRTIO_IRQ_HIGH; 372 kvm__irq_trigger(kvm, vpci->legacy_irq_line); 373 } 374 return 0; 375 } 376 377 int virtio_pci__signal_config(struct kvm *kvm, struct virtio_device *vdev) 378 { 379 struct virtio_pci *vpci = vdev->virtio; 380 int tbl = vpci->config_vector; 381 382 if (virtio_pci__msix_enabled(vpci) && tbl != VIRTIO_MSI_NO_VECTOR) { 383 if (vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_MASKALL) || 384 vpci->msix_table[tbl].ctrl & cpu_to_le16(PCI_MSIX_ENTRY_CTRL_MASKBIT)) { 385 386 vpci->msix_pba |= 1 << tbl; 387 return 0; 388 } 389 390 if (vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 391 virtio_pci__signal_msi(kvm, vpci, tbl); 392 else 393 kvm__irq_trigger(kvm, vpci->config_gsi); 394 } else { 395 vpci->isr = VIRTIO_PCI_ISR_CONFIG; 396 kvm__irq_trigger(kvm, vpci->legacy_irq_line); 397 } 398 399 return 0; 400 } 401 402 static void virtio_pci__io_mmio_callback(struct kvm_cpu *vcpu, 403 u64 addr, u8 *data, u32 len, 404 u8 is_write, void *ptr) 405 { 406 struct virtio_pci *vpci = ptr; 407 int direction = is_write ? KVM_EXIT_IO_OUT : KVM_EXIT_IO_IN; 408 u16 port = vpci->port_addr + (addr & (IOPORT_SIZE - 1)); 409 410 kvm__emulate_io(vcpu, port, data, direction, len, 1); 411 } 412 413 int virtio_pci__init(struct kvm *kvm, void *dev, struct virtio_device *vdev, 414 int device_id, int subsys_id, int class) 415 { 416 struct virtio_pci *vpci = vdev->virtio; 417 int r; 418 419 vpci->kvm = kvm; 420 vpci->dev = dev; 421 422 r = ioport__register(kvm, IOPORT_EMPTY, &virtio_pci__io_ops, IOPORT_SIZE, vdev); 423 if (r < 0) 424 return r; 425 vpci->port_addr = (u16)r; 426 427 vpci->mmio_addr = pci_get_io_space_block(IOPORT_SIZE); 428 r = kvm__register_mmio(kvm, vpci->mmio_addr, IOPORT_SIZE, false, 429 virtio_pci__io_mmio_callback, vpci); 430 if (r < 0) 431 goto free_ioport; 432 433 vpci->msix_io_block = pci_get_io_space_block(PCI_IO_SIZE * 2); 434 r = kvm__register_mmio(kvm, vpci->msix_io_block, PCI_IO_SIZE * 2, false, 435 virtio_pci__msix_mmio_callback, vpci); 436 if (r < 0) 437 goto free_mmio; 438 439 vpci->pci_hdr = (struct pci_device_header) { 440 .vendor_id = cpu_to_le16(PCI_VENDOR_ID_REDHAT_QUMRANET), 441 .device_id = cpu_to_le16(device_id), 442 .command = PCI_COMMAND_IO | PCI_COMMAND_MEMORY, 443 .header_type = PCI_HEADER_TYPE_NORMAL, 444 .revision_id = 0, 445 .class[0] = class & 0xff, 446 .class[1] = (class >> 8) & 0xff, 447 .class[2] = (class >> 16) & 0xff, 448 .subsys_vendor_id = cpu_to_le16(PCI_SUBSYSTEM_VENDOR_ID_REDHAT_QUMRANET), 449 .subsys_id = cpu_to_le16(subsys_id), 450 .bar[0] = cpu_to_le32(vpci->port_addr 451 | PCI_BASE_ADDRESS_SPACE_IO), 452 .bar[1] = cpu_to_le32(vpci->mmio_addr 453 | PCI_BASE_ADDRESS_SPACE_MEMORY), 454 .bar[2] = cpu_to_le32(vpci->msix_io_block 455 | PCI_BASE_ADDRESS_SPACE_MEMORY), 456 .status = cpu_to_le16(PCI_STATUS_CAP_LIST), 457 .capabilities = (void *)&vpci->pci_hdr.msix - (void *)&vpci->pci_hdr, 458 .bar_size[0] = cpu_to_le32(IOPORT_SIZE), 459 .bar_size[1] = cpu_to_le32(IOPORT_SIZE), 460 .bar_size[2] = cpu_to_le32(PCI_IO_SIZE*2), 461 }; 462 463 vpci->dev_hdr = (struct device_header) { 464 .bus_type = DEVICE_BUS_PCI, 465 .data = &vpci->pci_hdr, 466 }; 467 468 vpci->pci_hdr.msix.cap = PCI_CAP_ID_MSIX; 469 vpci->pci_hdr.msix.next = 0; 470 /* 471 * We at most have VIRTIO_PCI_MAX_VQ entries for virt queue, 472 * VIRTIO_PCI_MAX_CONFIG entries for config. 473 * 474 * To quote the PCI spec: 475 * 476 * System software reads this field to determine the 477 * MSI-X Table Size N, which is encoded as N-1. 478 * For example, a returned value of "00000000011" 479 * indicates a table size of 4. 480 */ 481 vpci->pci_hdr.msix.ctrl = cpu_to_le16(VIRTIO_PCI_MAX_VQ + VIRTIO_PCI_MAX_CONFIG - 1); 482 483 /* Both table and PBA are mapped to the same BAR (2) */ 484 vpci->pci_hdr.msix.table_offset = cpu_to_le32(2); 485 vpci->pci_hdr.msix.pba_offset = cpu_to_le32(2 | PCI_IO_SIZE); 486 vpci->config_vector = 0; 487 488 if (irq__can_signal_msi(kvm)) 489 vpci->features |= VIRTIO_PCI_F_SIGNAL_MSI; 490 491 r = device__register(&vpci->dev_hdr); 492 if (r < 0) 493 goto free_msix_mmio; 494 495 /* save the IRQ that device__register() has allocated */ 496 vpci->legacy_irq_line = vpci->pci_hdr.irq_line; 497 498 return 0; 499 500 free_msix_mmio: 501 kvm__deregister_mmio(kvm, vpci->msix_io_block); 502 free_mmio: 503 kvm__deregister_mmio(kvm, vpci->mmio_addr); 504 free_ioport: 505 ioport__unregister(kvm, vpci->port_addr); 506 return r; 507 } 508 509 int virtio_pci__exit(struct kvm *kvm, struct virtio_device *vdev) 510 { 511 struct virtio_pci *vpci = vdev->virtio; 512 int i; 513 514 kvm__deregister_mmio(kvm, vpci->mmio_addr); 515 kvm__deregister_mmio(kvm, vpci->msix_io_block); 516 ioport__unregister(kvm, vpci->port_addr); 517 518 for (i = 0; i < VIRTIO_PCI_MAX_VQ; i++) { 519 ioeventfd__del_event(vpci->port_addr + VIRTIO_PCI_QUEUE_NOTIFY, i); 520 ioeventfd__del_event(vpci->mmio_addr + VIRTIO_PCI_QUEUE_NOTIFY, i); 521 } 522 523 return 0; 524 } 525