1 #include "kvm/virtio-pci.h" 2 3 #include "kvm/ioport.h" 4 #include "kvm/kvm.h" 5 #include "kvm/kvm-cpu.h" 6 #include "kvm/virtio-pci-dev.h" 7 #include "kvm/irq.h" 8 #include "kvm/virtio.h" 9 #include "kvm/ioeventfd.h" 10 11 #include <sys/ioctl.h> 12 #include <linux/virtio_pci.h> 13 #include <linux/byteorder.h> 14 #include <string.h> 15 16 static void virtio_pci__ioevent_callback(struct kvm *kvm, void *param) 17 { 18 struct virtio_pci_ioevent_param *ioeventfd = param; 19 struct virtio_pci *vpci = ioeventfd->vdev->virtio; 20 21 ioeventfd->vdev->ops->notify_vq(kvm, vpci->dev, ioeventfd->vq); 22 } 23 24 static int virtio_pci__init_ioeventfd(struct kvm *kvm, struct virtio_device *vdev, u32 vq) 25 { 26 struct ioevent ioevent; 27 struct virtio_pci *vpci = vdev->virtio; 28 int i, r, flags = 0; 29 int fds[2]; 30 31 vpci->ioeventfds[vq] = (struct virtio_pci_ioevent_param) { 32 .vdev = vdev, 33 .vq = vq, 34 }; 35 36 ioevent = (struct ioevent) { 37 .fn = virtio_pci__ioevent_callback, 38 .fn_ptr = &vpci->ioeventfds[vq], 39 .datamatch = vq, 40 .fn_kvm = kvm, 41 }; 42 43 /* 44 * Vhost will poll the eventfd in host kernel side, otherwise we 45 * need to poll in userspace. 46 */ 47 if (!vdev->use_vhost) 48 flags |= IOEVENTFD_FLAG_USER_POLL; 49 50 /* ioport */ 51 ioevent.io_addr = vpci->port_addr + VIRTIO_PCI_QUEUE_NOTIFY; 52 ioevent.io_len = sizeof(u16); 53 ioevent.fd = fds[0] = eventfd(0, 0); 54 r = ioeventfd__add_event(&ioevent, flags | IOEVENTFD_FLAG_PIO); 55 if (r) 56 return r; 57 58 /* mmio */ 59 ioevent.io_addr = vpci->mmio_addr + VIRTIO_PCI_QUEUE_NOTIFY; 60 ioevent.io_len = sizeof(u16); 61 ioevent.fd = fds[1] = eventfd(0, 0); 62 r = ioeventfd__add_event(&ioevent, flags); 63 if (r) 64 goto free_ioport_evt; 65 66 if (vdev->ops->notify_vq_eventfd) 67 for (i = 0; i < 2; ++i) 68 vdev->ops->notify_vq_eventfd(kvm, vpci->dev, vq, 69 fds[i]); 70 return 0; 71 72 free_ioport_evt: 73 ioeventfd__del_event(vpci->port_addr + VIRTIO_PCI_QUEUE_NOTIFY, vq); 74 return r; 75 } 76 77 static inline bool virtio_pci__msix_enabled(struct virtio_pci *vpci) 78 { 79 return vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_ENABLE); 80 } 81 82 static bool virtio_pci__specific_io_in(struct kvm *kvm, struct virtio_device *vdev, u16 port, 83 void *data, int size, int offset) 84 { 85 u32 config_offset; 86 struct virtio_pci *vpci = vdev->virtio; 87 int type = virtio__get_dev_specific_field(offset - 20, 88 virtio_pci__msix_enabled(vpci), 89 &config_offset); 90 if (type == VIRTIO_PCI_O_MSIX) { 91 switch (offset) { 92 case VIRTIO_MSI_CONFIG_VECTOR: 93 ioport__write16(data, vpci->config_vector); 94 break; 95 case VIRTIO_MSI_QUEUE_VECTOR: 96 ioport__write16(data, vpci->vq_vector[vpci->queue_selector]); 97 break; 98 }; 99 100 return true; 101 } else if (type == VIRTIO_PCI_O_CONFIG) { 102 u8 cfg; 103 104 cfg = vdev->ops->get_config(kvm, vpci->dev)[config_offset]; 105 ioport__write8(data, cfg); 106 return true; 107 } 108 109 return false; 110 } 111 112 static bool virtio_pci__io_in(struct ioport *ioport, struct kvm_cpu *vcpu, u16 port, void *data, int size) 113 { 114 unsigned long offset; 115 bool ret = true; 116 struct virtio_device *vdev; 117 struct virtio_pci *vpci; 118 struct kvm *kvm; 119 u32 val; 120 121 kvm = vcpu->kvm; 122 vdev = ioport->priv; 123 vpci = vdev->virtio; 124 offset = port - vpci->port_addr; 125 126 switch (offset) { 127 case VIRTIO_PCI_HOST_FEATURES: 128 val = vdev->ops->get_host_features(kvm, vpci->dev); 129 ioport__write32(data, val); 130 break; 131 case VIRTIO_PCI_QUEUE_PFN: 132 val = vdev->ops->get_pfn_vq(kvm, vpci->dev, vpci->queue_selector); 133 ioport__write32(data, val); 134 break; 135 case VIRTIO_PCI_QUEUE_NUM: 136 val = vdev->ops->get_size_vq(kvm, vpci->dev, vpci->queue_selector); 137 ioport__write16(data, val); 138 break; 139 case VIRTIO_PCI_STATUS: 140 ioport__write8(data, vpci->status); 141 break; 142 case VIRTIO_PCI_ISR: 143 ioport__write8(data, vpci->isr); 144 kvm__irq_line(kvm, vpci->legacy_irq_line, VIRTIO_IRQ_LOW); 145 vpci->isr = VIRTIO_IRQ_LOW; 146 break; 147 default: 148 ret = virtio_pci__specific_io_in(kvm, vdev, port, data, size, offset); 149 break; 150 }; 151 152 return ret; 153 } 154 155 static void update_msix_map(struct virtio_pci *vpci, 156 struct msix_table *msix_entry, u32 vecnum) 157 { 158 u32 gsi, i; 159 160 /* Find the GSI number used for that vector */ 161 if (vecnum == vpci->config_vector) { 162 gsi = vpci->config_gsi; 163 } else { 164 for (i = 0; i < VIRTIO_PCI_MAX_VQ; i++) 165 if (vpci->vq_vector[i] == vecnum) 166 break; 167 if (i == VIRTIO_PCI_MAX_VQ) 168 return; 169 gsi = vpci->gsis[i]; 170 } 171 172 if (gsi == 0) 173 return; 174 175 msix_entry = &msix_entry[vecnum]; 176 irq__update_msix_route(vpci->kvm, gsi, &msix_entry->msg); 177 } 178 179 static bool virtio_pci__specific_io_out(struct kvm *kvm, struct virtio_device *vdev, u16 port, 180 void *data, int size, int offset) 181 { 182 struct virtio_pci *vpci = vdev->virtio; 183 u32 config_offset, vec; 184 int gsi; 185 int type = virtio__get_dev_specific_field(offset - 20, virtio_pci__msix_enabled(vpci), 186 &config_offset); 187 if (type == VIRTIO_PCI_O_MSIX) { 188 switch (offset) { 189 case VIRTIO_MSI_CONFIG_VECTOR: 190 vec = vpci->config_vector = ioport__read16(data); 191 if (vec == VIRTIO_MSI_NO_VECTOR) 192 break; 193 194 gsi = irq__add_msix_route(kvm, 195 &vpci->msix_table[vec].msg); 196 /* 197 * We don't need IRQ routing if we can use 198 * MSI injection via the KVM_SIGNAL_MSI ioctl. 199 */ 200 if (gsi == -ENXIO && 201 vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 202 break; 203 204 if (gsi < 0) { 205 die("failed to configure MSIs"); 206 break; 207 } 208 209 vpci->config_gsi = gsi; 210 break; 211 case VIRTIO_MSI_QUEUE_VECTOR: 212 vec = ioport__read16(data); 213 vpci->vq_vector[vpci->queue_selector] = vec; 214 215 if (vec == VIRTIO_MSI_NO_VECTOR) 216 break; 217 218 gsi = irq__add_msix_route(kvm, 219 &vpci->msix_table[vec].msg); 220 /* 221 * We don't need IRQ routing if we can use 222 * MSI injection via the KVM_SIGNAL_MSI ioctl. 223 */ 224 if (gsi == -ENXIO && 225 vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 226 break; 227 228 if (gsi < 0) { 229 die("failed to configure MSIs"); 230 break; 231 } 232 233 vpci->gsis[vpci->queue_selector] = gsi; 234 if (vdev->ops->notify_vq_gsi) 235 vdev->ops->notify_vq_gsi(kvm, vpci->dev, 236 vpci->queue_selector, 237 gsi); 238 break; 239 }; 240 241 return true; 242 } else if (type == VIRTIO_PCI_O_CONFIG) { 243 vdev->ops->get_config(kvm, vpci->dev)[config_offset] = *(u8 *)data; 244 245 return true; 246 } 247 248 return false; 249 } 250 251 static bool virtio_pci__io_out(struct ioport *ioport, struct kvm_cpu *vcpu, u16 port, void *data, int size) 252 { 253 unsigned long offset; 254 bool ret = true; 255 struct virtio_device *vdev; 256 struct virtio_pci *vpci; 257 struct kvm *kvm; 258 u32 val; 259 260 kvm = vcpu->kvm; 261 vdev = ioport->priv; 262 vpci = vdev->virtio; 263 offset = port - vpci->port_addr; 264 265 switch (offset) { 266 case VIRTIO_PCI_GUEST_FEATURES: 267 val = ioport__read32(data); 268 vdev->ops->set_guest_features(kvm, vpci->dev, val); 269 break; 270 case VIRTIO_PCI_QUEUE_PFN: 271 val = ioport__read32(data); 272 virtio_pci__init_ioeventfd(kvm, vdev, vpci->queue_selector); 273 vdev->ops->init_vq(kvm, vpci->dev, vpci->queue_selector, 274 1 << VIRTIO_PCI_QUEUE_ADDR_SHIFT, 275 VIRTIO_PCI_VRING_ALIGN, val); 276 break; 277 case VIRTIO_PCI_QUEUE_SEL: 278 vpci->queue_selector = ioport__read16(data); 279 break; 280 case VIRTIO_PCI_QUEUE_NOTIFY: 281 val = ioport__read16(data); 282 vdev->ops->notify_vq(kvm, vpci->dev, val); 283 break; 284 case VIRTIO_PCI_STATUS: 285 vpci->status = ioport__read8(data); 286 if (!vpci->status) /* Sample endianness on reset */ 287 vdev->endian = kvm_cpu__get_endianness(vcpu); 288 if (vdev->ops->notify_status) 289 vdev->ops->notify_status(kvm, vpci->dev, vpci->status); 290 break; 291 default: 292 ret = virtio_pci__specific_io_out(kvm, vdev, port, data, size, offset); 293 break; 294 }; 295 296 return ret; 297 } 298 299 static struct ioport_operations virtio_pci__io_ops = { 300 .io_in = virtio_pci__io_in, 301 .io_out = virtio_pci__io_out, 302 }; 303 304 static void virtio_pci__msix_mmio_callback(struct kvm_cpu *vcpu, 305 u64 addr, u8 *data, u32 len, 306 u8 is_write, void *ptr) 307 { 308 struct virtio_pci *vpci = ptr; 309 struct msix_table *table; 310 int vecnum; 311 size_t offset; 312 313 if (addr > vpci->msix_io_block + PCI_IO_SIZE) { 314 if (is_write) 315 return; 316 table = (struct msix_table *)&vpci->msix_pba; 317 offset = addr - (vpci->msix_io_block + PCI_IO_SIZE); 318 } else { 319 table = vpci->msix_table; 320 offset = addr - vpci->msix_io_block; 321 } 322 vecnum = offset / sizeof(struct msix_table); 323 offset = offset % sizeof(struct msix_table); 324 325 if (!is_write) { 326 memcpy(data, (void *)&table[vecnum] + offset, len); 327 return; 328 } 329 330 memcpy((void *)&table[vecnum] + offset, data, len); 331 332 /* Did we just update the address or payload? */ 333 if (offset < offsetof(struct msix_table, ctrl)) 334 update_msix_map(vpci, table, vecnum); 335 } 336 337 static void virtio_pci__signal_msi(struct kvm *kvm, struct virtio_pci *vpci, int vec) 338 { 339 struct kvm_msi msi = { 340 .address_lo = vpci->msix_table[vec].msg.address_lo, 341 .address_hi = vpci->msix_table[vec].msg.address_hi, 342 .data = vpci->msix_table[vec].msg.data, 343 }; 344 345 ioctl(kvm->vm_fd, KVM_SIGNAL_MSI, &msi); 346 } 347 348 int virtio_pci__signal_vq(struct kvm *kvm, struct virtio_device *vdev, u32 vq) 349 { 350 struct virtio_pci *vpci = vdev->virtio; 351 int tbl = vpci->vq_vector[vq]; 352 353 if (virtio_pci__msix_enabled(vpci) && tbl != VIRTIO_MSI_NO_VECTOR) { 354 if (vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_MASKALL) || 355 vpci->msix_table[tbl].ctrl & cpu_to_le16(PCI_MSIX_ENTRY_CTRL_MASKBIT)) { 356 357 vpci->msix_pba |= 1 << tbl; 358 return 0; 359 } 360 361 if (vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 362 virtio_pci__signal_msi(kvm, vpci, vpci->vq_vector[vq]); 363 else 364 kvm__irq_trigger(kvm, vpci->gsis[vq]); 365 } else { 366 vpci->isr = VIRTIO_IRQ_HIGH; 367 kvm__irq_trigger(kvm, vpci->legacy_irq_line); 368 } 369 return 0; 370 } 371 372 int virtio_pci__signal_config(struct kvm *kvm, struct virtio_device *vdev) 373 { 374 struct virtio_pci *vpci = vdev->virtio; 375 int tbl = vpci->config_vector; 376 377 if (virtio_pci__msix_enabled(vpci) && tbl != VIRTIO_MSI_NO_VECTOR) { 378 if (vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_MASKALL) || 379 vpci->msix_table[tbl].ctrl & cpu_to_le16(PCI_MSIX_ENTRY_CTRL_MASKBIT)) { 380 381 vpci->msix_pba |= 1 << tbl; 382 return 0; 383 } 384 385 if (vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 386 virtio_pci__signal_msi(kvm, vpci, tbl); 387 else 388 kvm__irq_trigger(kvm, vpci->config_gsi); 389 } else { 390 vpci->isr = VIRTIO_PCI_ISR_CONFIG; 391 kvm__irq_trigger(kvm, vpci->legacy_irq_line); 392 } 393 394 return 0; 395 } 396 397 static void virtio_pci__io_mmio_callback(struct kvm_cpu *vcpu, 398 u64 addr, u8 *data, u32 len, 399 u8 is_write, void *ptr) 400 { 401 struct virtio_pci *vpci = ptr; 402 int direction = is_write ? KVM_EXIT_IO_OUT : KVM_EXIT_IO_IN; 403 u16 port = vpci->port_addr + (addr & (IOPORT_SIZE - 1)); 404 405 kvm__emulate_io(vcpu, port, data, direction, len, 1); 406 } 407 408 int virtio_pci__init(struct kvm *kvm, void *dev, struct virtio_device *vdev, 409 int device_id, int subsys_id, int class) 410 { 411 struct virtio_pci *vpci = vdev->virtio; 412 int r; 413 414 vpci->kvm = kvm; 415 vpci->dev = dev; 416 417 r = ioport__register(kvm, IOPORT_EMPTY, &virtio_pci__io_ops, IOPORT_SIZE, vdev); 418 if (r < 0) 419 return r; 420 vpci->port_addr = (u16)r; 421 422 vpci->mmio_addr = pci_get_io_space_block(IOPORT_SIZE); 423 r = kvm__register_mmio(kvm, vpci->mmio_addr, IOPORT_SIZE, false, 424 virtio_pci__io_mmio_callback, vpci); 425 if (r < 0) 426 goto free_ioport; 427 428 vpci->msix_io_block = pci_get_io_space_block(PCI_IO_SIZE * 2); 429 r = kvm__register_mmio(kvm, vpci->msix_io_block, PCI_IO_SIZE * 2, false, 430 virtio_pci__msix_mmio_callback, vpci); 431 if (r < 0) 432 goto free_mmio; 433 434 vpci->pci_hdr = (struct pci_device_header) { 435 .vendor_id = cpu_to_le16(PCI_VENDOR_ID_REDHAT_QUMRANET), 436 .device_id = cpu_to_le16(device_id), 437 .command = PCI_COMMAND_IO | PCI_COMMAND_MEMORY, 438 .header_type = PCI_HEADER_TYPE_NORMAL, 439 .revision_id = 0, 440 .class[0] = class & 0xff, 441 .class[1] = (class >> 8) & 0xff, 442 .class[2] = (class >> 16) & 0xff, 443 .subsys_vendor_id = cpu_to_le16(PCI_SUBSYSTEM_VENDOR_ID_REDHAT_QUMRANET), 444 .subsys_id = cpu_to_le16(subsys_id), 445 .bar[0] = cpu_to_le32(vpci->mmio_addr 446 | PCI_BASE_ADDRESS_SPACE_MEMORY), 447 .bar[1] = cpu_to_le32(vpci->port_addr 448 | PCI_BASE_ADDRESS_SPACE_IO), 449 .bar[2] = cpu_to_le32(vpci->msix_io_block 450 | PCI_BASE_ADDRESS_SPACE_MEMORY), 451 .status = cpu_to_le16(PCI_STATUS_CAP_LIST), 452 .capabilities = (void *)&vpci->pci_hdr.msix - (void *)&vpci->pci_hdr, 453 .bar_size[0] = cpu_to_le32(IOPORT_SIZE), 454 .bar_size[1] = cpu_to_le32(IOPORT_SIZE), 455 .bar_size[2] = cpu_to_le32(PCI_IO_SIZE*2), 456 }; 457 458 vpci->dev_hdr = (struct device_header) { 459 .bus_type = DEVICE_BUS_PCI, 460 .data = &vpci->pci_hdr, 461 }; 462 463 vpci->pci_hdr.msix.cap = PCI_CAP_ID_MSIX; 464 vpci->pci_hdr.msix.next = 0; 465 /* 466 * We at most have VIRTIO_PCI_MAX_VQ entries for virt queue, 467 * VIRTIO_PCI_MAX_CONFIG entries for config. 468 * 469 * To quote the PCI spec: 470 * 471 * System software reads this field to determine the 472 * MSI-X Table Size N, which is encoded as N-1. 473 * For example, a returned value of "00000000011" 474 * indicates a table size of 4. 475 */ 476 vpci->pci_hdr.msix.ctrl = cpu_to_le16(VIRTIO_PCI_MAX_VQ + VIRTIO_PCI_MAX_CONFIG - 1); 477 478 /* Both table and PBA are mapped to the same BAR (2) */ 479 vpci->pci_hdr.msix.table_offset = cpu_to_le32(2); 480 vpci->pci_hdr.msix.pba_offset = cpu_to_le32(2 | PCI_IO_SIZE); 481 vpci->config_vector = 0; 482 483 if (kvm__supports_extension(kvm, KVM_CAP_SIGNAL_MSI)) 484 vpci->features |= VIRTIO_PCI_F_SIGNAL_MSI; 485 486 r = device__register(&vpci->dev_hdr); 487 if (r < 0) 488 goto free_msix_mmio; 489 490 /* save the IRQ that device__register() has allocated */ 491 vpci->legacy_irq_line = vpci->pci_hdr.irq_line; 492 493 return 0; 494 495 free_msix_mmio: 496 kvm__deregister_mmio(kvm, vpci->msix_io_block); 497 free_mmio: 498 kvm__deregister_mmio(kvm, vpci->mmio_addr); 499 free_ioport: 500 ioport__unregister(kvm, vpci->port_addr); 501 return r; 502 } 503 504 int virtio_pci__exit(struct kvm *kvm, struct virtio_device *vdev) 505 { 506 struct virtio_pci *vpci = vdev->virtio; 507 int i; 508 509 kvm__deregister_mmio(kvm, vpci->mmio_addr); 510 kvm__deregister_mmio(kvm, vpci->msix_io_block); 511 ioport__unregister(kvm, vpci->port_addr); 512 513 for (i = 0; i < VIRTIO_PCI_MAX_VQ; i++) { 514 ioeventfd__del_event(vpci->port_addr + VIRTIO_PCI_QUEUE_NOTIFY, i); 515 ioeventfd__del_event(vpci->mmio_addr + VIRTIO_PCI_QUEUE_NOTIFY, i); 516 } 517 518 return 0; 519 } 520