1 #include "kvm/virtio-pci.h" 2 3 #include "kvm/ioport.h" 4 #include "kvm/kvm.h" 5 #include "kvm/kvm-cpu.h" 6 #include "kvm/virtio-pci-dev.h" 7 #include "kvm/irq.h" 8 #include "kvm/virtio.h" 9 #include "kvm/ioeventfd.h" 10 #include "kvm/util.h" 11 12 #include <sys/ioctl.h> 13 #include <linux/virtio_pci.h> 14 #include <linux/byteorder.h> 15 #include <assert.h> 16 #include <string.h> 17 18 #define ALIGN_UP(x, s) ALIGN((x) + (s) - 1, (s)) 19 #define VIRTIO_NR_MSIX (VIRTIO_PCI_MAX_VQ + VIRTIO_PCI_MAX_CONFIG) 20 #define VIRTIO_MSIX_TABLE_SIZE (VIRTIO_NR_MSIX * 16) 21 #define VIRTIO_MSIX_PBA_SIZE (ALIGN_UP(VIRTIO_MSIX_TABLE_SIZE, 64) / 8) 22 #define VIRTIO_MSIX_BAR_SIZE (1UL << fls_long(VIRTIO_MSIX_TABLE_SIZE + \ 23 VIRTIO_MSIX_PBA_SIZE)) 24 25 static u16 virtio_pci__port_addr(struct virtio_pci *vpci) 26 { 27 return pci__bar_address(&vpci->pci_hdr, 0); 28 } 29 30 static u32 virtio_pci__mmio_addr(struct virtio_pci *vpci) 31 { 32 return pci__bar_address(&vpci->pci_hdr, 1); 33 } 34 35 static u32 virtio_pci__msix_io_addr(struct virtio_pci *vpci) 36 { 37 return pci__bar_address(&vpci->pci_hdr, 2); 38 } 39 40 static int virtio_pci__add_msix_route(struct virtio_pci *vpci, u32 vec) 41 { 42 int gsi; 43 struct msi_msg *msg; 44 45 if (vec == VIRTIO_MSI_NO_VECTOR) 46 return -EINVAL; 47 48 msg = &vpci->msix_table[vec].msg; 49 gsi = irq__add_msix_route(vpci->kvm, msg, vpci->dev_hdr.dev_num << 3); 50 /* 51 * We don't need IRQ routing if we can use 52 * MSI injection via the KVM_SIGNAL_MSI ioctl. 53 */ 54 if (gsi == -ENXIO && vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 55 return gsi; 56 57 if (gsi < 0) 58 die("failed to configure MSIs"); 59 60 return gsi; 61 } 62 63 static void virtio_pci__del_msix_route(struct virtio_pci *vpci, u32 gsi) 64 { 65 struct msi_msg msg = { 0 }; 66 67 irq__update_msix_route(vpci->kvm, gsi, &msg); 68 } 69 70 static void virtio_pci__ioevent_callback(struct kvm *kvm, void *param) 71 { 72 struct virtio_pci_ioevent_param *ioeventfd = param; 73 struct virtio_pci *vpci = ioeventfd->vdev->virtio; 74 75 ioeventfd->vdev->ops->notify_vq(kvm, vpci->dev, ioeventfd->vq); 76 } 77 78 static int virtio_pci__init_ioeventfd(struct kvm *kvm, struct virtio_device *vdev, u32 vq) 79 { 80 struct ioevent ioevent; 81 struct virtio_pci *vpci = vdev->virtio; 82 u32 mmio_addr = virtio_pci__mmio_addr(vpci); 83 u16 port_addr = virtio_pci__port_addr(vpci); 84 off_t offset = vpci->doorbell_offset; 85 int r, flags = 0; 86 int pio_fd, mmio_fd; 87 88 vpci->ioeventfds[vq] = (struct virtio_pci_ioevent_param) { 89 .vdev = vdev, 90 .vq = vq, 91 }; 92 93 ioevent = (struct ioevent) { 94 .fn = virtio_pci__ioevent_callback, 95 .fn_ptr = &vpci->ioeventfds[vq], 96 .datamatch = vq, 97 .fn_kvm = kvm, 98 }; 99 100 /* 101 * Vhost will poll the eventfd in host kernel side, otherwise we 102 * need to poll in userspace. 103 */ 104 if (!vdev->use_vhost) 105 flags |= IOEVENTFD_FLAG_USER_POLL; 106 107 /* ioport */ 108 ioevent.io_addr = port_addr + offset; 109 ioevent.io_len = sizeof(u16); 110 ioevent.fd = pio_fd = eventfd(0, 0); 111 r = ioeventfd__add_event(&ioevent, flags | IOEVENTFD_FLAG_PIO); 112 if (r) 113 return r; 114 115 /* mmio */ 116 ioevent.io_addr = mmio_addr + offset; 117 ioevent.io_len = sizeof(u16); 118 ioevent.fd = mmio_fd = eventfd(0, 0); 119 r = ioeventfd__add_event(&ioevent, flags); 120 if (r) 121 goto free_ioport_evt; 122 123 if (vdev->ops->notify_vq_eventfd) 124 vdev->ops->notify_vq_eventfd(kvm, vpci->dev, vq, 125 vdev->legacy ? pio_fd : mmio_fd); 126 return 0; 127 128 free_ioport_evt: 129 ioeventfd__del_event(port_addr + offset, vq); 130 return r; 131 } 132 133 static int virtio_pci_init_vq(struct kvm *kvm, struct virtio_device *vdev, 134 int vq) 135 { 136 int ret; 137 struct virtio_pci *vpci = vdev->virtio; 138 139 ret = virtio_pci__init_ioeventfd(kvm, vdev, vq); 140 if (ret) { 141 pr_err("couldn't add ioeventfd for vq %d: %d", vq, ret); 142 return ret; 143 } 144 return vdev->ops->init_vq(kvm, vpci->dev, vq); 145 } 146 147 static void virtio_pci_exit_vq(struct kvm *kvm, struct virtio_device *vdev, 148 int vq) 149 { 150 struct virtio_pci *vpci = vdev->virtio; 151 u32 mmio_addr = virtio_pci__mmio_addr(vpci); 152 u16 port_addr = virtio_pci__port_addr(vpci); 153 off_t offset = vpci->doorbell_offset; 154 155 virtio_pci__del_msix_route(vpci, vpci->gsis[vq]); 156 vpci->gsis[vq] = 0; 157 vpci->vq_vector[vq] = VIRTIO_MSI_NO_VECTOR; 158 ioeventfd__del_event(mmio_addr + offset, vq); 159 ioeventfd__del_event(port_addr + offset, vq); 160 virtio_exit_vq(kvm, vdev, vpci->dev, vq); 161 } 162 163 static inline bool virtio_pci__msix_enabled(struct virtio_pci *vpci) 164 { 165 return vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_ENABLE); 166 } 167 168 static bool virtio_pci__specific_data_in(struct kvm *kvm, struct virtio_device *vdev, 169 void *data, u32 size, unsigned long offset) 170 { 171 u32 config_offset; 172 struct virtio_pci *vpci = vdev->virtio; 173 int type = virtio__get_dev_specific_field(offset - 20, 174 virtio_pci__msix_enabled(vpci), 175 &config_offset); 176 if (type == VIRTIO_PCI_O_MSIX) { 177 switch (offset) { 178 case VIRTIO_MSI_CONFIG_VECTOR: 179 ioport__write16(data, vpci->config_vector); 180 break; 181 case VIRTIO_MSI_QUEUE_VECTOR: 182 ioport__write16(data, vpci->vq_vector[vpci->queue_selector]); 183 break; 184 }; 185 186 return true; 187 } else if (type == VIRTIO_PCI_O_CONFIG) { 188 return virtio_access_config(kvm, vdev, vpci->dev, config_offset, 189 data, size, false); 190 } 191 192 return false; 193 } 194 195 static bool virtio_pci__data_in(struct kvm_cpu *vcpu, struct virtio_device *vdev, 196 unsigned long offset, void *data, u32 size) 197 { 198 bool ret = true; 199 struct virtio_pci *vpci; 200 struct virt_queue *vq; 201 struct kvm *kvm; 202 u32 val; 203 204 kvm = vcpu->kvm; 205 vpci = vdev->virtio; 206 207 switch (offset) { 208 case VIRTIO_PCI_HOST_FEATURES: 209 val = vdev->ops->get_host_features(kvm, vpci->dev); 210 ioport__write32(data, val); 211 break; 212 case VIRTIO_PCI_QUEUE_PFN: 213 vq = vdev->ops->get_vq(kvm, vpci->dev, vpci->queue_selector); 214 ioport__write32(data, vq->vring_addr.pfn); 215 break; 216 case VIRTIO_PCI_QUEUE_NUM: 217 val = vdev->ops->get_size_vq(kvm, vpci->dev, vpci->queue_selector); 218 ioport__write16(data, val); 219 break; 220 case VIRTIO_PCI_STATUS: 221 ioport__write8(data, vpci->status); 222 break; 223 case VIRTIO_PCI_ISR: 224 ioport__write8(data, vpci->isr); 225 kvm__irq_line(kvm, vpci->legacy_irq_line, VIRTIO_IRQ_LOW); 226 vpci->isr = VIRTIO_IRQ_LOW; 227 break; 228 default: 229 ret = virtio_pci__specific_data_in(kvm, vdev, data, size, offset); 230 break; 231 }; 232 233 return ret; 234 } 235 236 static void update_msix_map(struct virtio_pci *vpci, 237 struct msix_table *msix_entry, u32 vecnum) 238 { 239 u32 gsi, i; 240 241 /* Find the GSI number used for that vector */ 242 if (vecnum == vpci->config_vector) { 243 gsi = vpci->config_gsi; 244 } else { 245 for (i = 0; i < VIRTIO_PCI_MAX_VQ; i++) 246 if (vpci->vq_vector[i] == vecnum) 247 break; 248 if (i == VIRTIO_PCI_MAX_VQ) 249 return; 250 gsi = vpci->gsis[i]; 251 } 252 253 if (gsi == 0) 254 return; 255 256 msix_entry = &msix_entry[vecnum]; 257 irq__update_msix_route(vpci->kvm, gsi, &msix_entry->msg); 258 } 259 260 static bool virtio_pci__specific_data_out(struct kvm *kvm, struct virtio_device *vdev, 261 void *data, u32 size, unsigned long offset) 262 { 263 struct virtio_pci *vpci = vdev->virtio; 264 u32 config_offset, vec; 265 int gsi; 266 int type = virtio__get_dev_specific_field(offset - 20, virtio_pci__msix_enabled(vpci), 267 &config_offset); 268 if (type == VIRTIO_PCI_O_MSIX) { 269 switch (offset) { 270 case VIRTIO_MSI_CONFIG_VECTOR: 271 vec = vpci->config_vector = ioport__read16(data); 272 273 gsi = virtio_pci__add_msix_route(vpci, vec); 274 if (gsi < 0) 275 break; 276 277 vpci->config_gsi = gsi; 278 break; 279 case VIRTIO_MSI_QUEUE_VECTOR: 280 vec = ioport__read16(data); 281 vpci->vq_vector[vpci->queue_selector] = vec; 282 283 gsi = virtio_pci__add_msix_route(vpci, vec); 284 if (gsi < 0) 285 break; 286 287 vpci->gsis[vpci->queue_selector] = gsi; 288 if (vdev->ops->notify_vq_gsi) 289 vdev->ops->notify_vq_gsi(kvm, vpci->dev, 290 vpci->queue_selector, 291 gsi); 292 break; 293 }; 294 295 return true; 296 } else if (type == VIRTIO_PCI_O_CONFIG) { 297 return virtio_access_config(kvm, vdev, vpci->dev, config_offset, 298 data, size, true); 299 } 300 301 return false; 302 } 303 304 static bool virtio_pci__data_out(struct kvm_cpu *vcpu, struct virtio_device *vdev, 305 unsigned long offset, void *data, u32 size) 306 { 307 bool ret = true; 308 struct virtio_pci *vpci; 309 struct virt_queue *vq; 310 struct kvm *kvm; 311 u32 val; 312 unsigned int vq_count; 313 314 kvm = vcpu->kvm; 315 vpci = vdev->virtio; 316 vq_count = vdev->ops->get_vq_count(kvm, vpci->dev); 317 318 switch (offset) { 319 case VIRTIO_PCI_GUEST_FEATURES: 320 val = ioport__read32(data); 321 virtio_set_guest_features(kvm, vdev, vpci->dev, val); 322 break; 323 case VIRTIO_PCI_QUEUE_PFN: 324 val = ioport__read32(data); 325 if (val) { 326 vq = vdev->ops->get_vq(kvm, vpci->dev, 327 vpci->queue_selector); 328 vq->vring_addr = (struct vring_addr) { 329 .legacy = true, 330 .pfn = val, 331 .align = VIRTIO_PCI_VRING_ALIGN, 332 .pgsize = 1 << VIRTIO_PCI_QUEUE_ADDR_SHIFT, 333 }; 334 virtio_pci_init_vq(kvm, vdev, vpci->queue_selector); 335 } else { 336 virtio_pci_exit_vq(kvm, vdev, vpci->queue_selector); 337 } 338 break; 339 case VIRTIO_PCI_QUEUE_SEL: 340 val = ioport__read16(data); 341 if (val >= vq_count) { 342 WARN_ONCE(1, "QUEUE_SEL value (%u) is larger than VQ count (%u)\n", 343 val, vq_count); 344 return false; 345 } 346 vpci->queue_selector = val; 347 break; 348 case VIRTIO_PCI_QUEUE_NOTIFY: 349 val = ioport__read16(data); 350 if (val >= vq_count) { 351 WARN_ONCE(1, "QUEUE_SEL value (%u) is larger than VQ count (%u)\n", 352 val, vq_count); 353 return false; 354 } 355 vdev->ops->notify_vq(kvm, vpci->dev, val); 356 break; 357 case VIRTIO_PCI_STATUS: 358 vpci->status = ioport__read8(data); 359 if (!vpci->status) /* Sample endianness on reset */ 360 vdev->endian = kvm_cpu__get_endianness(vcpu); 361 virtio_notify_status(kvm, vdev, vpci->dev, vpci->status); 362 break; 363 default: 364 ret = virtio_pci__specific_data_out(kvm, vdev, data, size, offset); 365 break; 366 }; 367 368 return ret; 369 } 370 371 static void virtio_pci__msix_mmio_callback(struct kvm_cpu *vcpu, 372 u64 addr, u8 *data, u32 len, 373 u8 is_write, void *ptr) 374 { 375 struct virtio_device *vdev = ptr; 376 struct virtio_pci *vpci = vdev->virtio; 377 struct msix_table *table; 378 u32 msix_io_addr = virtio_pci__msix_io_addr(vpci); 379 u32 pba_offset; 380 int vecnum; 381 size_t offset; 382 383 BUILD_BUG_ON(VIRTIO_NR_MSIX > (sizeof(vpci->msix_pba) * 8)); 384 385 pba_offset = vpci->pci_hdr.msix.pba_offset & ~PCI_MSIX_TABLE_BIR; 386 if (addr >= msix_io_addr + pba_offset) { 387 /* Read access to PBA */ 388 if (is_write) 389 return; 390 offset = addr - (msix_io_addr + pba_offset); 391 if ((offset + len) > sizeof (vpci->msix_pba)) 392 return; 393 memcpy(data, (void *)&vpci->msix_pba + offset, len); 394 return; 395 } 396 397 table = vpci->msix_table; 398 offset = addr - msix_io_addr; 399 400 vecnum = offset / sizeof(struct msix_table); 401 offset = offset % sizeof(struct msix_table); 402 403 if (!is_write) { 404 memcpy(data, (void *)&table[vecnum] + offset, len); 405 return; 406 } 407 408 memcpy((void *)&table[vecnum] + offset, data, len); 409 410 /* Did we just update the address or payload? */ 411 if (offset < offsetof(struct msix_table, ctrl)) 412 update_msix_map(vpci, table, vecnum); 413 } 414 415 static void virtio_pci__signal_msi(struct kvm *kvm, struct virtio_pci *vpci, 416 int vec) 417 { 418 struct kvm_msi msi = { 419 .address_lo = vpci->msix_table[vec].msg.address_lo, 420 .address_hi = vpci->msix_table[vec].msg.address_hi, 421 .data = vpci->msix_table[vec].msg.data, 422 }; 423 424 if (kvm->msix_needs_devid) { 425 msi.flags = KVM_MSI_VALID_DEVID; 426 msi.devid = vpci->dev_hdr.dev_num << 3; 427 } 428 429 irq__signal_msi(kvm, &msi); 430 } 431 432 int virtio_pci__signal_vq(struct kvm *kvm, struct virtio_device *vdev, u32 vq) 433 { 434 struct virtio_pci *vpci = vdev->virtio; 435 int tbl = vpci->vq_vector[vq]; 436 437 if (virtio_pci__msix_enabled(vpci) && tbl != VIRTIO_MSI_NO_VECTOR) { 438 if (vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_MASKALL) || 439 vpci->msix_table[tbl].ctrl & cpu_to_le16(PCI_MSIX_ENTRY_CTRL_MASKBIT)) { 440 441 vpci->msix_pba |= 1 << tbl; 442 return 0; 443 } 444 445 if (vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 446 virtio_pci__signal_msi(kvm, vpci, vpci->vq_vector[vq]); 447 else 448 kvm__irq_trigger(kvm, vpci->gsis[vq]); 449 } else { 450 vpci->isr = VIRTIO_IRQ_HIGH; 451 kvm__irq_line(kvm, vpci->legacy_irq_line, VIRTIO_IRQ_HIGH); 452 } 453 return 0; 454 } 455 456 int virtio_pci__signal_config(struct kvm *kvm, struct virtio_device *vdev) 457 { 458 struct virtio_pci *vpci = vdev->virtio; 459 int tbl = vpci->config_vector; 460 461 if (virtio_pci__msix_enabled(vpci) && tbl != VIRTIO_MSI_NO_VECTOR) { 462 if (vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_MASKALL) || 463 vpci->msix_table[tbl].ctrl & cpu_to_le16(PCI_MSIX_ENTRY_CTRL_MASKBIT)) { 464 465 vpci->msix_pba |= 1 << tbl; 466 return 0; 467 } 468 469 if (vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 470 virtio_pci__signal_msi(kvm, vpci, tbl); 471 else 472 kvm__irq_trigger(kvm, vpci->config_gsi); 473 } else { 474 vpci->isr = VIRTIO_PCI_ISR_CONFIG; 475 kvm__irq_trigger(kvm, vpci->legacy_irq_line); 476 } 477 478 return 0; 479 } 480 481 static void virtio_pci__io_mmio_callback(struct kvm_cpu *vcpu, 482 u64 addr, u8 *data, u32 len, 483 u8 is_write, void *ptr) 484 { 485 struct virtio_device *vdev = ptr; 486 struct virtio_pci *vpci = vdev->virtio; 487 u32 ioport_addr = virtio_pci__port_addr(vpci); 488 u32 base_addr; 489 490 if (addr >= ioport_addr && 491 addr < ioport_addr + pci__bar_size(&vpci->pci_hdr, 0)) 492 base_addr = ioport_addr; 493 else 494 base_addr = virtio_pci__mmio_addr(vpci); 495 496 if (!is_write) 497 virtio_pci__data_in(vcpu, vdev, addr - base_addr, data, len); 498 else 499 virtio_pci__data_out(vcpu, vdev, addr - base_addr, data, len); 500 } 501 502 static int virtio_pci__bar_activate(struct kvm *kvm, 503 struct pci_device_header *pci_hdr, 504 int bar_num, void *data) 505 { 506 struct virtio_device *vdev = data; 507 u32 bar_addr, bar_size; 508 int r = -EINVAL; 509 510 assert(bar_num <= 2); 511 512 bar_addr = pci__bar_address(pci_hdr, bar_num); 513 bar_size = pci__bar_size(pci_hdr, bar_num); 514 515 switch (bar_num) { 516 case 0: 517 r = kvm__register_pio(kvm, bar_addr, bar_size, 518 virtio_pci__io_mmio_callback, vdev); 519 break; 520 case 1: 521 r = kvm__register_mmio(kvm, bar_addr, bar_size, false, 522 virtio_pci__io_mmio_callback, vdev); 523 break; 524 case 2: 525 r = kvm__register_mmio(kvm, bar_addr, bar_size, false, 526 virtio_pci__msix_mmio_callback, vdev); 527 break; 528 } 529 530 return r; 531 } 532 533 static int virtio_pci__bar_deactivate(struct kvm *kvm, 534 struct pci_device_header *pci_hdr, 535 int bar_num, void *data) 536 { 537 u32 bar_addr; 538 bool success; 539 int r = -EINVAL; 540 541 assert(bar_num <= 2); 542 543 bar_addr = pci__bar_address(pci_hdr, bar_num); 544 545 switch (bar_num) { 546 case 0: 547 r = kvm__deregister_pio(kvm, bar_addr); 548 break; 549 case 1: 550 case 2: 551 success = kvm__deregister_mmio(kvm, bar_addr); 552 /* kvm__deregister_mmio fails when the region is not found. */ 553 r = (success ? 0 : -ENOENT); 554 break; 555 } 556 557 return r; 558 } 559 560 int virtio_pci__init(struct kvm *kvm, void *dev, struct virtio_device *vdev, 561 int device_id, int subsys_id, int class) 562 { 563 struct virtio_pci *vpci = vdev->virtio; 564 u32 mmio_addr, msix_io_block; 565 u16 port_addr; 566 int r; 567 568 vpci->kvm = kvm; 569 vpci->dev = dev; 570 571 BUILD_BUG_ON(!is_power_of_two(PCI_IO_SIZE)); 572 573 port_addr = pci_get_io_port_block(PCI_IO_SIZE); 574 mmio_addr = pci_get_mmio_block(PCI_IO_SIZE); 575 msix_io_block = pci_get_mmio_block(VIRTIO_MSIX_BAR_SIZE); 576 577 vpci->doorbell_offset = VIRTIO_PCI_QUEUE_NOTIFY; 578 579 vpci->pci_hdr = (struct pci_device_header) { 580 .vendor_id = cpu_to_le16(PCI_VENDOR_ID_REDHAT_QUMRANET), 581 .device_id = cpu_to_le16(device_id), 582 .command = PCI_COMMAND_IO | PCI_COMMAND_MEMORY, 583 .header_type = PCI_HEADER_TYPE_NORMAL, 584 .revision_id = 0, 585 .class[0] = class & 0xff, 586 .class[1] = (class >> 8) & 0xff, 587 .class[2] = (class >> 16) & 0xff, 588 .subsys_vendor_id = cpu_to_le16(PCI_SUBSYSTEM_VENDOR_ID_REDHAT_QUMRANET), 589 .subsys_id = cpu_to_le16(subsys_id), 590 .bar[0] = cpu_to_le32(port_addr 591 | PCI_BASE_ADDRESS_SPACE_IO), 592 .bar[1] = cpu_to_le32(mmio_addr 593 | PCI_BASE_ADDRESS_SPACE_MEMORY), 594 .bar[2] = cpu_to_le32(msix_io_block 595 | PCI_BASE_ADDRESS_SPACE_MEMORY), 596 .status = cpu_to_le16(PCI_STATUS_CAP_LIST), 597 .capabilities = (void *)&vpci->pci_hdr.msix - (void *)&vpci->pci_hdr, 598 .bar_size[0] = cpu_to_le32(PCI_IO_SIZE), 599 .bar_size[1] = cpu_to_le32(PCI_IO_SIZE), 600 .bar_size[2] = cpu_to_le32(VIRTIO_MSIX_BAR_SIZE), 601 }; 602 603 r = pci__register_bar_regions(kvm, &vpci->pci_hdr, 604 virtio_pci__bar_activate, 605 virtio_pci__bar_deactivate, vdev); 606 if (r < 0) 607 return r; 608 609 vpci->dev_hdr = (struct device_header) { 610 .bus_type = DEVICE_BUS_PCI, 611 .data = &vpci->pci_hdr, 612 }; 613 614 vpci->pci_hdr.msix.cap = PCI_CAP_ID_MSIX; 615 vpci->pci_hdr.msix.next = 0; 616 /* 617 * We at most have VIRTIO_NR_MSIX entries (VIRTIO_PCI_MAX_VQ 618 * entries for virt queue, VIRTIO_PCI_MAX_CONFIG entries for 619 * config). 620 * 621 * To quote the PCI spec: 622 * 623 * System software reads this field to determine the 624 * MSI-X Table Size N, which is encoded as N-1. 625 * For example, a returned value of "00000000011" 626 * indicates a table size of 4. 627 */ 628 vpci->pci_hdr.msix.ctrl = cpu_to_le16(VIRTIO_NR_MSIX - 1); 629 630 /* Both table and PBA are mapped to the same BAR (2) */ 631 vpci->pci_hdr.msix.table_offset = cpu_to_le32(2); 632 vpci->pci_hdr.msix.pba_offset = cpu_to_le32(2 | VIRTIO_MSIX_TABLE_SIZE); 633 vpci->config_vector = 0; 634 635 if (irq__can_signal_msi(kvm)) 636 vpci->features |= VIRTIO_PCI_F_SIGNAL_MSI; 637 638 vpci->legacy_irq_line = pci__assign_irq(&vpci->pci_hdr); 639 640 r = device__register(&vpci->dev_hdr); 641 if (r < 0) 642 return r; 643 644 return 0; 645 } 646 647 int virtio_pci__reset(struct kvm *kvm, struct virtio_device *vdev) 648 { 649 unsigned int vq; 650 struct virtio_pci *vpci = vdev->virtio; 651 652 virtio_pci__del_msix_route(vpci, vpci->config_gsi); 653 vpci->config_gsi = 0; 654 vpci->config_vector = VIRTIO_MSI_NO_VECTOR; 655 656 for (vq = 0; vq < vdev->ops->get_vq_count(kvm, vpci->dev); vq++) 657 virtio_pci_exit_vq(kvm, vdev, vq); 658 659 return 0; 660 } 661 662 int virtio_pci__exit(struct kvm *kvm, struct virtio_device *vdev) 663 { 664 struct virtio_pci *vpci = vdev->virtio; 665 666 virtio_pci__reset(kvm, vdev); 667 kvm__deregister_mmio(kvm, virtio_pci__mmio_addr(vpci)); 668 kvm__deregister_mmio(kvm, virtio_pci__msix_io_addr(vpci)); 669 kvm__deregister_pio(kvm, virtio_pci__port_addr(vpci)); 670 671 return 0; 672 } 673