1 #include "kvm/virtio-pci.h" 2 3 #include "kvm/ioport.h" 4 #include "kvm/kvm.h" 5 #include "kvm/kvm-cpu.h" 6 #include "kvm/virtio-pci-dev.h" 7 #include "kvm/irq.h" 8 #include "kvm/virtio.h" 9 #include "kvm/ioeventfd.h" 10 11 #include <sys/ioctl.h> 12 #include <linux/virtio_pci.h> 13 #include <linux/byteorder.h> 14 #include <assert.h> 15 #include <string.h> 16 17 static u16 virtio_pci__port_addr(struct virtio_pci *vpci) 18 { 19 return pci__bar_address(&vpci->pci_hdr, 0); 20 } 21 22 static u32 virtio_pci__mmio_addr(struct virtio_pci *vpci) 23 { 24 return pci__bar_address(&vpci->pci_hdr, 1); 25 } 26 27 static u32 virtio_pci__msix_io_addr(struct virtio_pci *vpci) 28 { 29 return pci__bar_address(&vpci->pci_hdr, 2); 30 } 31 32 static void virtio_pci__ioevent_callback(struct kvm *kvm, void *param) 33 { 34 struct virtio_pci_ioevent_param *ioeventfd = param; 35 struct virtio_pci *vpci = ioeventfd->vdev->virtio; 36 37 ioeventfd->vdev->ops->notify_vq(kvm, vpci->dev, ioeventfd->vq); 38 } 39 40 static int virtio_pci__init_ioeventfd(struct kvm *kvm, struct virtio_device *vdev, u32 vq) 41 { 42 struct ioevent ioevent; 43 struct virtio_pci *vpci = vdev->virtio; 44 u32 mmio_addr = virtio_pci__mmio_addr(vpci); 45 u16 port_addr = virtio_pci__port_addr(vpci); 46 int r, flags = 0; 47 int fd; 48 49 vpci->ioeventfds[vq] = (struct virtio_pci_ioevent_param) { 50 .vdev = vdev, 51 .vq = vq, 52 }; 53 54 ioevent = (struct ioevent) { 55 .fn = virtio_pci__ioevent_callback, 56 .fn_ptr = &vpci->ioeventfds[vq], 57 .datamatch = vq, 58 .fn_kvm = kvm, 59 }; 60 61 /* 62 * Vhost will poll the eventfd in host kernel side, otherwise we 63 * need to poll in userspace. 64 */ 65 if (!vdev->use_vhost) 66 flags |= IOEVENTFD_FLAG_USER_POLL; 67 68 /* ioport */ 69 ioevent.io_addr = port_addr + VIRTIO_PCI_QUEUE_NOTIFY; 70 ioevent.io_len = sizeof(u16); 71 ioevent.fd = fd = eventfd(0, 0); 72 r = ioeventfd__add_event(&ioevent, flags | IOEVENTFD_FLAG_PIO); 73 if (r) 74 return r; 75 76 /* mmio */ 77 ioevent.io_addr = mmio_addr + VIRTIO_PCI_QUEUE_NOTIFY; 78 ioevent.io_len = sizeof(u16); 79 ioevent.fd = eventfd(0, 0); 80 r = ioeventfd__add_event(&ioevent, flags); 81 if (r) 82 goto free_ioport_evt; 83 84 if (vdev->ops->notify_vq_eventfd) 85 vdev->ops->notify_vq_eventfd(kvm, vpci->dev, vq, fd); 86 return 0; 87 88 free_ioport_evt: 89 ioeventfd__del_event(port_addr + VIRTIO_PCI_QUEUE_NOTIFY, vq); 90 return r; 91 } 92 93 static void virtio_pci_exit_vq(struct kvm *kvm, struct virtio_device *vdev, 94 int vq) 95 { 96 struct virtio_pci *vpci = vdev->virtio; 97 u32 mmio_addr = virtio_pci__mmio_addr(vpci); 98 u16 port_addr = virtio_pci__port_addr(vpci); 99 100 ioeventfd__del_event(mmio_addr + VIRTIO_PCI_QUEUE_NOTIFY, vq); 101 ioeventfd__del_event(port_addr + VIRTIO_PCI_QUEUE_NOTIFY, vq); 102 virtio_exit_vq(kvm, vdev, vpci->dev, vq); 103 } 104 105 static inline bool virtio_pci__msix_enabled(struct virtio_pci *vpci) 106 { 107 return vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_ENABLE); 108 } 109 110 static bool virtio_pci__specific_data_in(struct kvm *kvm, struct virtio_device *vdev, 111 void *data, int size, unsigned long offset) 112 { 113 u32 config_offset; 114 struct virtio_pci *vpci = vdev->virtio; 115 int type = virtio__get_dev_specific_field(offset - 20, 116 virtio_pci__msix_enabled(vpci), 117 &config_offset); 118 if (type == VIRTIO_PCI_O_MSIX) { 119 switch (offset) { 120 case VIRTIO_MSI_CONFIG_VECTOR: 121 ioport__write16(data, vpci->config_vector); 122 break; 123 case VIRTIO_MSI_QUEUE_VECTOR: 124 ioport__write16(data, vpci->vq_vector[vpci->queue_selector]); 125 break; 126 }; 127 128 return true; 129 } else if (type == VIRTIO_PCI_O_CONFIG) { 130 u8 cfg; 131 132 cfg = vdev->ops->get_config(kvm, vpci->dev)[config_offset]; 133 ioport__write8(data, cfg); 134 return true; 135 } 136 137 return false; 138 } 139 140 static bool virtio_pci__data_in(struct kvm_cpu *vcpu, struct virtio_device *vdev, 141 unsigned long offset, void *data, int size) 142 { 143 bool ret = true; 144 struct virtio_pci *vpci; 145 struct virt_queue *vq; 146 struct kvm *kvm; 147 u32 val; 148 149 kvm = vcpu->kvm; 150 vpci = vdev->virtio; 151 152 switch (offset) { 153 case VIRTIO_PCI_HOST_FEATURES: 154 val = vdev->ops->get_host_features(kvm, vpci->dev); 155 ioport__write32(data, val); 156 break; 157 case VIRTIO_PCI_QUEUE_PFN: 158 vq = vdev->ops->get_vq(kvm, vpci->dev, vpci->queue_selector); 159 ioport__write32(data, vq->pfn); 160 break; 161 case VIRTIO_PCI_QUEUE_NUM: 162 val = vdev->ops->get_size_vq(kvm, vpci->dev, vpci->queue_selector); 163 ioport__write16(data, val); 164 break; 165 case VIRTIO_PCI_STATUS: 166 ioport__write8(data, vpci->status); 167 break; 168 case VIRTIO_PCI_ISR: 169 ioport__write8(data, vpci->isr); 170 kvm__irq_line(kvm, vpci->legacy_irq_line, VIRTIO_IRQ_LOW); 171 vpci->isr = VIRTIO_IRQ_LOW; 172 break; 173 default: 174 ret = virtio_pci__specific_data_in(kvm, vdev, data, size, offset); 175 break; 176 }; 177 178 return ret; 179 } 180 181 static bool virtio_pci__io_in(struct ioport *ioport, struct kvm_cpu *vcpu, u16 port, void *data, int size) 182 { 183 struct virtio_device *vdev = ioport->priv; 184 struct virtio_pci *vpci = vdev->virtio; 185 unsigned long offset = port - virtio_pci__port_addr(vpci); 186 187 return virtio_pci__data_in(vcpu, vdev, offset, data, size); 188 } 189 190 static void update_msix_map(struct virtio_pci *vpci, 191 struct msix_table *msix_entry, u32 vecnum) 192 { 193 u32 gsi, i; 194 195 /* Find the GSI number used for that vector */ 196 if (vecnum == vpci->config_vector) { 197 gsi = vpci->config_gsi; 198 } else { 199 for (i = 0; i < VIRTIO_PCI_MAX_VQ; i++) 200 if (vpci->vq_vector[i] == vecnum) 201 break; 202 if (i == VIRTIO_PCI_MAX_VQ) 203 return; 204 gsi = vpci->gsis[i]; 205 } 206 207 if (gsi == 0) 208 return; 209 210 msix_entry = &msix_entry[vecnum]; 211 irq__update_msix_route(vpci->kvm, gsi, &msix_entry->msg); 212 } 213 214 static bool virtio_pci__specific_data_out(struct kvm *kvm, struct virtio_device *vdev, 215 void *data, int size, unsigned long offset) 216 { 217 struct virtio_pci *vpci = vdev->virtio; 218 u32 config_offset, vec; 219 int gsi; 220 int type = virtio__get_dev_specific_field(offset - 20, virtio_pci__msix_enabled(vpci), 221 &config_offset); 222 if (type == VIRTIO_PCI_O_MSIX) { 223 switch (offset) { 224 case VIRTIO_MSI_CONFIG_VECTOR: 225 vec = vpci->config_vector = ioport__read16(data); 226 if (vec == VIRTIO_MSI_NO_VECTOR) 227 break; 228 229 gsi = irq__add_msix_route(kvm, 230 &vpci->msix_table[vec].msg, 231 vpci->dev_hdr.dev_num << 3); 232 /* 233 * We don't need IRQ routing if we can use 234 * MSI injection via the KVM_SIGNAL_MSI ioctl. 235 */ 236 if (gsi == -ENXIO && 237 vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 238 break; 239 240 if (gsi < 0) { 241 die("failed to configure MSIs"); 242 break; 243 } 244 245 vpci->config_gsi = gsi; 246 break; 247 case VIRTIO_MSI_QUEUE_VECTOR: 248 vec = ioport__read16(data); 249 vpci->vq_vector[vpci->queue_selector] = vec; 250 251 if (vec == VIRTIO_MSI_NO_VECTOR) 252 break; 253 254 gsi = irq__add_msix_route(kvm, 255 &vpci->msix_table[vec].msg, 256 vpci->dev_hdr.dev_num << 3); 257 /* 258 * We don't need IRQ routing if we can use 259 * MSI injection via the KVM_SIGNAL_MSI ioctl. 260 */ 261 if (gsi == -ENXIO && 262 vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 263 break; 264 265 if (gsi < 0) { 266 die("failed to configure MSIs"); 267 break; 268 } 269 270 vpci->gsis[vpci->queue_selector] = gsi; 271 if (vdev->ops->notify_vq_gsi) 272 vdev->ops->notify_vq_gsi(kvm, vpci->dev, 273 vpci->queue_selector, 274 gsi); 275 break; 276 }; 277 278 return true; 279 } else if (type == VIRTIO_PCI_O_CONFIG) { 280 vdev->ops->get_config(kvm, vpci->dev)[config_offset] = *(u8 *)data; 281 282 return true; 283 } 284 285 return false; 286 } 287 288 static bool virtio_pci__data_out(struct kvm_cpu *vcpu, struct virtio_device *vdev, 289 unsigned long offset, void *data, int size) 290 { 291 bool ret = true; 292 struct virtio_pci *vpci; 293 struct kvm *kvm; 294 u32 val; 295 296 kvm = vcpu->kvm; 297 vpci = vdev->virtio; 298 299 switch (offset) { 300 case VIRTIO_PCI_GUEST_FEATURES: 301 val = ioport__read32(data); 302 virtio_set_guest_features(kvm, vdev, vpci->dev, val); 303 break; 304 case VIRTIO_PCI_QUEUE_PFN: 305 val = ioport__read32(data); 306 if (val) { 307 virtio_pci__init_ioeventfd(kvm, vdev, 308 vpci->queue_selector); 309 vdev->ops->init_vq(kvm, vpci->dev, vpci->queue_selector, 310 1 << VIRTIO_PCI_QUEUE_ADDR_SHIFT, 311 VIRTIO_PCI_VRING_ALIGN, val); 312 } else { 313 virtio_pci_exit_vq(kvm, vdev, vpci->queue_selector); 314 } 315 break; 316 case VIRTIO_PCI_QUEUE_SEL: 317 vpci->queue_selector = ioport__read16(data); 318 break; 319 case VIRTIO_PCI_QUEUE_NOTIFY: 320 val = ioport__read16(data); 321 vdev->ops->notify_vq(kvm, vpci->dev, val); 322 break; 323 case VIRTIO_PCI_STATUS: 324 vpci->status = ioport__read8(data); 325 if (!vpci->status) /* Sample endianness on reset */ 326 vdev->endian = kvm_cpu__get_endianness(vcpu); 327 virtio_notify_status(kvm, vdev, vpci->dev, vpci->status); 328 break; 329 default: 330 ret = virtio_pci__specific_data_out(kvm, vdev, data, size, offset); 331 break; 332 }; 333 334 return ret; 335 } 336 337 static bool virtio_pci__io_out(struct ioport *ioport, struct kvm_cpu *vcpu, u16 port, void *data, int size) 338 { 339 struct virtio_device *vdev = ioport->priv; 340 struct virtio_pci *vpci = vdev->virtio; 341 unsigned long offset = port - virtio_pci__port_addr(vpci); 342 343 return virtio_pci__data_out(vcpu, vdev, offset, data, size); 344 } 345 346 static struct ioport_operations virtio_pci__io_ops = { 347 .io_in = virtio_pci__io_in, 348 .io_out = virtio_pci__io_out, 349 }; 350 351 static void virtio_pci__msix_mmio_callback(struct kvm_cpu *vcpu, 352 u64 addr, u8 *data, u32 len, 353 u8 is_write, void *ptr) 354 { 355 struct virtio_device *vdev = ptr; 356 struct virtio_pci *vpci = vdev->virtio; 357 struct msix_table *table; 358 u32 msix_io_addr = virtio_pci__msix_io_addr(vpci); 359 int vecnum; 360 size_t offset; 361 362 if (addr > msix_io_addr + PCI_IO_SIZE) { 363 if (is_write) 364 return; 365 table = (struct msix_table *)&vpci->msix_pba; 366 offset = addr - (msix_io_addr + PCI_IO_SIZE); 367 } else { 368 table = vpci->msix_table; 369 offset = addr - msix_io_addr; 370 } 371 vecnum = offset / sizeof(struct msix_table); 372 offset = offset % sizeof(struct msix_table); 373 374 if (!is_write) { 375 memcpy(data, (void *)&table[vecnum] + offset, len); 376 return; 377 } 378 379 memcpy((void *)&table[vecnum] + offset, data, len); 380 381 /* Did we just update the address or payload? */ 382 if (offset < offsetof(struct msix_table, ctrl)) 383 update_msix_map(vpci, table, vecnum); 384 } 385 386 static void virtio_pci__signal_msi(struct kvm *kvm, struct virtio_pci *vpci, 387 int vec) 388 { 389 struct kvm_msi msi = { 390 .address_lo = vpci->msix_table[vec].msg.address_lo, 391 .address_hi = vpci->msix_table[vec].msg.address_hi, 392 .data = vpci->msix_table[vec].msg.data, 393 }; 394 395 if (kvm->msix_needs_devid) { 396 msi.flags = KVM_MSI_VALID_DEVID; 397 msi.devid = vpci->dev_hdr.dev_num << 3; 398 } 399 400 irq__signal_msi(kvm, &msi); 401 } 402 403 int virtio_pci__signal_vq(struct kvm *kvm, struct virtio_device *vdev, u32 vq) 404 { 405 struct virtio_pci *vpci = vdev->virtio; 406 int tbl = vpci->vq_vector[vq]; 407 408 if (virtio_pci__msix_enabled(vpci) && tbl != VIRTIO_MSI_NO_VECTOR) { 409 if (vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_MASKALL) || 410 vpci->msix_table[tbl].ctrl & cpu_to_le16(PCI_MSIX_ENTRY_CTRL_MASKBIT)) { 411 412 vpci->msix_pba |= 1 << tbl; 413 return 0; 414 } 415 416 if (vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 417 virtio_pci__signal_msi(kvm, vpci, vpci->vq_vector[vq]); 418 else 419 kvm__irq_trigger(kvm, vpci->gsis[vq]); 420 } else { 421 vpci->isr = VIRTIO_IRQ_HIGH; 422 kvm__irq_trigger(kvm, vpci->legacy_irq_line); 423 } 424 return 0; 425 } 426 427 int virtio_pci__signal_config(struct kvm *kvm, struct virtio_device *vdev) 428 { 429 struct virtio_pci *vpci = vdev->virtio; 430 int tbl = vpci->config_vector; 431 432 if (virtio_pci__msix_enabled(vpci) && tbl != VIRTIO_MSI_NO_VECTOR) { 433 if (vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_MASKALL) || 434 vpci->msix_table[tbl].ctrl & cpu_to_le16(PCI_MSIX_ENTRY_CTRL_MASKBIT)) { 435 436 vpci->msix_pba |= 1 << tbl; 437 return 0; 438 } 439 440 if (vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 441 virtio_pci__signal_msi(kvm, vpci, tbl); 442 else 443 kvm__irq_trigger(kvm, vpci->config_gsi); 444 } else { 445 vpci->isr = VIRTIO_PCI_ISR_CONFIG; 446 kvm__irq_trigger(kvm, vpci->legacy_irq_line); 447 } 448 449 return 0; 450 } 451 452 static void virtio_pci__io_mmio_callback(struct kvm_cpu *vcpu, 453 u64 addr, u8 *data, u32 len, 454 u8 is_write, void *ptr) 455 { 456 struct virtio_device *vdev = ptr; 457 struct virtio_pci *vpci = vdev->virtio; 458 u32 mmio_addr = virtio_pci__mmio_addr(vpci); 459 460 if (!is_write) 461 virtio_pci__data_in(vcpu, vdev, addr - mmio_addr, data, len); 462 else 463 virtio_pci__data_out(vcpu, vdev, addr - mmio_addr, data, len); 464 } 465 466 static int virtio_pci__bar_activate(struct kvm *kvm, 467 struct pci_device_header *pci_hdr, 468 int bar_num, void *data) 469 { 470 struct virtio_device *vdev = data; 471 u32 bar_addr, bar_size; 472 int r = -EINVAL; 473 474 assert(bar_num <= 2); 475 476 bar_addr = pci__bar_address(pci_hdr, bar_num); 477 bar_size = pci__bar_size(pci_hdr, bar_num); 478 479 switch (bar_num) { 480 case 0: 481 r = ioport__register(kvm, bar_addr, &virtio_pci__io_ops, 482 bar_size, vdev); 483 if (r > 0) 484 r = 0; 485 break; 486 case 1: 487 r = kvm__register_mmio(kvm, bar_addr, bar_size, false, 488 virtio_pci__io_mmio_callback, vdev); 489 break; 490 case 2: 491 r = kvm__register_mmio(kvm, bar_addr, bar_size, false, 492 virtio_pci__msix_mmio_callback, vdev); 493 break; 494 } 495 496 return r; 497 } 498 499 static int virtio_pci__bar_deactivate(struct kvm *kvm, 500 struct pci_device_header *pci_hdr, 501 int bar_num, void *data) 502 { 503 u32 bar_addr; 504 bool success; 505 int r = -EINVAL; 506 507 assert(bar_num <= 2); 508 509 bar_addr = pci__bar_address(pci_hdr, bar_num); 510 511 switch (bar_num) { 512 case 0: 513 r = ioport__unregister(kvm, bar_addr); 514 break; 515 case 1: 516 case 2: 517 success = kvm__deregister_mmio(kvm, bar_addr); 518 /* kvm__deregister_mmio fails when the region is not found. */ 519 r = (success ? 0 : -ENOENT); 520 break; 521 } 522 523 return r; 524 } 525 526 int virtio_pci__init(struct kvm *kvm, void *dev, struct virtio_device *vdev, 527 int device_id, int subsys_id, int class) 528 { 529 struct virtio_pci *vpci = vdev->virtio; 530 u32 mmio_addr, msix_io_block; 531 u16 port_addr; 532 int r; 533 534 vpci->kvm = kvm; 535 vpci->dev = dev; 536 537 BUILD_BUG_ON(!is_power_of_two(PCI_IO_SIZE)); 538 539 port_addr = pci_get_io_port_block(PCI_IO_SIZE); 540 mmio_addr = pci_get_mmio_block(PCI_IO_SIZE); 541 msix_io_block = pci_get_mmio_block(PCI_IO_SIZE * 2); 542 543 vpci->pci_hdr = (struct pci_device_header) { 544 .vendor_id = cpu_to_le16(PCI_VENDOR_ID_REDHAT_QUMRANET), 545 .device_id = cpu_to_le16(device_id), 546 .command = PCI_COMMAND_IO | PCI_COMMAND_MEMORY, 547 .header_type = PCI_HEADER_TYPE_NORMAL, 548 .revision_id = 0, 549 .class[0] = class & 0xff, 550 .class[1] = (class >> 8) & 0xff, 551 .class[2] = (class >> 16) & 0xff, 552 .subsys_vendor_id = cpu_to_le16(PCI_SUBSYSTEM_VENDOR_ID_REDHAT_QUMRANET), 553 .subsys_id = cpu_to_le16(subsys_id), 554 .bar[0] = cpu_to_le32(port_addr 555 | PCI_BASE_ADDRESS_SPACE_IO), 556 .bar[1] = cpu_to_le32(mmio_addr 557 | PCI_BASE_ADDRESS_SPACE_MEMORY), 558 .bar[2] = cpu_to_le32(msix_io_block 559 | PCI_BASE_ADDRESS_SPACE_MEMORY), 560 .status = cpu_to_le16(PCI_STATUS_CAP_LIST), 561 .capabilities = (void *)&vpci->pci_hdr.msix - (void *)&vpci->pci_hdr, 562 .bar_size[0] = cpu_to_le32(PCI_IO_SIZE), 563 .bar_size[1] = cpu_to_le32(PCI_IO_SIZE), 564 .bar_size[2] = cpu_to_le32(PCI_IO_SIZE*2), 565 }; 566 567 r = pci__register_bar_regions(kvm, &vpci->pci_hdr, 568 virtio_pci__bar_activate, 569 virtio_pci__bar_deactivate, vdev); 570 if (r < 0) 571 return r; 572 573 vpci->dev_hdr = (struct device_header) { 574 .bus_type = DEVICE_BUS_PCI, 575 .data = &vpci->pci_hdr, 576 }; 577 578 vpci->pci_hdr.msix.cap = PCI_CAP_ID_MSIX; 579 vpci->pci_hdr.msix.next = 0; 580 /* 581 * We at most have VIRTIO_PCI_MAX_VQ entries for virt queue, 582 * VIRTIO_PCI_MAX_CONFIG entries for config. 583 * 584 * To quote the PCI spec: 585 * 586 * System software reads this field to determine the 587 * MSI-X Table Size N, which is encoded as N-1. 588 * For example, a returned value of "00000000011" 589 * indicates a table size of 4. 590 */ 591 vpci->pci_hdr.msix.ctrl = cpu_to_le16(VIRTIO_PCI_MAX_VQ + VIRTIO_PCI_MAX_CONFIG - 1); 592 593 /* Both table and PBA are mapped to the same BAR (2) */ 594 vpci->pci_hdr.msix.table_offset = cpu_to_le32(2); 595 vpci->pci_hdr.msix.pba_offset = cpu_to_le32(2 | PCI_IO_SIZE); 596 vpci->config_vector = 0; 597 598 if (irq__can_signal_msi(kvm)) 599 vpci->features |= VIRTIO_PCI_F_SIGNAL_MSI; 600 601 vpci->legacy_irq_line = pci__assign_irq(&vpci->pci_hdr); 602 603 r = device__register(&vpci->dev_hdr); 604 if (r < 0) 605 return r; 606 607 return 0; 608 } 609 610 int virtio_pci__reset(struct kvm *kvm, struct virtio_device *vdev) 611 { 612 int vq; 613 struct virtio_pci *vpci = vdev->virtio; 614 615 for (vq = 0; vq < vdev->ops->get_vq_count(kvm, vpci->dev); vq++) 616 virtio_pci_exit_vq(kvm, vdev, vq); 617 618 return 0; 619 } 620 621 int virtio_pci__exit(struct kvm *kvm, struct virtio_device *vdev) 622 { 623 struct virtio_pci *vpci = vdev->virtio; 624 625 virtio_pci__reset(kvm, vdev); 626 kvm__deregister_mmio(kvm, virtio_pci__mmio_addr(vpci)); 627 kvm__deregister_mmio(kvm, virtio_pci__msix_io_addr(vpci)); 628 ioport__unregister(kvm, virtio_pci__port_addr(vpci)); 629 630 return 0; 631 } 632