1 #include "kvm/virtio-pci.h" 2 3 #include "kvm/ioport.h" 4 #include "kvm/kvm.h" 5 #include "kvm/kvm-cpu.h" 6 #include "kvm/virtio-pci-dev.h" 7 #include "kvm/irq.h" 8 #include "kvm/virtio.h" 9 #include "kvm/ioeventfd.h" 10 #include "kvm/util.h" 11 12 #include <sys/ioctl.h> 13 #include <linux/virtio_pci.h> 14 #include <linux/byteorder.h> 15 #include <assert.h> 16 #include <string.h> 17 18 #define ALIGN_UP(x, s) ALIGN((x) + (s) - 1, (s)) 19 #define VIRTIO_NR_MSIX (VIRTIO_PCI_MAX_VQ + VIRTIO_PCI_MAX_CONFIG) 20 #define VIRTIO_MSIX_TABLE_SIZE (VIRTIO_NR_MSIX * 16) 21 #define VIRTIO_MSIX_PBA_SIZE (ALIGN_UP(VIRTIO_MSIX_TABLE_SIZE, 64) / 8) 22 #define VIRTIO_MSIX_BAR_SIZE (1UL << fls_long(VIRTIO_MSIX_TABLE_SIZE + \ 23 VIRTIO_MSIX_PBA_SIZE)) 24 25 static u16 virtio_pci__port_addr(struct virtio_pci *vpci) 26 { 27 return pci__bar_address(&vpci->pci_hdr, 0); 28 } 29 30 static u32 virtio_pci__mmio_addr(struct virtio_pci *vpci) 31 { 32 return pci__bar_address(&vpci->pci_hdr, 1); 33 } 34 35 static u32 virtio_pci__msix_io_addr(struct virtio_pci *vpci) 36 { 37 return pci__bar_address(&vpci->pci_hdr, 2); 38 } 39 40 static void virtio_pci__ioevent_callback(struct kvm *kvm, void *param) 41 { 42 struct virtio_pci_ioevent_param *ioeventfd = param; 43 struct virtio_pci *vpci = ioeventfd->vdev->virtio; 44 45 ioeventfd->vdev->ops->notify_vq(kvm, vpci->dev, ioeventfd->vq); 46 } 47 48 static int virtio_pci__init_ioeventfd(struct kvm *kvm, struct virtio_device *vdev, u32 vq) 49 { 50 struct ioevent ioevent; 51 struct virtio_pci *vpci = vdev->virtio; 52 u32 mmio_addr = virtio_pci__mmio_addr(vpci); 53 u16 port_addr = virtio_pci__port_addr(vpci); 54 int r, flags = 0; 55 int fd; 56 57 vpci->ioeventfds[vq] = (struct virtio_pci_ioevent_param) { 58 .vdev = vdev, 59 .vq = vq, 60 }; 61 62 ioevent = (struct ioevent) { 63 .fn = virtio_pci__ioevent_callback, 64 .fn_ptr = &vpci->ioeventfds[vq], 65 .datamatch = vq, 66 .fn_kvm = kvm, 67 }; 68 69 /* 70 * Vhost will poll the eventfd in host kernel side, otherwise we 71 * need to poll in userspace. 72 */ 73 if (!vdev->use_vhost) 74 flags |= IOEVENTFD_FLAG_USER_POLL; 75 76 /* ioport */ 77 ioevent.io_addr = port_addr + VIRTIO_PCI_QUEUE_NOTIFY; 78 ioevent.io_len = sizeof(u16); 79 ioevent.fd = fd = eventfd(0, 0); 80 r = ioeventfd__add_event(&ioevent, flags | IOEVENTFD_FLAG_PIO); 81 if (r) 82 return r; 83 84 /* mmio */ 85 ioevent.io_addr = mmio_addr + VIRTIO_PCI_QUEUE_NOTIFY; 86 ioevent.io_len = sizeof(u16); 87 ioevent.fd = eventfd(0, 0); 88 r = ioeventfd__add_event(&ioevent, flags); 89 if (r) 90 goto free_ioport_evt; 91 92 if (vdev->ops->notify_vq_eventfd) 93 vdev->ops->notify_vq_eventfd(kvm, vpci->dev, vq, fd); 94 return 0; 95 96 free_ioport_evt: 97 ioeventfd__del_event(port_addr + VIRTIO_PCI_QUEUE_NOTIFY, vq); 98 return r; 99 } 100 101 static void virtio_pci_exit_vq(struct kvm *kvm, struct virtio_device *vdev, 102 int vq) 103 { 104 struct virtio_pci *vpci = vdev->virtio; 105 u32 mmio_addr = virtio_pci__mmio_addr(vpci); 106 u16 port_addr = virtio_pci__port_addr(vpci); 107 108 ioeventfd__del_event(mmio_addr + VIRTIO_PCI_QUEUE_NOTIFY, vq); 109 ioeventfd__del_event(port_addr + VIRTIO_PCI_QUEUE_NOTIFY, vq); 110 virtio_exit_vq(kvm, vdev, vpci->dev, vq); 111 } 112 113 static inline bool virtio_pci__msix_enabled(struct virtio_pci *vpci) 114 { 115 return vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_ENABLE); 116 } 117 118 static bool virtio_pci__specific_data_in(struct kvm *kvm, struct virtio_device *vdev, 119 void *data, u32 size, unsigned long offset) 120 { 121 u32 config_offset; 122 struct virtio_pci *vpci = vdev->virtio; 123 int type = virtio__get_dev_specific_field(offset - 20, 124 virtio_pci__msix_enabled(vpci), 125 &config_offset); 126 if (type == VIRTIO_PCI_O_MSIX) { 127 switch (offset) { 128 case VIRTIO_MSI_CONFIG_VECTOR: 129 ioport__write16(data, vpci->config_vector); 130 break; 131 case VIRTIO_MSI_QUEUE_VECTOR: 132 ioport__write16(data, vpci->vq_vector[vpci->queue_selector]); 133 break; 134 }; 135 136 return true; 137 } else if (type == VIRTIO_PCI_O_CONFIG) { 138 u8 cfg; 139 size_t config_size; 140 141 config_size = vdev->ops->get_config_size(kvm, vpci->dev); 142 if (config_offset + size > config_size) { 143 /* Access goes beyond the config size, so return failure. */ 144 WARN_ONCE(1, "Config access offset (%u) is beyond config size (%zu)\n", 145 config_offset, config_size); 146 return false; 147 } 148 149 /* TODO: Handle access lengths beyond one byte */ 150 if (size != 1) { 151 WARN_ONCE(1, "Size (%u) not supported\n", size); 152 return false; 153 } 154 cfg = vdev->ops->get_config(kvm, vpci->dev)[config_offset]; 155 ioport__write8(data, cfg); 156 return true; 157 } 158 159 return false; 160 } 161 162 static bool virtio_pci__data_in(struct kvm_cpu *vcpu, struct virtio_device *vdev, 163 unsigned long offset, void *data, u32 size) 164 { 165 bool ret = true; 166 struct virtio_pci *vpci; 167 struct virt_queue *vq; 168 struct kvm *kvm; 169 u32 val; 170 171 kvm = vcpu->kvm; 172 vpci = vdev->virtio; 173 174 switch (offset) { 175 case VIRTIO_PCI_HOST_FEATURES: 176 val = vdev->ops->get_host_features(kvm, vpci->dev); 177 ioport__write32(data, val); 178 break; 179 case VIRTIO_PCI_QUEUE_PFN: 180 vq = vdev->ops->get_vq(kvm, vpci->dev, vpci->queue_selector); 181 ioport__write32(data, vq->pfn); 182 break; 183 case VIRTIO_PCI_QUEUE_NUM: 184 val = vdev->ops->get_size_vq(kvm, vpci->dev, vpci->queue_selector); 185 ioport__write16(data, val); 186 break; 187 case VIRTIO_PCI_STATUS: 188 ioport__write8(data, vpci->status); 189 break; 190 case VIRTIO_PCI_ISR: 191 ioport__write8(data, vpci->isr); 192 kvm__irq_line(kvm, vpci->legacy_irq_line, VIRTIO_IRQ_LOW); 193 vpci->isr = VIRTIO_IRQ_LOW; 194 break; 195 default: 196 ret = virtio_pci__specific_data_in(kvm, vdev, data, size, offset); 197 break; 198 }; 199 200 return ret; 201 } 202 203 static void update_msix_map(struct virtio_pci *vpci, 204 struct msix_table *msix_entry, u32 vecnum) 205 { 206 u32 gsi, i; 207 208 /* Find the GSI number used for that vector */ 209 if (vecnum == vpci->config_vector) { 210 gsi = vpci->config_gsi; 211 } else { 212 for (i = 0; i < VIRTIO_PCI_MAX_VQ; i++) 213 if (vpci->vq_vector[i] == vecnum) 214 break; 215 if (i == VIRTIO_PCI_MAX_VQ) 216 return; 217 gsi = vpci->gsis[i]; 218 } 219 220 if (gsi == 0) 221 return; 222 223 msix_entry = &msix_entry[vecnum]; 224 irq__update_msix_route(vpci->kvm, gsi, &msix_entry->msg); 225 } 226 227 static bool virtio_pci__specific_data_out(struct kvm *kvm, struct virtio_device *vdev, 228 void *data, u32 size, unsigned long offset) 229 { 230 struct virtio_pci *vpci = vdev->virtio; 231 u32 config_offset, vec; 232 int gsi; 233 int type = virtio__get_dev_specific_field(offset - 20, virtio_pci__msix_enabled(vpci), 234 &config_offset); 235 if (type == VIRTIO_PCI_O_MSIX) { 236 switch (offset) { 237 case VIRTIO_MSI_CONFIG_VECTOR: 238 vec = vpci->config_vector = ioport__read16(data); 239 if (vec == VIRTIO_MSI_NO_VECTOR) 240 break; 241 242 gsi = irq__add_msix_route(kvm, 243 &vpci->msix_table[vec].msg, 244 vpci->dev_hdr.dev_num << 3); 245 /* 246 * We don't need IRQ routing if we can use 247 * MSI injection via the KVM_SIGNAL_MSI ioctl. 248 */ 249 if (gsi == -ENXIO && 250 vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 251 break; 252 253 if (gsi < 0) { 254 die("failed to configure MSIs"); 255 break; 256 } 257 258 vpci->config_gsi = gsi; 259 break; 260 case VIRTIO_MSI_QUEUE_VECTOR: 261 vec = ioport__read16(data); 262 vpci->vq_vector[vpci->queue_selector] = vec; 263 264 if (vec == VIRTIO_MSI_NO_VECTOR) 265 break; 266 267 gsi = irq__add_msix_route(kvm, 268 &vpci->msix_table[vec].msg, 269 vpci->dev_hdr.dev_num << 3); 270 /* 271 * We don't need IRQ routing if we can use 272 * MSI injection via the KVM_SIGNAL_MSI ioctl. 273 */ 274 if (gsi == -ENXIO && 275 vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 276 break; 277 278 if (gsi < 0) { 279 die("failed to configure MSIs"); 280 break; 281 } 282 283 vpci->gsis[vpci->queue_selector] = gsi; 284 if (vdev->ops->notify_vq_gsi) 285 vdev->ops->notify_vq_gsi(kvm, vpci->dev, 286 vpci->queue_selector, 287 gsi); 288 break; 289 }; 290 291 return true; 292 } else if (type == VIRTIO_PCI_O_CONFIG) { 293 size_t config_size; 294 295 config_size = vdev->ops->get_config_size(kvm, vpci->dev); 296 if (config_offset + size > config_size) { 297 /* Access goes beyond the config size, so return failure. */ 298 WARN_ONCE(1, "Config access offset (%u) is beyond config size (%zu)\n", 299 config_offset, config_size); 300 return false; 301 } 302 303 /* TODO: Handle access lengths beyond one byte */ 304 if (size != 1) { 305 WARN_ONCE(1, "Size (%u) not supported\n", size); 306 return false; 307 } 308 vdev->ops->get_config(kvm, vpci->dev)[config_offset] = *(u8 *)data; 309 310 return true; 311 } 312 313 return false; 314 } 315 316 static bool virtio_pci__data_out(struct kvm_cpu *vcpu, struct virtio_device *vdev, 317 unsigned long offset, void *data, u32 size) 318 { 319 bool ret = true; 320 struct virtio_pci *vpci; 321 struct kvm *kvm; 322 u32 val; 323 unsigned int vq_count; 324 325 kvm = vcpu->kvm; 326 vpci = vdev->virtio; 327 vq_count = vdev->ops->get_vq_count(kvm, vpci->dev); 328 329 switch (offset) { 330 case VIRTIO_PCI_GUEST_FEATURES: 331 val = ioport__read32(data); 332 virtio_set_guest_features(kvm, vdev, vpci->dev, val); 333 break; 334 case VIRTIO_PCI_QUEUE_PFN: 335 val = ioport__read32(data); 336 if (val) { 337 virtio_pci__init_ioeventfd(kvm, vdev, 338 vpci->queue_selector); 339 vdev->ops->init_vq(kvm, vpci->dev, vpci->queue_selector, 340 1 << VIRTIO_PCI_QUEUE_ADDR_SHIFT, 341 VIRTIO_PCI_VRING_ALIGN, val); 342 } else { 343 virtio_pci_exit_vq(kvm, vdev, vpci->queue_selector); 344 } 345 break; 346 case VIRTIO_PCI_QUEUE_SEL: 347 val = ioport__read16(data); 348 if (val >= vq_count) { 349 WARN_ONCE(1, "QUEUE_SEL value (%u) is larger than VQ count (%u)\n", 350 val, vq_count); 351 return false; 352 } 353 vpci->queue_selector = val; 354 break; 355 case VIRTIO_PCI_QUEUE_NOTIFY: 356 val = ioport__read16(data); 357 if (val >= vq_count) { 358 WARN_ONCE(1, "QUEUE_SEL value (%u) is larger than VQ count (%u)\n", 359 val, vq_count); 360 return false; 361 } 362 vdev->ops->notify_vq(kvm, vpci->dev, val); 363 break; 364 case VIRTIO_PCI_STATUS: 365 vpci->status = ioport__read8(data); 366 if (!vpci->status) /* Sample endianness on reset */ 367 vdev->endian = kvm_cpu__get_endianness(vcpu); 368 virtio_notify_status(kvm, vdev, vpci->dev, vpci->status); 369 break; 370 default: 371 ret = virtio_pci__specific_data_out(kvm, vdev, data, size, offset); 372 break; 373 }; 374 375 return ret; 376 } 377 378 static void virtio_pci__msix_mmio_callback(struct kvm_cpu *vcpu, 379 u64 addr, u8 *data, u32 len, 380 u8 is_write, void *ptr) 381 { 382 struct virtio_device *vdev = ptr; 383 struct virtio_pci *vpci = vdev->virtio; 384 struct msix_table *table; 385 u32 msix_io_addr = virtio_pci__msix_io_addr(vpci); 386 u32 pba_offset; 387 int vecnum; 388 size_t offset; 389 390 BUILD_BUG_ON(VIRTIO_NR_MSIX > (sizeof(vpci->msix_pba) * 8)); 391 392 pba_offset = vpci->pci_hdr.msix.pba_offset & ~PCI_MSIX_TABLE_BIR; 393 if (addr >= msix_io_addr + pba_offset) { 394 /* Read access to PBA */ 395 if (is_write) 396 return; 397 offset = addr - (msix_io_addr + pba_offset); 398 if ((offset + len) > sizeof (vpci->msix_pba)) 399 return; 400 memcpy(data, (void *)&vpci->msix_pba + offset, len); 401 return; 402 } 403 404 table = vpci->msix_table; 405 offset = addr - msix_io_addr; 406 407 vecnum = offset / sizeof(struct msix_table); 408 offset = offset % sizeof(struct msix_table); 409 410 if (!is_write) { 411 memcpy(data, (void *)&table[vecnum] + offset, len); 412 return; 413 } 414 415 memcpy((void *)&table[vecnum] + offset, data, len); 416 417 /* Did we just update the address or payload? */ 418 if (offset < offsetof(struct msix_table, ctrl)) 419 update_msix_map(vpci, table, vecnum); 420 } 421 422 static void virtio_pci__signal_msi(struct kvm *kvm, struct virtio_pci *vpci, 423 int vec) 424 { 425 struct kvm_msi msi = { 426 .address_lo = vpci->msix_table[vec].msg.address_lo, 427 .address_hi = vpci->msix_table[vec].msg.address_hi, 428 .data = vpci->msix_table[vec].msg.data, 429 }; 430 431 if (kvm->msix_needs_devid) { 432 msi.flags = KVM_MSI_VALID_DEVID; 433 msi.devid = vpci->dev_hdr.dev_num << 3; 434 } 435 436 irq__signal_msi(kvm, &msi); 437 } 438 439 int virtio_pci__signal_vq(struct kvm *kvm, struct virtio_device *vdev, u32 vq) 440 { 441 struct virtio_pci *vpci = vdev->virtio; 442 int tbl = vpci->vq_vector[vq]; 443 444 if (virtio_pci__msix_enabled(vpci) && tbl != VIRTIO_MSI_NO_VECTOR) { 445 if (vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_MASKALL) || 446 vpci->msix_table[tbl].ctrl & cpu_to_le16(PCI_MSIX_ENTRY_CTRL_MASKBIT)) { 447 448 vpci->msix_pba |= 1 << tbl; 449 return 0; 450 } 451 452 if (vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 453 virtio_pci__signal_msi(kvm, vpci, vpci->vq_vector[vq]); 454 else 455 kvm__irq_trigger(kvm, vpci->gsis[vq]); 456 } else { 457 vpci->isr = VIRTIO_IRQ_HIGH; 458 kvm__irq_line(kvm, vpci->legacy_irq_line, VIRTIO_IRQ_HIGH); 459 } 460 return 0; 461 } 462 463 int virtio_pci__signal_config(struct kvm *kvm, struct virtio_device *vdev) 464 { 465 struct virtio_pci *vpci = vdev->virtio; 466 int tbl = vpci->config_vector; 467 468 if (virtio_pci__msix_enabled(vpci) && tbl != VIRTIO_MSI_NO_VECTOR) { 469 if (vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_MASKALL) || 470 vpci->msix_table[tbl].ctrl & cpu_to_le16(PCI_MSIX_ENTRY_CTRL_MASKBIT)) { 471 472 vpci->msix_pba |= 1 << tbl; 473 return 0; 474 } 475 476 if (vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 477 virtio_pci__signal_msi(kvm, vpci, tbl); 478 else 479 kvm__irq_trigger(kvm, vpci->config_gsi); 480 } else { 481 vpci->isr = VIRTIO_PCI_ISR_CONFIG; 482 kvm__irq_trigger(kvm, vpci->legacy_irq_line); 483 } 484 485 return 0; 486 } 487 488 static void virtio_pci__io_mmio_callback(struct kvm_cpu *vcpu, 489 u64 addr, u8 *data, u32 len, 490 u8 is_write, void *ptr) 491 { 492 struct virtio_device *vdev = ptr; 493 struct virtio_pci *vpci = vdev->virtio; 494 u32 ioport_addr = virtio_pci__port_addr(vpci); 495 u32 base_addr; 496 497 if (addr >= ioport_addr && 498 addr < ioport_addr + pci__bar_size(&vpci->pci_hdr, 0)) 499 base_addr = ioport_addr; 500 else 501 base_addr = virtio_pci__mmio_addr(vpci); 502 503 if (!is_write) 504 virtio_pci__data_in(vcpu, vdev, addr - base_addr, data, len); 505 else 506 virtio_pci__data_out(vcpu, vdev, addr - base_addr, data, len); 507 } 508 509 static int virtio_pci__bar_activate(struct kvm *kvm, 510 struct pci_device_header *pci_hdr, 511 int bar_num, void *data) 512 { 513 struct virtio_device *vdev = data; 514 u32 bar_addr, bar_size; 515 int r = -EINVAL; 516 517 assert(bar_num <= 2); 518 519 bar_addr = pci__bar_address(pci_hdr, bar_num); 520 bar_size = pci__bar_size(pci_hdr, bar_num); 521 522 switch (bar_num) { 523 case 0: 524 r = kvm__register_pio(kvm, bar_addr, bar_size, 525 virtio_pci__io_mmio_callback, vdev); 526 break; 527 case 1: 528 r = kvm__register_mmio(kvm, bar_addr, bar_size, false, 529 virtio_pci__io_mmio_callback, vdev); 530 break; 531 case 2: 532 r = kvm__register_mmio(kvm, bar_addr, bar_size, false, 533 virtio_pci__msix_mmio_callback, vdev); 534 break; 535 } 536 537 return r; 538 } 539 540 static int virtio_pci__bar_deactivate(struct kvm *kvm, 541 struct pci_device_header *pci_hdr, 542 int bar_num, void *data) 543 { 544 u32 bar_addr; 545 bool success; 546 int r = -EINVAL; 547 548 assert(bar_num <= 2); 549 550 bar_addr = pci__bar_address(pci_hdr, bar_num); 551 552 switch (bar_num) { 553 case 0: 554 r = kvm__deregister_pio(kvm, bar_addr); 555 break; 556 case 1: 557 case 2: 558 success = kvm__deregister_mmio(kvm, bar_addr); 559 /* kvm__deregister_mmio fails when the region is not found. */ 560 r = (success ? 0 : -ENOENT); 561 break; 562 } 563 564 return r; 565 } 566 567 int virtio_pci__init(struct kvm *kvm, void *dev, struct virtio_device *vdev, 568 int device_id, int subsys_id, int class) 569 { 570 struct virtio_pci *vpci = vdev->virtio; 571 u32 mmio_addr, msix_io_block; 572 u16 port_addr; 573 int r; 574 575 vpci->kvm = kvm; 576 vpci->dev = dev; 577 578 BUILD_BUG_ON(!is_power_of_two(PCI_IO_SIZE)); 579 580 port_addr = pci_get_io_port_block(PCI_IO_SIZE); 581 mmio_addr = pci_get_mmio_block(PCI_IO_SIZE); 582 msix_io_block = pci_get_mmio_block(VIRTIO_MSIX_BAR_SIZE); 583 584 vpci->pci_hdr = (struct pci_device_header) { 585 .vendor_id = cpu_to_le16(PCI_VENDOR_ID_REDHAT_QUMRANET), 586 .device_id = cpu_to_le16(device_id), 587 .command = PCI_COMMAND_IO | PCI_COMMAND_MEMORY, 588 .header_type = PCI_HEADER_TYPE_NORMAL, 589 .revision_id = 0, 590 .class[0] = class & 0xff, 591 .class[1] = (class >> 8) & 0xff, 592 .class[2] = (class >> 16) & 0xff, 593 .subsys_vendor_id = cpu_to_le16(PCI_SUBSYSTEM_VENDOR_ID_REDHAT_QUMRANET), 594 .subsys_id = cpu_to_le16(subsys_id), 595 .bar[0] = cpu_to_le32(port_addr 596 | PCI_BASE_ADDRESS_SPACE_IO), 597 .bar[1] = cpu_to_le32(mmio_addr 598 | PCI_BASE_ADDRESS_SPACE_MEMORY), 599 .bar[2] = cpu_to_le32(msix_io_block 600 | PCI_BASE_ADDRESS_SPACE_MEMORY), 601 .status = cpu_to_le16(PCI_STATUS_CAP_LIST), 602 .capabilities = (void *)&vpci->pci_hdr.msix - (void *)&vpci->pci_hdr, 603 .bar_size[0] = cpu_to_le32(PCI_IO_SIZE), 604 .bar_size[1] = cpu_to_le32(PCI_IO_SIZE), 605 .bar_size[2] = cpu_to_le32(VIRTIO_MSIX_BAR_SIZE), 606 }; 607 608 r = pci__register_bar_regions(kvm, &vpci->pci_hdr, 609 virtio_pci__bar_activate, 610 virtio_pci__bar_deactivate, vdev); 611 if (r < 0) 612 return r; 613 614 vpci->dev_hdr = (struct device_header) { 615 .bus_type = DEVICE_BUS_PCI, 616 .data = &vpci->pci_hdr, 617 }; 618 619 vpci->pci_hdr.msix.cap = PCI_CAP_ID_MSIX; 620 vpci->pci_hdr.msix.next = 0; 621 /* 622 * We at most have VIRTIO_NR_MSIX entries (VIRTIO_PCI_MAX_VQ 623 * entries for virt queue, VIRTIO_PCI_MAX_CONFIG entries for 624 * config). 625 * 626 * To quote the PCI spec: 627 * 628 * System software reads this field to determine the 629 * MSI-X Table Size N, which is encoded as N-1. 630 * For example, a returned value of "00000000011" 631 * indicates a table size of 4. 632 */ 633 vpci->pci_hdr.msix.ctrl = cpu_to_le16(VIRTIO_NR_MSIX - 1); 634 635 /* Both table and PBA are mapped to the same BAR (2) */ 636 vpci->pci_hdr.msix.table_offset = cpu_to_le32(2); 637 vpci->pci_hdr.msix.pba_offset = cpu_to_le32(2 | VIRTIO_MSIX_TABLE_SIZE); 638 vpci->config_vector = 0; 639 640 if (irq__can_signal_msi(kvm)) 641 vpci->features |= VIRTIO_PCI_F_SIGNAL_MSI; 642 643 vpci->legacy_irq_line = pci__assign_irq(&vpci->pci_hdr); 644 645 r = device__register(&vpci->dev_hdr); 646 if (r < 0) 647 return r; 648 649 return 0; 650 } 651 652 int virtio_pci__reset(struct kvm *kvm, struct virtio_device *vdev) 653 { 654 unsigned int vq; 655 struct virtio_pci *vpci = vdev->virtio; 656 657 for (vq = 0; vq < vdev->ops->get_vq_count(kvm, vpci->dev); vq++) 658 virtio_pci_exit_vq(kvm, vdev, vq); 659 660 return 0; 661 } 662 663 int virtio_pci__exit(struct kvm *kvm, struct virtio_device *vdev) 664 { 665 struct virtio_pci *vpci = vdev->virtio; 666 667 virtio_pci__reset(kvm, vdev); 668 kvm__deregister_mmio(kvm, virtio_pci__mmio_addr(vpci)); 669 kvm__deregister_mmio(kvm, virtio_pci__msix_io_addr(vpci)); 670 kvm__deregister_pio(kvm, virtio_pci__port_addr(vpci)); 671 672 return 0; 673 } 674