1 #include "kvm/virtio-pci.h" 2 3 #include "kvm/ioport.h" 4 #include "kvm/kvm.h" 5 #include "kvm/kvm-cpu.h" 6 #include "kvm/virtio-pci-dev.h" 7 #include "kvm/irq.h" 8 #include "kvm/virtio.h" 9 #include "kvm/ioeventfd.h" 10 #include "kvm/util.h" 11 12 #include <sys/ioctl.h> 13 #include <linux/virtio_pci.h> 14 #include <linux/byteorder.h> 15 #include <assert.h> 16 #include <string.h> 17 18 #define ALIGN_UP(x, s) ALIGN((x) + (s) - 1, (s)) 19 #define VIRTIO_NR_MSIX (VIRTIO_PCI_MAX_VQ + VIRTIO_PCI_MAX_CONFIG) 20 #define VIRTIO_MSIX_TABLE_SIZE (VIRTIO_NR_MSIX * 16) 21 #define VIRTIO_MSIX_PBA_SIZE (ALIGN_UP(VIRTIO_MSIX_TABLE_SIZE, 64) / 8) 22 #define VIRTIO_MSIX_BAR_SIZE (1UL << fls_long(VIRTIO_MSIX_TABLE_SIZE + \ 23 VIRTIO_MSIX_PBA_SIZE)) 24 25 static u16 virtio_pci__port_addr(struct virtio_pci *vpci) 26 { 27 return pci__bar_address(&vpci->pci_hdr, 0); 28 } 29 30 static u32 virtio_pci__mmio_addr(struct virtio_pci *vpci) 31 { 32 return pci__bar_address(&vpci->pci_hdr, 1); 33 } 34 35 static u32 virtio_pci__msix_io_addr(struct virtio_pci *vpci) 36 { 37 return pci__bar_address(&vpci->pci_hdr, 2); 38 } 39 40 static int virtio_pci__add_msix_route(struct virtio_pci *vpci, u32 vec) 41 { 42 int gsi; 43 struct msi_msg *msg; 44 45 if (vec == VIRTIO_MSI_NO_VECTOR) 46 return -EINVAL; 47 48 msg = &vpci->msix_table[vec].msg; 49 gsi = irq__add_msix_route(vpci->kvm, msg, vpci->dev_hdr.dev_num << 3); 50 /* 51 * We don't need IRQ routing if we can use 52 * MSI injection via the KVM_SIGNAL_MSI ioctl. 53 */ 54 if (gsi == -ENXIO && vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 55 return gsi; 56 57 if (gsi < 0) 58 die("failed to configure MSIs"); 59 60 return gsi; 61 } 62 63 static void virtio_pci__del_msix_route(struct virtio_pci *vpci, u32 gsi) 64 { 65 struct msi_msg msg = { 0 }; 66 67 irq__update_msix_route(vpci->kvm, gsi, &msg); 68 } 69 70 static void virtio_pci__ioevent_callback(struct kvm *kvm, void *param) 71 { 72 struct virtio_pci_ioevent_param *ioeventfd = param; 73 struct virtio_pci *vpci = ioeventfd->vdev->virtio; 74 75 ioeventfd->vdev->ops->notify_vq(kvm, vpci->dev, ioeventfd->vq); 76 } 77 78 static int virtio_pci__init_ioeventfd(struct kvm *kvm, struct virtio_device *vdev, u32 vq) 79 { 80 struct ioevent ioevent; 81 struct virtio_pci *vpci = vdev->virtio; 82 u32 mmio_addr = virtio_pci__mmio_addr(vpci); 83 u16 port_addr = virtio_pci__port_addr(vpci); 84 off_t offset = vpci->doorbell_offset; 85 int r, flags = 0; 86 int fd; 87 88 vpci->ioeventfds[vq] = (struct virtio_pci_ioevent_param) { 89 .vdev = vdev, 90 .vq = vq, 91 }; 92 93 ioevent = (struct ioevent) { 94 .fn = virtio_pci__ioevent_callback, 95 .fn_ptr = &vpci->ioeventfds[vq], 96 .datamatch = vq, 97 .fn_kvm = kvm, 98 }; 99 100 /* 101 * Vhost will poll the eventfd in host kernel side, otherwise we 102 * need to poll in userspace. 103 */ 104 if (!vdev->use_vhost) 105 flags |= IOEVENTFD_FLAG_USER_POLL; 106 107 /* ioport */ 108 ioevent.io_addr = port_addr + offset; 109 ioevent.io_len = sizeof(u16); 110 ioevent.fd = fd = eventfd(0, 0); 111 r = ioeventfd__add_event(&ioevent, flags | IOEVENTFD_FLAG_PIO); 112 if (r) 113 return r; 114 115 /* mmio */ 116 ioevent.io_addr = mmio_addr + offset; 117 ioevent.io_len = sizeof(u16); 118 ioevent.fd = eventfd(0, 0); 119 r = ioeventfd__add_event(&ioevent, flags); 120 if (r) 121 goto free_ioport_evt; 122 123 if (vdev->ops->notify_vq_eventfd) 124 vdev->ops->notify_vq_eventfd(kvm, vpci->dev, vq, fd); 125 return 0; 126 127 free_ioport_evt: 128 ioeventfd__del_event(port_addr + offset, vq); 129 return r; 130 } 131 132 static int virtio_pci_init_vq(struct kvm *kvm, struct virtio_device *vdev, 133 int vq) 134 { 135 int ret; 136 struct virtio_pci *vpci = vdev->virtio; 137 138 ret = virtio_pci__init_ioeventfd(kvm, vdev, vq); 139 if (ret) { 140 pr_err("couldn't add ioeventfd for vq %d: %d", vq, ret); 141 return ret; 142 } 143 return vdev->ops->init_vq(kvm, vpci->dev, vq); 144 } 145 146 static void virtio_pci_exit_vq(struct kvm *kvm, struct virtio_device *vdev, 147 int vq) 148 { 149 struct virtio_pci *vpci = vdev->virtio; 150 u32 mmio_addr = virtio_pci__mmio_addr(vpci); 151 u16 port_addr = virtio_pci__port_addr(vpci); 152 off_t offset = vpci->doorbell_offset; 153 154 virtio_pci__del_msix_route(vpci, vpci->gsis[vq]); 155 vpci->gsis[vq] = 0; 156 vpci->vq_vector[vq] = VIRTIO_MSI_NO_VECTOR; 157 ioeventfd__del_event(mmio_addr + offset, vq); 158 ioeventfd__del_event(port_addr + offset, vq); 159 virtio_exit_vq(kvm, vdev, vpci->dev, vq); 160 } 161 162 static inline bool virtio_pci__msix_enabled(struct virtio_pci *vpci) 163 { 164 return vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_ENABLE); 165 } 166 167 static bool virtio_pci__specific_data_in(struct kvm *kvm, struct virtio_device *vdev, 168 void *data, u32 size, unsigned long offset) 169 { 170 u32 config_offset; 171 struct virtio_pci *vpci = vdev->virtio; 172 int type = virtio__get_dev_specific_field(offset - 20, 173 virtio_pci__msix_enabled(vpci), 174 &config_offset); 175 if (type == VIRTIO_PCI_O_MSIX) { 176 switch (offset) { 177 case VIRTIO_MSI_CONFIG_VECTOR: 178 ioport__write16(data, vpci->config_vector); 179 break; 180 case VIRTIO_MSI_QUEUE_VECTOR: 181 ioport__write16(data, vpci->vq_vector[vpci->queue_selector]); 182 break; 183 }; 184 185 return true; 186 } else if (type == VIRTIO_PCI_O_CONFIG) { 187 return virtio_access_config(kvm, vdev, vpci->dev, config_offset, 188 data, size, false); 189 } 190 191 return false; 192 } 193 194 static bool virtio_pci__data_in(struct kvm_cpu *vcpu, struct virtio_device *vdev, 195 unsigned long offset, void *data, u32 size) 196 { 197 bool ret = true; 198 struct virtio_pci *vpci; 199 struct virt_queue *vq; 200 struct kvm *kvm; 201 u32 val; 202 203 kvm = vcpu->kvm; 204 vpci = vdev->virtio; 205 206 switch (offset) { 207 case VIRTIO_PCI_HOST_FEATURES: 208 val = vdev->ops->get_host_features(kvm, vpci->dev); 209 ioport__write32(data, val); 210 break; 211 case VIRTIO_PCI_QUEUE_PFN: 212 vq = vdev->ops->get_vq(kvm, vpci->dev, vpci->queue_selector); 213 ioport__write32(data, vq->vring_addr.pfn); 214 break; 215 case VIRTIO_PCI_QUEUE_NUM: 216 val = vdev->ops->get_size_vq(kvm, vpci->dev, vpci->queue_selector); 217 ioport__write16(data, val); 218 break; 219 case VIRTIO_PCI_STATUS: 220 ioport__write8(data, vpci->status); 221 break; 222 case VIRTIO_PCI_ISR: 223 ioport__write8(data, vpci->isr); 224 kvm__irq_line(kvm, vpci->legacy_irq_line, VIRTIO_IRQ_LOW); 225 vpci->isr = VIRTIO_IRQ_LOW; 226 break; 227 default: 228 ret = virtio_pci__specific_data_in(kvm, vdev, data, size, offset); 229 break; 230 }; 231 232 return ret; 233 } 234 235 static void update_msix_map(struct virtio_pci *vpci, 236 struct msix_table *msix_entry, u32 vecnum) 237 { 238 u32 gsi, i; 239 240 /* Find the GSI number used for that vector */ 241 if (vecnum == vpci->config_vector) { 242 gsi = vpci->config_gsi; 243 } else { 244 for (i = 0; i < VIRTIO_PCI_MAX_VQ; i++) 245 if (vpci->vq_vector[i] == vecnum) 246 break; 247 if (i == VIRTIO_PCI_MAX_VQ) 248 return; 249 gsi = vpci->gsis[i]; 250 } 251 252 if (gsi == 0) 253 return; 254 255 msix_entry = &msix_entry[vecnum]; 256 irq__update_msix_route(vpci->kvm, gsi, &msix_entry->msg); 257 } 258 259 static bool virtio_pci__specific_data_out(struct kvm *kvm, struct virtio_device *vdev, 260 void *data, u32 size, unsigned long offset) 261 { 262 struct virtio_pci *vpci = vdev->virtio; 263 u32 config_offset, vec; 264 int gsi; 265 int type = virtio__get_dev_specific_field(offset - 20, virtio_pci__msix_enabled(vpci), 266 &config_offset); 267 if (type == VIRTIO_PCI_O_MSIX) { 268 switch (offset) { 269 case VIRTIO_MSI_CONFIG_VECTOR: 270 vec = vpci->config_vector = ioport__read16(data); 271 272 gsi = virtio_pci__add_msix_route(vpci, vec); 273 if (gsi < 0) 274 break; 275 276 vpci->config_gsi = gsi; 277 break; 278 case VIRTIO_MSI_QUEUE_VECTOR: 279 vec = ioport__read16(data); 280 vpci->vq_vector[vpci->queue_selector] = vec; 281 282 gsi = virtio_pci__add_msix_route(vpci, vec); 283 if (gsi < 0) 284 break; 285 286 vpci->gsis[vpci->queue_selector] = gsi; 287 if (vdev->ops->notify_vq_gsi) 288 vdev->ops->notify_vq_gsi(kvm, vpci->dev, 289 vpci->queue_selector, 290 gsi); 291 break; 292 }; 293 294 return true; 295 } else if (type == VIRTIO_PCI_O_CONFIG) { 296 return virtio_access_config(kvm, vdev, vpci->dev, config_offset, 297 data, size, true); 298 } 299 300 return false; 301 } 302 303 static bool virtio_pci__data_out(struct kvm_cpu *vcpu, struct virtio_device *vdev, 304 unsigned long offset, void *data, u32 size) 305 { 306 bool ret = true; 307 struct virtio_pci *vpci; 308 struct virt_queue *vq; 309 struct kvm *kvm; 310 u32 val; 311 unsigned int vq_count; 312 313 kvm = vcpu->kvm; 314 vpci = vdev->virtio; 315 vq_count = vdev->ops->get_vq_count(kvm, vpci->dev); 316 317 switch (offset) { 318 case VIRTIO_PCI_GUEST_FEATURES: 319 val = ioport__read32(data); 320 virtio_set_guest_features(kvm, vdev, vpci->dev, val); 321 break; 322 case VIRTIO_PCI_QUEUE_PFN: 323 val = ioport__read32(data); 324 if (val) { 325 vq = vdev->ops->get_vq(kvm, vpci->dev, 326 vpci->queue_selector); 327 vq->vring_addr = (struct vring_addr) { 328 .legacy = true, 329 .pfn = val, 330 .align = VIRTIO_PCI_VRING_ALIGN, 331 .pgsize = 1 << VIRTIO_PCI_QUEUE_ADDR_SHIFT, 332 }; 333 virtio_pci_init_vq(kvm, vdev, vpci->queue_selector); 334 } else { 335 virtio_pci_exit_vq(kvm, vdev, vpci->queue_selector); 336 } 337 break; 338 case VIRTIO_PCI_QUEUE_SEL: 339 val = ioport__read16(data); 340 if (val >= vq_count) { 341 WARN_ONCE(1, "QUEUE_SEL value (%u) is larger than VQ count (%u)\n", 342 val, vq_count); 343 return false; 344 } 345 vpci->queue_selector = val; 346 break; 347 case VIRTIO_PCI_QUEUE_NOTIFY: 348 val = ioport__read16(data); 349 if (val >= vq_count) { 350 WARN_ONCE(1, "QUEUE_SEL value (%u) is larger than VQ count (%u)\n", 351 val, vq_count); 352 return false; 353 } 354 vdev->ops->notify_vq(kvm, vpci->dev, val); 355 break; 356 case VIRTIO_PCI_STATUS: 357 vpci->status = ioport__read8(data); 358 if (!vpci->status) /* Sample endianness on reset */ 359 vdev->endian = kvm_cpu__get_endianness(vcpu); 360 virtio_notify_status(kvm, vdev, vpci->dev, vpci->status); 361 break; 362 default: 363 ret = virtio_pci__specific_data_out(kvm, vdev, data, size, offset); 364 break; 365 }; 366 367 return ret; 368 } 369 370 static void virtio_pci__msix_mmio_callback(struct kvm_cpu *vcpu, 371 u64 addr, u8 *data, u32 len, 372 u8 is_write, void *ptr) 373 { 374 struct virtio_device *vdev = ptr; 375 struct virtio_pci *vpci = vdev->virtio; 376 struct msix_table *table; 377 u32 msix_io_addr = virtio_pci__msix_io_addr(vpci); 378 u32 pba_offset; 379 int vecnum; 380 size_t offset; 381 382 BUILD_BUG_ON(VIRTIO_NR_MSIX > (sizeof(vpci->msix_pba) * 8)); 383 384 pba_offset = vpci->pci_hdr.msix.pba_offset & ~PCI_MSIX_TABLE_BIR; 385 if (addr >= msix_io_addr + pba_offset) { 386 /* Read access to PBA */ 387 if (is_write) 388 return; 389 offset = addr - (msix_io_addr + pba_offset); 390 if ((offset + len) > sizeof (vpci->msix_pba)) 391 return; 392 memcpy(data, (void *)&vpci->msix_pba + offset, len); 393 return; 394 } 395 396 table = vpci->msix_table; 397 offset = addr - msix_io_addr; 398 399 vecnum = offset / sizeof(struct msix_table); 400 offset = offset % sizeof(struct msix_table); 401 402 if (!is_write) { 403 memcpy(data, (void *)&table[vecnum] + offset, len); 404 return; 405 } 406 407 memcpy((void *)&table[vecnum] + offset, data, len); 408 409 /* Did we just update the address or payload? */ 410 if (offset < offsetof(struct msix_table, ctrl)) 411 update_msix_map(vpci, table, vecnum); 412 } 413 414 static void virtio_pci__signal_msi(struct kvm *kvm, struct virtio_pci *vpci, 415 int vec) 416 { 417 struct kvm_msi msi = { 418 .address_lo = vpci->msix_table[vec].msg.address_lo, 419 .address_hi = vpci->msix_table[vec].msg.address_hi, 420 .data = vpci->msix_table[vec].msg.data, 421 }; 422 423 if (kvm->msix_needs_devid) { 424 msi.flags = KVM_MSI_VALID_DEVID; 425 msi.devid = vpci->dev_hdr.dev_num << 3; 426 } 427 428 irq__signal_msi(kvm, &msi); 429 } 430 431 int virtio_pci__signal_vq(struct kvm *kvm, struct virtio_device *vdev, u32 vq) 432 { 433 struct virtio_pci *vpci = vdev->virtio; 434 int tbl = vpci->vq_vector[vq]; 435 436 if (virtio_pci__msix_enabled(vpci) && tbl != VIRTIO_MSI_NO_VECTOR) { 437 if (vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_MASKALL) || 438 vpci->msix_table[tbl].ctrl & cpu_to_le16(PCI_MSIX_ENTRY_CTRL_MASKBIT)) { 439 440 vpci->msix_pba |= 1 << tbl; 441 return 0; 442 } 443 444 if (vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 445 virtio_pci__signal_msi(kvm, vpci, vpci->vq_vector[vq]); 446 else 447 kvm__irq_trigger(kvm, vpci->gsis[vq]); 448 } else { 449 vpci->isr = VIRTIO_IRQ_HIGH; 450 kvm__irq_line(kvm, vpci->legacy_irq_line, VIRTIO_IRQ_HIGH); 451 } 452 return 0; 453 } 454 455 int virtio_pci__signal_config(struct kvm *kvm, struct virtio_device *vdev) 456 { 457 struct virtio_pci *vpci = vdev->virtio; 458 int tbl = vpci->config_vector; 459 460 if (virtio_pci__msix_enabled(vpci) && tbl != VIRTIO_MSI_NO_VECTOR) { 461 if (vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_MASKALL) || 462 vpci->msix_table[tbl].ctrl & cpu_to_le16(PCI_MSIX_ENTRY_CTRL_MASKBIT)) { 463 464 vpci->msix_pba |= 1 << tbl; 465 return 0; 466 } 467 468 if (vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 469 virtio_pci__signal_msi(kvm, vpci, tbl); 470 else 471 kvm__irq_trigger(kvm, vpci->config_gsi); 472 } else { 473 vpci->isr = VIRTIO_PCI_ISR_CONFIG; 474 kvm__irq_trigger(kvm, vpci->legacy_irq_line); 475 } 476 477 return 0; 478 } 479 480 static void virtio_pci__io_mmio_callback(struct kvm_cpu *vcpu, 481 u64 addr, u8 *data, u32 len, 482 u8 is_write, void *ptr) 483 { 484 struct virtio_device *vdev = ptr; 485 struct virtio_pci *vpci = vdev->virtio; 486 u32 ioport_addr = virtio_pci__port_addr(vpci); 487 u32 base_addr; 488 489 if (addr >= ioport_addr && 490 addr < ioport_addr + pci__bar_size(&vpci->pci_hdr, 0)) 491 base_addr = ioport_addr; 492 else 493 base_addr = virtio_pci__mmio_addr(vpci); 494 495 if (!is_write) 496 virtio_pci__data_in(vcpu, vdev, addr - base_addr, data, len); 497 else 498 virtio_pci__data_out(vcpu, vdev, addr - base_addr, data, len); 499 } 500 501 static int virtio_pci__bar_activate(struct kvm *kvm, 502 struct pci_device_header *pci_hdr, 503 int bar_num, void *data) 504 { 505 struct virtio_device *vdev = data; 506 u32 bar_addr, bar_size; 507 int r = -EINVAL; 508 509 assert(bar_num <= 2); 510 511 bar_addr = pci__bar_address(pci_hdr, bar_num); 512 bar_size = pci__bar_size(pci_hdr, bar_num); 513 514 switch (bar_num) { 515 case 0: 516 r = kvm__register_pio(kvm, bar_addr, bar_size, 517 virtio_pci__io_mmio_callback, vdev); 518 break; 519 case 1: 520 r = kvm__register_mmio(kvm, bar_addr, bar_size, false, 521 virtio_pci__io_mmio_callback, vdev); 522 break; 523 case 2: 524 r = kvm__register_mmio(kvm, bar_addr, bar_size, false, 525 virtio_pci__msix_mmio_callback, vdev); 526 break; 527 } 528 529 return r; 530 } 531 532 static int virtio_pci__bar_deactivate(struct kvm *kvm, 533 struct pci_device_header *pci_hdr, 534 int bar_num, void *data) 535 { 536 u32 bar_addr; 537 bool success; 538 int r = -EINVAL; 539 540 assert(bar_num <= 2); 541 542 bar_addr = pci__bar_address(pci_hdr, bar_num); 543 544 switch (bar_num) { 545 case 0: 546 r = kvm__deregister_pio(kvm, bar_addr); 547 break; 548 case 1: 549 case 2: 550 success = kvm__deregister_mmio(kvm, bar_addr); 551 /* kvm__deregister_mmio fails when the region is not found. */ 552 r = (success ? 0 : -ENOENT); 553 break; 554 } 555 556 return r; 557 } 558 559 int virtio_pci__init(struct kvm *kvm, void *dev, struct virtio_device *vdev, 560 int device_id, int subsys_id, int class) 561 { 562 struct virtio_pci *vpci = vdev->virtio; 563 u32 mmio_addr, msix_io_block; 564 u16 port_addr; 565 int r; 566 567 vpci->kvm = kvm; 568 vpci->dev = dev; 569 570 BUILD_BUG_ON(!is_power_of_two(PCI_IO_SIZE)); 571 572 port_addr = pci_get_io_port_block(PCI_IO_SIZE); 573 mmio_addr = pci_get_mmio_block(PCI_IO_SIZE); 574 msix_io_block = pci_get_mmio_block(VIRTIO_MSIX_BAR_SIZE); 575 576 vpci->doorbell_offset = VIRTIO_PCI_QUEUE_NOTIFY; 577 578 vpci->pci_hdr = (struct pci_device_header) { 579 .vendor_id = cpu_to_le16(PCI_VENDOR_ID_REDHAT_QUMRANET), 580 .device_id = cpu_to_le16(device_id), 581 .command = PCI_COMMAND_IO | PCI_COMMAND_MEMORY, 582 .header_type = PCI_HEADER_TYPE_NORMAL, 583 .revision_id = 0, 584 .class[0] = class & 0xff, 585 .class[1] = (class >> 8) & 0xff, 586 .class[2] = (class >> 16) & 0xff, 587 .subsys_vendor_id = cpu_to_le16(PCI_SUBSYSTEM_VENDOR_ID_REDHAT_QUMRANET), 588 .subsys_id = cpu_to_le16(subsys_id), 589 .bar[0] = cpu_to_le32(port_addr 590 | PCI_BASE_ADDRESS_SPACE_IO), 591 .bar[1] = cpu_to_le32(mmio_addr 592 | PCI_BASE_ADDRESS_SPACE_MEMORY), 593 .bar[2] = cpu_to_le32(msix_io_block 594 | PCI_BASE_ADDRESS_SPACE_MEMORY), 595 .status = cpu_to_le16(PCI_STATUS_CAP_LIST), 596 .capabilities = (void *)&vpci->pci_hdr.msix - (void *)&vpci->pci_hdr, 597 .bar_size[0] = cpu_to_le32(PCI_IO_SIZE), 598 .bar_size[1] = cpu_to_le32(PCI_IO_SIZE), 599 .bar_size[2] = cpu_to_le32(VIRTIO_MSIX_BAR_SIZE), 600 }; 601 602 r = pci__register_bar_regions(kvm, &vpci->pci_hdr, 603 virtio_pci__bar_activate, 604 virtio_pci__bar_deactivate, vdev); 605 if (r < 0) 606 return r; 607 608 vpci->dev_hdr = (struct device_header) { 609 .bus_type = DEVICE_BUS_PCI, 610 .data = &vpci->pci_hdr, 611 }; 612 613 vpci->pci_hdr.msix.cap = PCI_CAP_ID_MSIX; 614 vpci->pci_hdr.msix.next = 0; 615 /* 616 * We at most have VIRTIO_NR_MSIX entries (VIRTIO_PCI_MAX_VQ 617 * entries for virt queue, VIRTIO_PCI_MAX_CONFIG entries for 618 * config). 619 * 620 * To quote the PCI spec: 621 * 622 * System software reads this field to determine the 623 * MSI-X Table Size N, which is encoded as N-1. 624 * For example, a returned value of "00000000011" 625 * indicates a table size of 4. 626 */ 627 vpci->pci_hdr.msix.ctrl = cpu_to_le16(VIRTIO_NR_MSIX - 1); 628 629 /* Both table and PBA are mapped to the same BAR (2) */ 630 vpci->pci_hdr.msix.table_offset = cpu_to_le32(2); 631 vpci->pci_hdr.msix.pba_offset = cpu_to_le32(2 | VIRTIO_MSIX_TABLE_SIZE); 632 vpci->config_vector = 0; 633 634 if (irq__can_signal_msi(kvm)) 635 vpci->features |= VIRTIO_PCI_F_SIGNAL_MSI; 636 637 vpci->legacy_irq_line = pci__assign_irq(&vpci->pci_hdr); 638 639 r = device__register(&vpci->dev_hdr); 640 if (r < 0) 641 return r; 642 643 return 0; 644 } 645 646 int virtio_pci__reset(struct kvm *kvm, struct virtio_device *vdev) 647 { 648 unsigned int vq; 649 struct virtio_pci *vpci = vdev->virtio; 650 651 virtio_pci__del_msix_route(vpci, vpci->config_gsi); 652 vpci->config_gsi = 0; 653 vpci->config_vector = VIRTIO_MSI_NO_VECTOR; 654 655 for (vq = 0; vq < vdev->ops->get_vq_count(kvm, vpci->dev); vq++) 656 virtio_pci_exit_vq(kvm, vdev, vq); 657 658 return 0; 659 } 660 661 int virtio_pci__exit(struct kvm *kvm, struct virtio_device *vdev) 662 { 663 struct virtio_pci *vpci = vdev->virtio; 664 665 virtio_pci__reset(kvm, vdev); 666 kvm__deregister_mmio(kvm, virtio_pci__mmio_addr(vpci)); 667 kvm__deregister_mmio(kvm, virtio_pci__msix_io_addr(vpci)); 668 kvm__deregister_pio(kvm, virtio_pci__port_addr(vpci)); 669 670 return 0; 671 } 672