1 #include "kvm/virtio-pci.h" 2 3 #include "kvm/ioport.h" 4 #include "kvm/kvm.h" 5 #include "kvm/virtio-pci-dev.h" 6 #include "kvm/irq.h" 7 #include "kvm/virtio.h" 8 #include "kvm/ioeventfd.h" 9 10 #include <sys/ioctl.h> 11 #include <linux/virtio_pci.h> 12 #include <linux/byteorder.h> 13 #include <string.h> 14 15 static void virtio_pci__ioevent_callback(struct kvm *kvm, void *param) 16 { 17 struct virtio_pci_ioevent_param *ioeventfd = param; 18 struct virtio_pci *vpci = ioeventfd->vdev->virtio; 19 20 ioeventfd->vdev->ops->notify_vq(kvm, vpci->dev, ioeventfd->vq); 21 } 22 23 static int virtio_pci__init_ioeventfd(struct kvm *kvm, struct virtio_device *vdev, u32 vq) 24 { 25 struct ioevent ioevent; 26 struct virtio_pci *vpci = vdev->virtio; 27 int r; 28 29 vpci->ioeventfds[vq] = (struct virtio_pci_ioevent_param) { 30 .vdev = vdev, 31 .vq = vq, 32 }; 33 34 ioevent = (struct ioevent) { 35 .io_addr = vpci->base_addr + VIRTIO_PCI_QUEUE_NOTIFY, 36 .io_len = sizeof(u16), 37 .fn = virtio_pci__ioevent_callback, 38 .fn_ptr = &vpci->ioeventfds[vq], 39 .datamatch = vq, 40 .fn_kvm = kvm, 41 .fd = eventfd(0, 0), 42 }; 43 44 if (vdev->use_vhost) 45 /* 46 * Vhost will poll the eventfd in host kernel side, 47 * no need to poll in userspace. 48 */ 49 r = ioeventfd__add_event(&ioevent, IOEVENTFD_FLAG_PIO); 50 else 51 /* Need to poll in userspace. */ 52 r = ioeventfd__add_event(&ioevent, IOEVENTFD_FLAG_PIO | 53 IOEVENTFD_FLAG_USER_POLL); 54 if (r) 55 return r; 56 57 if (vdev->ops->notify_vq_eventfd) 58 vdev->ops->notify_vq_eventfd(kvm, vpci->dev, vq, ioevent.fd); 59 60 return 0; 61 } 62 63 static inline bool virtio_pci__msix_enabled(struct virtio_pci *vpci) 64 { 65 return vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_ENABLE); 66 } 67 68 static bool virtio_pci__specific_io_in(struct kvm *kvm, struct virtio_device *vdev, u16 port, 69 void *data, int size, int offset) 70 { 71 u32 config_offset; 72 struct virtio_pci *vpci = vdev->virtio; 73 int type = virtio__get_dev_specific_field(offset - 20, 74 virtio_pci__msix_enabled(vpci), 75 &config_offset); 76 if (type == VIRTIO_PCI_O_MSIX) { 77 switch (offset) { 78 case VIRTIO_MSI_CONFIG_VECTOR: 79 ioport__write16(data, vpci->config_vector); 80 break; 81 case VIRTIO_MSI_QUEUE_VECTOR: 82 ioport__write16(data, vpci->vq_vector[vpci->queue_selector]); 83 break; 84 }; 85 86 return true; 87 } else if (type == VIRTIO_PCI_O_CONFIG) { 88 u8 cfg; 89 90 cfg = vdev->ops->get_config(kvm, vpci->dev)[config_offset]; 91 ioport__write8(data, cfg); 92 return true; 93 } 94 95 return false; 96 } 97 98 static bool virtio_pci__io_in(struct ioport *ioport, struct kvm *kvm, u16 port, void *data, int size) 99 { 100 unsigned long offset; 101 bool ret = true; 102 struct virtio_device *vdev; 103 struct virtio_pci *vpci; 104 u32 val; 105 106 vdev = ioport->priv; 107 vpci = vdev->virtio; 108 offset = port - vpci->base_addr; 109 110 switch (offset) { 111 case VIRTIO_PCI_HOST_FEATURES: 112 val = vdev->ops->get_host_features(kvm, vpci->dev); 113 ioport__write32(data, val); 114 break; 115 case VIRTIO_PCI_QUEUE_PFN: 116 val = vdev->ops->get_pfn_vq(kvm, vpci->dev, vpci->queue_selector); 117 ioport__write32(data, val); 118 break; 119 case VIRTIO_PCI_QUEUE_NUM: 120 val = vdev->ops->get_size_vq(kvm, vpci->dev, vpci->queue_selector); 121 ioport__write16(data, val); 122 break; 123 case VIRTIO_PCI_STATUS: 124 ioport__write8(data, vpci->status); 125 break; 126 case VIRTIO_PCI_ISR: 127 ioport__write8(data, vpci->isr); 128 kvm__irq_line(kvm, vpci->pci_hdr.irq_line, VIRTIO_IRQ_LOW); 129 vpci->isr = VIRTIO_IRQ_LOW; 130 break; 131 default: 132 ret = virtio_pci__specific_io_in(kvm, vdev, port, data, size, offset); 133 break; 134 }; 135 136 return ret; 137 } 138 139 static bool virtio_pci__specific_io_out(struct kvm *kvm, struct virtio_device *vdev, u16 port, 140 void *data, int size, int offset) 141 { 142 struct virtio_pci *vpci = vdev->virtio; 143 u32 config_offset, gsi, vec; 144 int type = virtio__get_dev_specific_field(offset - 20, virtio_pci__msix_enabled(vpci), 145 &config_offset); 146 if (type == VIRTIO_PCI_O_MSIX) { 147 switch (offset) { 148 case VIRTIO_MSI_CONFIG_VECTOR: 149 vec = vpci->config_vector = ioport__read16(data); 150 if (vec == VIRTIO_MSI_NO_VECTOR) 151 break; 152 153 gsi = irq__add_msix_route(kvm, &vpci->msix_table[vec].msg); 154 155 vpci->config_gsi = gsi; 156 break; 157 case VIRTIO_MSI_QUEUE_VECTOR: 158 vec = vpci->vq_vector[vpci->queue_selector] = ioport__read16(data); 159 160 if (vec == VIRTIO_MSI_NO_VECTOR) 161 break; 162 163 gsi = irq__add_msix_route(kvm, &vpci->msix_table[vec].msg); 164 vpci->gsis[vpci->queue_selector] = gsi; 165 if (vdev->ops->notify_vq_gsi) 166 vdev->ops->notify_vq_gsi(kvm, vpci->dev, 167 vpci->queue_selector, gsi); 168 break; 169 }; 170 171 return true; 172 } else if (type == VIRTIO_PCI_O_CONFIG) { 173 vdev->ops->get_config(kvm, vpci->dev)[config_offset] = *(u8 *)data; 174 175 return true; 176 } 177 178 return false; 179 } 180 181 static bool virtio_pci__io_out(struct ioport *ioport, struct kvm *kvm, u16 port, void *data, int size) 182 { 183 unsigned long offset; 184 bool ret = true; 185 struct virtio_device *vdev; 186 struct virtio_pci *vpci; 187 u32 val; 188 189 vdev = ioport->priv; 190 vpci = vdev->virtio; 191 offset = port - vpci->base_addr; 192 193 switch (offset) { 194 case VIRTIO_PCI_GUEST_FEATURES: 195 val = ioport__read32(data); 196 vdev->ops->set_guest_features(kvm, vpci->dev, val); 197 break; 198 case VIRTIO_PCI_QUEUE_PFN: 199 val = ioport__read32(data); 200 virtio_pci__init_ioeventfd(kvm, vdev, vpci->queue_selector); 201 vdev->ops->init_vq(kvm, vpci->dev, vpci->queue_selector, 202 1 << VIRTIO_PCI_QUEUE_ADDR_SHIFT, 203 VIRTIO_PCI_VRING_ALIGN, val); 204 break; 205 case VIRTIO_PCI_QUEUE_SEL: 206 vpci->queue_selector = ioport__read16(data); 207 break; 208 case VIRTIO_PCI_QUEUE_NOTIFY: 209 val = ioport__read16(data); 210 vdev->ops->notify_vq(kvm, vpci->dev, val); 211 break; 212 case VIRTIO_PCI_STATUS: 213 vpci->status = ioport__read8(data); 214 if (vdev->ops->notify_status) 215 vdev->ops->notify_status(kvm, vpci->dev, vpci->status); 216 break; 217 default: 218 ret = virtio_pci__specific_io_out(kvm, vdev, port, data, size, offset); 219 break; 220 }; 221 222 return ret; 223 } 224 225 static struct ioport_operations virtio_pci__io_ops = { 226 .io_in = virtio_pci__io_in, 227 .io_out = virtio_pci__io_out, 228 }; 229 230 static void virtio_pci__mmio_callback(u64 addr, u8 *data, u32 len, u8 is_write, void *ptr) 231 { 232 struct virtio_pci *vpci = ptr; 233 void *table; 234 u32 offset; 235 236 if (addr > vpci->msix_io_block + PCI_IO_SIZE) { 237 table = &vpci->msix_pba; 238 offset = vpci->msix_io_block + PCI_IO_SIZE; 239 } else { 240 table = &vpci->msix_table; 241 offset = vpci->msix_io_block; 242 } 243 244 if (is_write) 245 memcpy(table + addr - offset, data, len); 246 else 247 memcpy(data, table + addr - offset, len); 248 } 249 250 static void virtio_pci__signal_msi(struct kvm *kvm, struct virtio_pci *vpci, int vec) 251 { 252 struct kvm_msi msi = { 253 .address_lo = vpci->msix_table[vec].msg.address_lo, 254 .address_hi = vpci->msix_table[vec].msg.address_hi, 255 .data = vpci->msix_table[vec].msg.data, 256 }; 257 258 ioctl(kvm->vm_fd, KVM_SIGNAL_MSI, &msi); 259 } 260 261 int virtio_pci__signal_vq(struct kvm *kvm, struct virtio_device *vdev, u32 vq) 262 { 263 struct virtio_pci *vpci = vdev->virtio; 264 int tbl = vpci->vq_vector[vq]; 265 266 if (virtio_pci__msix_enabled(vpci) && tbl != VIRTIO_MSI_NO_VECTOR) { 267 if (vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_MASKALL) || 268 vpci->msix_table[tbl].ctrl & cpu_to_le16(PCI_MSIX_ENTRY_CTRL_MASKBIT)) { 269 270 vpci->msix_pba |= 1 << tbl; 271 return 0; 272 } 273 274 if (vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 275 virtio_pci__signal_msi(kvm, vpci, vpci->vq_vector[vq]); 276 else 277 kvm__irq_trigger(kvm, vpci->gsis[vq]); 278 } else { 279 vpci->isr = VIRTIO_IRQ_HIGH; 280 kvm__irq_trigger(kvm, vpci->pci_hdr.irq_line); 281 } 282 return 0; 283 } 284 285 int virtio_pci__signal_config(struct kvm *kvm, struct virtio_device *vdev) 286 { 287 struct virtio_pci *vpci = vdev->virtio; 288 int tbl = vpci->config_vector; 289 290 if (virtio_pci__msix_enabled(vpci) && tbl != VIRTIO_MSI_NO_VECTOR) { 291 if (vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_MASKALL) || 292 vpci->msix_table[tbl].ctrl & cpu_to_le16(PCI_MSIX_ENTRY_CTRL_MASKBIT)) { 293 294 vpci->msix_pba |= 1 << tbl; 295 return 0; 296 } 297 298 if (vpci->features & VIRTIO_PCI_F_SIGNAL_MSI) 299 virtio_pci__signal_msi(kvm, vpci, tbl); 300 else 301 kvm__irq_trigger(kvm, vpci->config_gsi); 302 } else { 303 vpci->isr = VIRTIO_PCI_ISR_CONFIG; 304 kvm__irq_trigger(kvm, vpci->pci_hdr.irq_line); 305 } 306 307 return 0; 308 } 309 310 int virtio_pci__init(struct kvm *kvm, void *dev, struct virtio_device *vdev, 311 int device_id, int subsys_id, int class) 312 { 313 struct virtio_pci *vpci = vdev->virtio; 314 u8 pin, line; 315 int r; 316 317 vpci->dev = dev; 318 vpci->msix_io_block = pci_get_io_space_block(PCI_IO_SIZE * 2); 319 320 r = ioport__register(kvm, IOPORT_EMPTY, &virtio_pci__io_ops, IOPORT_SIZE, vdev); 321 if (r < 0) 322 return r; 323 324 vpci->base_addr = (u16)r; 325 r = kvm__register_mmio(kvm, vpci->msix_io_block, PCI_IO_SIZE * 2, false, 326 virtio_pci__mmio_callback, vpci); 327 if (r < 0) 328 goto free_ioport; 329 330 vpci->pci_hdr = (struct pci_device_header) { 331 .vendor_id = cpu_to_le16(PCI_VENDOR_ID_REDHAT_QUMRANET), 332 .device_id = cpu_to_le16(device_id), 333 .header_type = PCI_HEADER_TYPE_NORMAL, 334 .revision_id = 0, 335 .class[0] = class & 0xff, 336 .class[1] = (class >> 8) & 0xff, 337 .class[2] = (class >> 16) & 0xff, 338 .subsys_vendor_id = cpu_to_le16(PCI_SUBSYSTEM_VENDOR_ID_REDHAT_QUMRANET), 339 .subsys_id = cpu_to_le16(subsys_id), 340 .bar[0] = cpu_to_le32(vpci->base_addr 341 | PCI_BASE_ADDRESS_SPACE_IO), 342 .bar[1] = cpu_to_le32(vpci->msix_io_block 343 | PCI_BASE_ADDRESS_SPACE_MEMORY), 344 .status = cpu_to_le16(PCI_STATUS_CAP_LIST), 345 .capabilities = (void *)&vpci->pci_hdr.msix - (void *)&vpci->pci_hdr, 346 .bar_size[0] = IOPORT_SIZE, 347 .bar_size[1] = PCI_IO_SIZE * 2, 348 .bar_size[3] = PCI_IO_SIZE, 349 }; 350 351 vpci->dev_hdr = (struct device_header) { 352 .bus_type = DEVICE_BUS_PCI, 353 .data = &vpci->pci_hdr, 354 }; 355 356 vpci->pci_hdr.msix.cap = PCI_CAP_ID_MSIX; 357 vpci->pci_hdr.msix.next = 0; 358 /* 359 * We at most have VIRTIO_PCI_MAX_VQ entries for virt queue, 360 * VIRTIO_PCI_MAX_CONFIG entries for config. 361 * 362 * To quote the PCI spec: 363 * 364 * System software reads this field to determine the 365 * MSI-X Table Size N, which is encoded as N-1. 366 * For example, a returned value of "00000000011" 367 * indicates a table size of 4. 368 */ 369 vpci->pci_hdr.msix.ctrl = cpu_to_le16(VIRTIO_PCI_MAX_VQ + VIRTIO_PCI_MAX_CONFIG - 1); 370 371 /* 372 * Both table and PBA could be mapped on the same BAR, but for now 373 * we're not in short of BARs 374 */ 375 vpci->pci_hdr.msix.table_offset = cpu_to_le32(1); /* Use BAR 1 */ 376 vpci->pci_hdr.msix.pba_offset = cpu_to_le32(1 | PCI_IO_SIZE); /* Use BAR 3 */ 377 vpci->config_vector = 0; 378 379 r = irq__register_device(subsys_id, &pin, &line); 380 if (r < 0) 381 goto free_mmio; 382 383 if (kvm__supports_extension(kvm, KVM_CAP_SIGNAL_MSI)) 384 vpci->features |= VIRTIO_PCI_F_SIGNAL_MSI; 385 386 vpci->pci_hdr.irq_pin = pin; 387 vpci->pci_hdr.irq_line = line; 388 r = device__register(&vpci->dev_hdr); 389 if (r < 0) 390 goto free_ioport; 391 392 return 0; 393 394 free_mmio: 395 kvm__deregister_mmio(kvm, vpci->msix_io_block); 396 free_ioport: 397 ioport__unregister(kvm, vpci->base_addr); 398 return r; 399 } 400 401 int virtio_pci__exit(struct kvm *kvm, struct virtio_device *vdev) 402 { 403 struct virtio_pci *vpci = vdev->virtio; 404 int i; 405 406 kvm__deregister_mmio(kvm, vpci->msix_io_block); 407 ioport__unregister(kvm, vpci->base_addr); 408 409 for (i = 0; i < VIRTIO_PCI_MAX_VQ; i++) 410 ioeventfd__del_event(vpci->base_addr + VIRTIO_PCI_QUEUE_NOTIFY, i); 411 412 return 0; 413 } 414