xref: /kvmtool/virtio/pci.c (revision 43c81c74c63e4245d35e56cbb7d832d5bc5a9203)
136f5dc91SSasha Levin #include "kvm/virtio-pci.h"
236f5dc91SSasha Levin 
336f5dc91SSasha Levin #include "kvm/ioport.h"
436f5dc91SSasha Levin #include "kvm/kvm.h"
536f5dc91SSasha Levin #include "kvm/virtio-pci-dev.h"
636f5dc91SSasha Levin #include "kvm/irq.h"
736f5dc91SSasha Levin #include "kvm/virtio.h"
81599d724SSasha Levin #include "kvm/ioeventfd.h"
936f5dc91SSasha Levin 
10*43c81c74SSasha Levin #include <sys/ioctl.h>
1136f5dc91SSasha Levin #include <linux/virtio_pci.h>
12aa73be70SMatt Evans #include <linux/byteorder.h>
1336f5dc91SSasha Levin #include <string.h>
1436f5dc91SSasha Levin 
151599d724SSasha Levin static void virtio_pci__ioevent_callback(struct kvm *kvm, void *param)
161599d724SSasha Levin {
171599d724SSasha Levin 	struct virtio_pci_ioevent_param *ioeventfd = param;
1802eca50cSAsias He 	struct virtio_pci *vpci = ioeventfd->vdev->virtio;
191599d724SSasha Levin 
2002eca50cSAsias He 	ioeventfd->vdev->ops->notify_vq(kvm, vpci->dev, ioeventfd->vq);
211599d724SSasha Levin }
221599d724SSasha Levin 
2302eca50cSAsias He static int virtio_pci__init_ioeventfd(struct kvm *kvm, struct virtio_device *vdev, u32 vq)
241599d724SSasha Levin {
251599d724SSasha Levin 	struct ioevent ioevent;
2602eca50cSAsias He 	struct virtio_pci *vpci = vdev->virtio;
27ea6eeb1cSSasha Levin 	int r;
281599d724SSasha Levin 
291599d724SSasha Levin 	vpci->ioeventfds[vq] = (struct virtio_pci_ioevent_param) {
3002eca50cSAsias He 		.vdev		= vdev,
311599d724SSasha Levin 		.vq		= vq,
321599d724SSasha Levin 	};
331599d724SSasha Levin 
341599d724SSasha Levin 	ioevent = (struct ioevent) {
351599d724SSasha Levin 		.io_addr	= vpci->base_addr + VIRTIO_PCI_QUEUE_NOTIFY,
361599d724SSasha Levin 		.io_len		= sizeof(u16),
371599d724SSasha Levin 		.fn		= virtio_pci__ioevent_callback,
381599d724SSasha Levin 		.fn_ptr		= &vpci->ioeventfds[vq],
391599d724SSasha Levin 		.datamatch	= vq,
401599d724SSasha Levin 		.fn_kvm		= kvm,
411599d724SSasha Levin 		.fd		= eventfd(0, 0),
421599d724SSasha Levin 	};
431599d724SSasha Levin 
44627d6874SAsias He 	if (vdev->use_vhost)
45627d6874SAsias He 		/*
46627d6874SAsias He 		 * Vhost will poll the eventfd in host kernel side,
47627d6874SAsias He 		 * no need to poll in userspace.
48627d6874SAsias He 		 */
49627d6874SAsias He 		r = ioeventfd__add_event(&ioevent, true, false);
50627d6874SAsias He 	else
51627d6874SAsias He 		/* Need to poll in userspace. */
52627d6874SAsias He 		r = ioeventfd__add_event(&ioevent, true, true);
53ea6eeb1cSSasha Levin 	if (r)
54ea6eeb1cSSasha Levin 		return r;
551599d724SSasha Levin 
5602eca50cSAsias He 	if (vdev->ops->notify_vq_eventfd)
5702eca50cSAsias He 		vdev->ops->notify_vq_eventfd(kvm, vpci->dev, vq, ioevent.fd);
58263b80e8SSasha Levin 
591599d724SSasha Levin 	return 0;
601599d724SSasha Levin }
611599d724SSasha Levin 
6206f48103SSasha Levin static inline bool virtio_pci__msix_enabled(struct virtio_pci *vpci)
6306f48103SSasha Levin {
64aa73be70SMatt Evans 	return vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_ENABLE);
6506f48103SSasha Levin }
6606f48103SSasha Levin 
6702eca50cSAsias He static bool virtio_pci__specific_io_in(struct kvm *kvm, struct virtio_device *vdev, u16 port,
6836f5dc91SSasha Levin 					void *data, int size, int offset)
6936f5dc91SSasha Levin {
7036f5dc91SSasha Levin 	u32 config_offset;
7102eca50cSAsias He 	struct virtio_pci *vpci = vdev->virtio;
7206f48103SSasha Levin 	int type = virtio__get_dev_specific_field(offset - 20,
7306f48103SSasha Levin 							virtio_pci__msix_enabled(vpci),
741382aba0SSasha Levin 							&config_offset);
7536f5dc91SSasha Levin 	if (type == VIRTIO_PCI_O_MSIX) {
7636f5dc91SSasha Levin 		switch (offset) {
7736f5dc91SSasha Levin 		case VIRTIO_MSI_CONFIG_VECTOR:
7836f5dc91SSasha Levin 			ioport__write16(data, vpci->config_vector);
7936f5dc91SSasha Levin 			break;
8036f5dc91SSasha Levin 		case VIRTIO_MSI_QUEUE_VECTOR:
8136f5dc91SSasha Levin 			ioport__write16(data, vpci->vq_vector[vpci->queue_selector]);
8236f5dc91SSasha Levin 			break;
8336f5dc91SSasha Levin 		};
8436f5dc91SSasha Levin 
8536f5dc91SSasha Levin 		return true;
8636f5dc91SSasha Levin 	} else if (type == VIRTIO_PCI_O_CONFIG) {
8736f5dc91SSasha Levin 		u8 cfg;
8836f5dc91SSasha Levin 
8902eca50cSAsias He 		cfg = vdev->ops->get_config(kvm, vpci->dev, config_offset);
9036f5dc91SSasha Levin 		ioport__write8(data, cfg);
9136f5dc91SSasha Levin 		return true;
9236f5dc91SSasha Levin 	}
9336f5dc91SSasha Levin 
9436f5dc91SSasha Levin 	return false;
9536f5dc91SSasha Levin }
9636f5dc91SSasha Levin 
9736f5dc91SSasha Levin static bool virtio_pci__io_in(struct ioport *ioport, struct kvm *kvm, u16 port, void *data, int size)
9836f5dc91SSasha Levin {
9936f5dc91SSasha Levin 	unsigned long offset;
10036f5dc91SSasha Levin 	bool ret = true;
10102eca50cSAsias He 	struct virtio_device *vdev;
10236f5dc91SSasha Levin 	struct virtio_pci *vpci;
10336f5dc91SSasha Levin 	u32 val;
10436f5dc91SSasha Levin 
10502eca50cSAsias He 	vdev = ioport->priv;
10602eca50cSAsias He 	vpci = vdev->virtio;
10736f5dc91SSasha Levin 	offset = port - vpci->base_addr;
10836f5dc91SSasha Levin 
10936f5dc91SSasha Levin 	switch (offset) {
11036f5dc91SSasha Levin 	case VIRTIO_PCI_HOST_FEATURES:
11102eca50cSAsias He 		val = vdev->ops->get_host_features(kvm, vpci->dev);
11236f5dc91SSasha Levin 		ioport__write32(data, val);
11336f5dc91SSasha Levin 		break;
11436f5dc91SSasha Levin 	case VIRTIO_PCI_QUEUE_PFN:
11502eca50cSAsias He 		val = vdev->ops->get_pfn_vq(kvm, vpci->dev, vpci->queue_selector);
11636f5dc91SSasha Levin 		ioport__write32(data, val);
11736f5dc91SSasha Levin 		break;
11836f5dc91SSasha Levin 	case VIRTIO_PCI_QUEUE_NUM:
11902eca50cSAsias He 		val = vdev->ops->get_size_vq(kvm, vpci->dev, vpci->queue_selector);
120657ee18bSMatt Evans 		ioport__write16(data, val);
12136f5dc91SSasha Levin 		break;
12236f5dc91SSasha Levin 	case VIRTIO_PCI_STATUS:
12336f5dc91SSasha Levin 		ioport__write8(data, vpci->status);
12436f5dc91SSasha Levin 		break;
12536f5dc91SSasha Levin 	case VIRTIO_PCI_ISR:
12636f5dc91SSasha Levin 		ioport__write8(data, vpci->isr);
12736f5dc91SSasha Levin 		kvm__irq_line(kvm, vpci->pci_hdr.irq_line, VIRTIO_IRQ_LOW);
12836f5dc91SSasha Levin 		vpci->isr = VIRTIO_IRQ_LOW;
12936f5dc91SSasha Levin 		break;
13036f5dc91SSasha Levin 	default:
13102eca50cSAsias He 		ret = virtio_pci__specific_io_in(kvm, vdev, port, data, size, offset);
13236f5dc91SSasha Levin 		break;
13336f5dc91SSasha Levin 	};
13436f5dc91SSasha Levin 
13536f5dc91SSasha Levin 	return ret;
13636f5dc91SSasha Levin }
13736f5dc91SSasha Levin 
13802eca50cSAsias He static bool virtio_pci__specific_io_out(struct kvm *kvm, struct virtio_device *vdev, u16 port,
13936f5dc91SSasha Levin 					void *data, int size, int offset)
14036f5dc91SSasha Levin {
14102eca50cSAsias He 	struct virtio_pci *vpci = vdev->virtio;
14236f5dc91SSasha Levin 	u32 config_offset, gsi, vec;
14306f48103SSasha Levin 	int type = virtio__get_dev_specific_field(offset - 20, virtio_pci__msix_enabled(vpci),
1441382aba0SSasha Levin 							&config_offset);
14536f5dc91SSasha Levin 	if (type == VIRTIO_PCI_O_MSIX) {
14636f5dc91SSasha Levin 		switch (offset) {
14736f5dc91SSasha Levin 		case VIRTIO_MSI_CONFIG_VECTOR:
14836f5dc91SSasha Levin 			vec = vpci->config_vector = ioport__read16(data);
14936f5dc91SSasha Levin 
1501de74957SSasha Levin 			gsi = irq__add_msix_route(kvm, &vpci->msix_table[vec].msg);
15136f5dc91SSasha Levin 
15236f5dc91SSasha Levin 			vpci->config_gsi = gsi;
15336f5dc91SSasha Levin 			break;
1543a60be06SSasha Levin 		case VIRTIO_MSI_QUEUE_VECTOR:
15536f5dc91SSasha Levin 			vec = vpci->vq_vector[vpci->queue_selector] = ioport__read16(data);
15636f5dc91SSasha Levin 
1571de74957SSasha Levin 			gsi = irq__add_msix_route(kvm, &vpci->msix_table[vec].msg);
15836f5dc91SSasha Levin 			vpci->gsis[vpci->queue_selector] = gsi;
15902eca50cSAsias He 			if (vdev->ops->notify_vq_gsi)
16002eca50cSAsias He 				vdev->ops->notify_vq_gsi(kvm, vpci->dev,
161263b80e8SSasha Levin 							vpci->queue_selector, gsi);
16236f5dc91SSasha Levin 			break;
16336f5dc91SSasha Levin 		};
16436f5dc91SSasha Levin 
16536f5dc91SSasha Levin 		return true;
16636f5dc91SSasha Levin 	} else if (type == VIRTIO_PCI_O_CONFIG) {
16702eca50cSAsias He 		vdev->ops->set_config(kvm, vpci->dev, *(u8 *)data, config_offset);
16836f5dc91SSasha Levin 
16936f5dc91SSasha Levin 		return true;
17036f5dc91SSasha Levin 	}
17136f5dc91SSasha Levin 
17236f5dc91SSasha Levin 	return false;
17336f5dc91SSasha Levin }
17436f5dc91SSasha Levin 
17536f5dc91SSasha Levin static bool virtio_pci__io_out(struct ioport *ioport, struct kvm *kvm, u16 port, void *data, int size)
17636f5dc91SSasha Levin {
17736f5dc91SSasha Levin 	unsigned long offset;
17836f5dc91SSasha Levin 	bool ret = true;
17902eca50cSAsias He 	struct virtio_device *vdev;
18036f5dc91SSasha Levin 	struct virtio_pci *vpci;
18136f5dc91SSasha Levin 	u32 val;
18236f5dc91SSasha Levin 
18302eca50cSAsias He 	vdev = ioport->priv;
18402eca50cSAsias He 	vpci = vdev->virtio;
18536f5dc91SSasha Levin 	offset = port - vpci->base_addr;
18636f5dc91SSasha Levin 
18736f5dc91SSasha Levin 	switch (offset) {
18836f5dc91SSasha Levin 	case VIRTIO_PCI_GUEST_FEATURES:
18936f5dc91SSasha Levin 		val = ioport__read32(data);
19002eca50cSAsias He 		vdev->ops->set_guest_features(kvm, vpci->dev, val);
19136f5dc91SSasha Levin 		break;
19236f5dc91SSasha Levin 	case VIRTIO_PCI_QUEUE_PFN:
19336f5dc91SSasha Levin 		val = ioport__read32(data);
19402eca50cSAsias He 		virtio_pci__init_ioeventfd(kvm, vdev, vpci->queue_selector);
19502eca50cSAsias He 		vdev->ops->init_vq(kvm, vpci->dev, vpci->queue_selector, val);
19636f5dc91SSasha Levin 		break;
19736f5dc91SSasha Levin 	case VIRTIO_PCI_QUEUE_SEL:
19836f5dc91SSasha Levin 		vpci->queue_selector = ioport__read16(data);
19936f5dc91SSasha Levin 		break;
20036f5dc91SSasha Levin 	case VIRTIO_PCI_QUEUE_NOTIFY:
20136f5dc91SSasha Levin 		val = ioport__read16(data);
20202eca50cSAsias He 		vdev->ops->notify_vq(kvm, vpci->dev, val);
20336f5dc91SSasha Levin 		break;
20436f5dc91SSasha Levin 	case VIRTIO_PCI_STATUS:
20536f5dc91SSasha Levin 		vpci->status = ioport__read8(data);
20636f5dc91SSasha Levin 		break;
20736f5dc91SSasha Levin 	default:
20802eca50cSAsias He 		ret = virtio_pci__specific_io_out(kvm, vdev, port, data, size, offset);
20936f5dc91SSasha Levin 		break;
21036f5dc91SSasha Levin 	};
21136f5dc91SSasha Levin 
21236f5dc91SSasha Levin 	return ret;
21336f5dc91SSasha Levin }
21436f5dc91SSasha Levin 
21536f5dc91SSasha Levin static struct ioport_operations virtio_pci__io_ops = {
21636f5dc91SSasha Levin 	.io_in	= virtio_pci__io_in,
21736f5dc91SSasha Levin 	.io_out	= virtio_pci__io_out,
21836f5dc91SSasha Levin };
21936f5dc91SSasha Levin 
2209594e883SAsias He static void virtio_pci__mmio_callback(u64 addr, u8 *data, u32 len, u8 is_write, void *ptr)
22136f5dc91SSasha Levin {
22236f5dc91SSasha Levin 	struct virtio_pci *vpci = ptr;
2239c26dab4SSasha Levin 	void *table;
2249c26dab4SSasha Levin 	u32 offset;
22536f5dc91SSasha Levin 
2269c26dab4SSasha Levin 	if (addr > vpci->msix_io_block + PCI_IO_SIZE) {
2279c26dab4SSasha Levin 		table	= &vpci->msix_pba;
2289c26dab4SSasha Levin 		offset	= vpci->msix_io_block + PCI_IO_SIZE;
2299c26dab4SSasha Levin 	} else {
2309c26dab4SSasha Levin 		table	= &vpci->msix_table;
2319c26dab4SSasha Levin 		offset	= vpci->msix_io_block;
23236f5dc91SSasha Levin 	}
23336f5dc91SSasha Levin 
23406f48103SSasha Levin 	if (is_write)
2359c26dab4SSasha Levin 		memcpy(table + addr - offset, data, len);
23606f48103SSasha Levin 	else
2379c26dab4SSasha Levin 		memcpy(data, table + addr - offset, len);
23806f48103SSasha Levin }
23906f48103SSasha Levin 
240*43c81c74SSasha Levin static void virtio_pci__signal_msi(struct kvm *kvm, struct virtio_pci *vpci, int vec)
241*43c81c74SSasha Levin {
242*43c81c74SSasha Levin 	struct kvm_msi msi = {
243*43c81c74SSasha Levin 		.address_lo = vpci->msix_table[vec].msg.address_lo,
244*43c81c74SSasha Levin 		.address_hi = vpci->msix_table[vec].msg.address_hi,
245*43c81c74SSasha Levin 		.data = vpci->msix_table[vec].msg.data,
246*43c81c74SSasha Levin 	};
247*43c81c74SSasha Levin 
248*43c81c74SSasha Levin 	ioctl(kvm->vm_fd, KVM_SIGNAL_MSI, &msi);
249*43c81c74SSasha Levin }
250*43c81c74SSasha Levin 
25102eca50cSAsias He int virtio_pci__signal_vq(struct kvm *kvm, struct virtio_device *vdev, u32 vq)
25236f5dc91SSasha Levin {
25302eca50cSAsias He 	struct virtio_pci *vpci = vdev->virtio;
25406f48103SSasha Levin 	int tbl = vpci->vq_vector[vq];
25536f5dc91SSasha Levin 
25606f48103SSasha Levin 	if (virtio_pci__msix_enabled(vpci)) {
257aa73be70SMatt Evans 		if (vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_MASKALL) ||
258aa73be70SMatt Evans 		    vpci->msix_table[tbl].ctrl & cpu_to_le16(PCI_MSIX_ENTRY_CTRL_MASKBIT)) {
25906f48103SSasha Levin 
26006f48103SSasha Levin 			vpci->msix_pba |= 1 << tbl;
26106f48103SSasha Levin 			return 0;
26206f48103SSasha Levin 		}
26306f48103SSasha Levin 
264*43c81c74SSasha Levin 		if (vpci->features & VIRTIO_PCI_F_SIGNAL_MSI)
265*43c81c74SSasha Levin 			virtio_pci__signal_msi(kvm, vpci, vpci->vq_vector[vq]);
266*43c81c74SSasha Levin 		else
26706f48103SSasha Levin 			kvm__irq_trigger(kvm, vpci->gsis[vq]);
26806f48103SSasha Levin 	} else {
269a36eca7bSSasha Levin 		vpci->isr = VIRTIO_IRQ_HIGH;
27006f48103SSasha Levin 		kvm__irq_trigger(kvm, vpci->pci_hdr.irq_line);
27106f48103SSasha Levin 	}
27236f5dc91SSasha Levin 	return 0;
27336f5dc91SSasha Levin }
27436f5dc91SSasha Levin 
27502eca50cSAsias He int virtio_pci__signal_config(struct kvm *kvm, struct virtio_device *vdev)
27636f5dc91SSasha Levin {
27702eca50cSAsias He 	struct virtio_pci *vpci = vdev->virtio;
27806f48103SSasha Levin 	int tbl = vpci->config_vector;
27906f48103SSasha Levin 
28006f48103SSasha Levin 	if (virtio_pci__msix_enabled(vpci)) {
281aa73be70SMatt Evans 		if (vpci->pci_hdr.msix.ctrl & cpu_to_le16(PCI_MSIX_FLAGS_MASKALL) ||
282aa73be70SMatt Evans 		    vpci->msix_table[tbl].ctrl & cpu_to_le16(PCI_MSIX_ENTRY_CTRL_MASKBIT)) {
28306f48103SSasha Levin 
28406f48103SSasha Levin 			vpci->msix_pba |= 1 << tbl;
28506f48103SSasha Levin 			return 0;
28606f48103SSasha Levin 		}
28706f48103SSasha Levin 
288*43c81c74SSasha Levin 		if (vpci->features & VIRTIO_PCI_F_SIGNAL_MSI)
289*43c81c74SSasha Levin 			virtio_pci__signal_msi(kvm, vpci, vpci->vq_vector[vpci->config_vector]);
290*43c81c74SSasha Levin 		else
29106f48103SSasha Levin 			kvm__irq_trigger(kvm, vpci->config_gsi);
29206f48103SSasha Levin 	} else {
29306f48103SSasha Levin 		vpci->isr = VIRTIO_PCI_ISR_CONFIG;
29406f48103SSasha Levin 		kvm__irq_trigger(kvm, vpci->pci_hdr.irq_line);
29506f48103SSasha Levin 	}
29636f5dc91SSasha Levin 
29736f5dc91SSasha Levin 	return 0;
29836f5dc91SSasha Levin }
29936f5dc91SSasha Levin 
30002eca50cSAsias He int virtio_pci__init(struct kvm *kvm, void *dev, struct virtio_device *vdev,
301507e02d8SAsias He 		     int device_id, int subsys_id, int class)
30236f5dc91SSasha Levin {
30302eca50cSAsias He 	struct virtio_pci *vpci = vdev->virtio;
30436f5dc91SSasha Levin 	u8 pin, line, ndev;
3057af40b91SSasha Levin 	int r;
30636f5dc91SSasha Levin 
30736f5dc91SSasha Levin 	vpci->dev = dev;
3089c26dab4SSasha Levin 	vpci->msix_io_block = pci_get_io_space_block(PCI_IO_SIZE * 2);
30936f5dc91SSasha Levin 
31002eca50cSAsias He 	r = ioport__register(IOPORT_EMPTY, &virtio_pci__io_ops, IOPORT_SIZE, vdev);
3117af40b91SSasha Levin 	if (r < 0)
3127af40b91SSasha Levin 		return r;
3137af40b91SSasha Levin 
3147af40b91SSasha Levin 	vpci->base_addr = (u16)r;
31502eca50cSAsias He 	r = kvm__register_mmio(kvm, vpci->msix_io_block, PCI_IO_SIZE, false,
3169594e883SAsias He 			       virtio_pci__mmio_callback, vpci);
317495fbd4eSSasha Levin 	if (r < 0)
318495fbd4eSSasha Levin 		goto free_ioport;
31936f5dc91SSasha Levin 
32036f5dc91SSasha Levin 	vpci->pci_hdr = (struct pci_device_header) {
321aa73be70SMatt Evans 		.vendor_id		= cpu_to_le16(PCI_VENDOR_ID_REDHAT_QUMRANET),
322aa73be70SMatt Evans 		.device_id		= cpu_to_le16(device_id),
32336f5dc91SSasha Levin 		.header_type		= PCI_HEADER_TYPE_NORMAL,
32436f5dc91SSasha Levin 		.revision_id		= 0,
325aa73be70SMatt Evans 		.class[0]		= class & 0xff,
326aa73be70SMatt Evans 		.class[1]		= (class >> 8) & 0xff,
327aa73be70SMatt Evans 		.class[2]		= (class >> 16) & 0xff,
328aa73be70SMatt Evans 		.subsys_vendor_id	= cpu_to_le16(PCI_SUBSYSTEM_VENDOR_ID_REDHAT_QUMRANET),
329aa73be70SMatt Evans 		.subsys_id		= cpu_to_le16(subsys_id),
3309c26dab4SSasha Levin 		.bar[0]			= cpu_to_le32(vpci->base_addr
3319c26dab4SSasha Levin 							| PCI_BASE_ADDRESS_SPACE_IO),
332b4dab816SSasha Levin 		.bar[1]			= cpu_to_le32(vpci->msix_io_block
333b4dab816SSasha Levin 							| PCI_BASE_ADDRESS_SPACE_MEMORY),
334aa73be70SMatt Evans 		.status			= cpu_to_le16(PCI_STATUS_CAP_LIST),
33536f5dc91SSasha Levin 		.capabilities		= (void *)&vpci->pci_hdr.msix - (void *)&vpci->pci_hdr,
3366b868987SMatt Evans 		.bar_size[0]		= IOPORT_SIZE,
3376b868987SMatt Evans 		.bar_size[1]		= PCI_IO_SIZE,
3386b868987SMatt Evans 		.bar_size[3]		= PCI_IO_SIZE,
33936f5dc91SSasha Levin 	};
34036f5dc91SSasha Levin 
34136f5dc91SSasha Levin 	vpci->pci_hdr.msix.cap = PCI_CAP_ID_MSIX;
34236f5dc91SSasha Levin 	vpci->pci_hdr.msix.next = 0;
34314bba8a0SAsias He 	/*
34414bba8a0SAsias He 	 * We at most have VIRTIO_PCI_MAX_VQ entries for virt queue,
34514bba8a0SAsias He 	 * VIRTIO_PCI_MAX_CONFIG entries for config.
34614bba8a0SAsias He 	 *
34714bba8a0SAsias He 	 * To quote the PCI spec:
34814bba8a0SAsias He 	 *
34914bba8a0SAsias He 	 * System software reads this field to determine the
35014bba8a0SAsias He 	 * MSI-X Table Size N, which is encoded as N-1.
35114bba8a0SAsias He 	 * For example, a returned value of "00000000011"
35214bba8a0SAsias He 	 * indicates a table size of 4.
35314bba8a0SAsias He 	 */
354aa73be70SMatt Evans 	vpci->pci_hdr.msix.ctrl = cpu_to_le16(VIRTIO_PCI_MAX_VQ + VIRTIO_PCI_MAX_CONFIG - 1);
35506f48103SSasha Levin 
35606f48103SSasha Levin 	/*
35706f48103SSasha Levin 	 * Both table and PBA could be mapped on the same BAR, but for now
35806f48103SSasha Levin 	 * we're not in short of BARs
35906f48103SSasha Levin 	 */
360aa73be70SMatt Evans 	vpci->pci_hdr.msix.table_offset = cpu_to_le32(1); /* Use BAR 1 */
3619c26dab4SSasha Levin 	vpci->pci_hdr.msix.pba_offset = cpu_to_le32(1 | PCI_IO_SIZE); /* Use BAR 3 */
36236f5dc91SSasha Levin 	vpci->config_vector = 0;
36336f5dc91SSasha Levin 
364495fbd4eSSasha Levin 	r = irq__register_device(subsys_id, &ndev, &pin, &line);
365495fbd4eSSasha Levin 	if (r < 0)
366495fbd4eSSasha Levin 		goto free_mmio;
36736f5dc91SSasha Levin 
368*43c81c74SSasha Levin 	if (kvm__supports_extension(kvm, KVM_CAP_SIGNAL_MSI))
369*43c81c74SSasha Levin 		vpci->features |= VIRTIO_PCI_F_SIGNAL_MSI;
370*43c81c74SSasha Levin 
37136f5dc91SSasha Levin 	vpci->pci_hdr.irq_pin	= pin;
37236f5dc91SSasha Levin 	vpci->pci_hdr.irq_line	= line;
373495fbd4eSSasha Levin 	r = pci__register(&vpci->pci_hdr, ndev);
374495fbd4eSSasha Levin 	if (r < 0)
375495fbd4eSSasha Levin 		goto free_ioport;
376495fbd4eSSasha Levin 
377495fbd4eSSasha Levin 	return 0;
378495fbd4eSSasha Levin 
379495fbd4eSSasha Levin free_mmio:
380495fbd4eSSasha Levin 	kvm__deregister_mmio(kvm, vpci->msix_io_block);
381495fbd4eSSasha Levin free_ioport:
382495fbd4eSSasha Levin 	ioport__unregister(vpci->base_addr);
383495fbd4eSSasha Levin 	return r;
384495fbd4eSSasha Levin }
385495fbd4eSSasha Levin 
38602eca50cSAsias He int virtio_pci__exit(struct kvm *kvm, struct virtio_device *vdev)
387495fbd4eSSasha Levin {
38802eca50cSAsias He 	struct virtio_pci *vpci = vdev->virtio;
389495fbd4eSSasha Levin 	int i;
390495fbd4eSSasha Levin 
391495fbd4eSSasha Levin 	kvm__deregister_mmio(kvm, vpci->msix_io_block);
392495fbd4eSSasha Levin 	ioport__unregister(vpci->base_addr);
393495fbd4eSSasha Levin 
394495fbd4eSSasha Levin 	for (i = 0; i < VIRTIO_PCI_MAX_VQ; i++)
395495fbd4eSSasha Levin 		ioeventfd__del_event(vpci->base_addr + VIRTIO_PCI_QUEUE_NOTIFY, i);
39636f5dc91SSasha Levin 
39736f5dc91SSasha Levin 	return 0;
39836f5dc91SSasha Levin }
399