1b30d05adSPekka Enberg #include "kvm/blk-virtio.h" 2b30d05adSPekka Enberg 3*c435b91dSPekka Enberg #include "kvm/virtio_blk.h" 4984b7ae0SPekka Enberg #include "kvm/virtio_pci.h" 5b30d05adSPekka Enberg #include "kvm/ioport.h" 68b1ff07eSPekka Enberg #include "kvm/kvm.h" 7b30d05adSPekka Enberg #include "kvm/pci.h" 8b30d05adSPekka Enberg 98b1ff07eSPekka Enberg #define VIRTIO_BLK_IRQ 14 10984b7ae0SPekka Enberg 11fbc2fbf9SPekka Enberg struct device { 12*c435b91dSPekka Enberg uint32_t host_features; 13fbc2fbf9SPekka Enberg uint32_t guest_features; 14fbc2fbf9SPekka Enberg uint8_t status; 15fbc2fbf9SPekka Enberg }; 16fbc2fbf9SPekka Enberg 17*c435b91dSPekka Enberg static struct device device = { 18*c435b91dSPekka Enberg .host_features = (1UL << VIRTIO_BLK_F_SEG_MAX) 19*c435b91dSPekka Enberg | (1UL << VIRTIO_BLK_F_GEOMETRY) 20*c435b91dSPekka Enberg | (1UL << VIRTIO_BLK_F_TOPOLOGY) 21*c435b91dSPekka Enberg | (1UL << VIRTIO_BLK_F_BLK_SIZE), 22*c435b91dSPekka Enberg }; 23fbc2fbf9SPekka Enberg 24*c435b91dSPekka Enberg #include <stdio.h> 25fbc2fbf9SPekka Enberg static bool blk_virtio_in(struct kvm *self, uint16_t port, void *data, int size, uint32_t count) 26fbc2fbf9SPekka Enberg { 27fbc2fbf9SPekka Enberg unsigned long offset; 28fbc2fbf9SPekka Enberg 29fbc2fbf9SPekka Enberg offset = port - IOPORT_VIRTIO; 30fbc2fbf9SPekka Enberg 318b1ff07eSPekka Enberg /* XXX: Let virtio block device handle this */ 328b1ff07eSPekka Enberg if (offset >= VIRTIO_PCI_CONFIG_NOMSI) 338b1ff07eSPekka Enberg return true; 348b1ff07eSPekka Enberg 35fbc2fbf9SPekka Enberg switch (offset) { 36fbc2fbf9SPekka Enberg case VIRTIO_PCI_HOST_FEATURES: 37*c435b91dSPekka Enberg ioport__write32(data, device.host_features); 38fbc2fbf9SPekka Enberg break; 39fbc2fbf9SPekka Enberg case VIRTIO_PCI_GUEST_FEATURES: 408b1ff07eSPekka Enberg return false; 41fbc2fbf9SPekka Enberg case VIRTIO_PCI_QUEUE_PFN: 428b1ff07eSPekka Enberg ioport__write32(data, 0x00); 438b1ff07eSPekka Enberg break; 44fbc2fbf9SPekka Enberg case VIRTIO_PCI_QUEUE_NUM: 458b1ff07eSPekka Enberg ioport__write16(data, 0x10); 468b1ff07eSPekka Enberg break; 47fbc2fbf9SPekka Enberg case VIRTIO_PCI_QUEUE_SEL: 48fbc2fbf9SPekka Enberg case VIRTIO_PCI_QUEUE_NOTIFY: 49fbc2fbf9SPekka Enberg return false; 50fbc2fbf9SPekka Enberg case VIRTIO_PCI_STATUS: 51fbc2fbf9SPekka Enberg ioport__write8(data, device.status); 52fbc2fbf9SPekka Enberg break; 53fbc2fbf9SPekka Enberg case VIRTIO_PCI_ISR: 548b1ff07eSPekka Enberg ioport__write8(data, 0x1); 558b1ff07eSPekka Enberg kvm__irq_line(self, VIRTIO_BLK_IRQ, 0); 568b1ff07eSPekka Enberg return true; 57fbc2fbf9SPekka Enberg case VIRTIO_MSI_CONFIG_VECTOR: 58fbc2fbf9SPekka Enberg default: 59fbc2fbf9SPekka Enberg return false; 60fbc2fbf9SPekka Enberg }; 61fbc2fbf9SPekka Enberg 62fbc2fbf9SPekka Enberg return true; 63fbc2fbf9SPekka Enberg } 64fbc2fbf9SPekka Enberg 65fbc2fbf9SPekka Enberg static bool blk_virtio_out(struct kvm *self, uint16_t port, void *data, int size, uint32_t count) 66fbc2fbf9SPekka Enberg { 67fbc2fbf9SPekka Enberg unsigned long offset; 68fbc2fbf9SPekka Enberg 69fbc2fbf9SPekka Enberg offset = port - IOPORT_VIRTIO; 70fbc2fbf9SPekka Enberg 718b1ff07eSPekka Enberg /* XXX: Let virtio block device handle this */ 728b1ff07eSPekka Enberg if (offset >= VIRTIO_PCI_CONFIG_NOMSI) 738b1ff07eSPekka Enberg return true; 748b1ff07eSPekka Enberg 75fbc2fbf9SPekka Enberg switch (offset) { 76fbc2fbf9SPekka Enberg case VIRTIO_PCI_GUEST_FEATURES: 77fbc2fbf9SPekka Enberg device.guest_features = ioport__read32(data); 78fbc2fbf9SPekka Enberg break; 79fbc2fbf9SPekka Enberg case VIRTIO_PCI_QUEUE_PFN: 808b1ff07eSPekka Enberg return true; 81fbc2fbf9SPekka Enberg case VIRTIO_PCI_QUEUE_SEL: 828b1ff07eSPekka Enberg return true; 838b1ff07eSPekka Enberg case VIRTIO_PCI_QUEUE_NOTIFY: { 848b1ff07eSPekka Enberg kvm__irq_line(self, VIRTIO_BLK_IRQ, 1); 858b1ff07eSPekka Enberg return true; 868b1ff07eSPekka Enberg } 87fbc2fbf9SPekka Enberg case VIRTIO_PCI_STATUS: 88fbc2fbf9SPekka Enberg device.status = ioport__read8(data); 89fbc2fbf9SPekka Enberg break; 90fbc2fbf9SPekka Enberg case VIRTIO_MSI_CONFIG_VECTOR: 91fbc2fbf9SPekka Enberg case VIRTIO_MSI_QUEUE_VECTOR: 92fbc2fbf9SPekka Enberg default: 93fbc2fbf9SPekka Enberg return false; 94fbc2fbf9SPekka Enberg }; 95fbc2fbf9SPekka Enberg 96fbc2fbf9SPekka Enberg return true; 97fbc2fbf9SPekka Enberg } 98fbc2fbf9SPekka Enberg 99fbc2fbf9SPekka Enberg static struct ioport_operations blk_virtio_io_ops = { 100fbc2fbf9SPekka Enberg .io_in = blk_virtio_in, 101fbc2fbf9SPekka Enberg .io_out = blk_virtio_out, 102fbc2fbf9SPekka Enberg }; 103fbc2fbf9SPekka Enberg 104b30d05adSPekka Enberg #define PCI_VENDOR_ID_REDHAT_QUMRANET 0x1af4 105b30d05adSPekka Enberg #define PCI_DEVICE_ID_VIRTIO_BLK 0x1001 106b30d05adSPekka Enberg #define PCI_SUBSYSTEM_VENDOR_ID_REDHAT_QUMRANET 0x1af4 107b30d05adSPekka Enberg #define PCI_SUBSYSTEM_ID_VIRTIO_BLK 0x0002 108b30d05adSPekka Enberg 109fbc2fbf9SPekka Enberg static struct pci_device_header blk_virtio_pci_device = { 110b30d05adSPekka Enberg .vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET, 111b30d05adSPekka Enberg .device_id = PCI_DEVICE_ID_VIRTIO_BLK, 112b30d05adSPekka Enberg .header_type = PCI_HEADER_TYPE_NORMAL, 113b30d05adSPekka Enberg .revision_id = 0, 114b30d05adSPekka Enberg .class = 0x010000, 115b30d05adSPekka Enberg .subsys_vendor_id = PCI_SUBSYSTEM_VENDOR_ID_REDHAT_QUMRANET, 116b30d05adSPekka Enberg .subsys_id = PCI_SUBSYSTEM_ID_VIRTIO_BLK, 117b30d05adSPekka Enberg .bar[0] = IOPORT_VIRTIO | PCI_BASE_ADDRESS_SPACE_IO, 118406f1a89SPekka Enberg .irq_pin = 0, 1198b1ff07eSPekka Enberg .irq_line = VIRTIO_BLK_IRQ, 120b30d05adSPekka Enberg }; 121b30d05adSPekka Enberg 122b30d05adSPekka Enberg void blk_virtio__init(void) 123b30d05adSPekka Enberg { 124fbc2fbf9SPekka Enberg pci__register(&blk_virtio_pci_device, 1); 125b30d05adSPekka Enberg 1268b1ff07eSPekka Enberg ioport__register(IOPORT_VIRTIO, &blk_virtio_io_ops, 256); 127b30d05adSPekka Enberg } 128