1b30d05adSPekka Enberg #include "kvm/blk-virtio.h" 2b30d05adSPekka Enberg 3c435b91dSPekka Enberg #include "kvm/virtio_blk.h" 4984b7ae0SPekka Enberg #include "kvm/virtio_pci.h" 5b30d05adSPekka Enberg #include "kvm/ioport.h" 68b1ff07eSPekka Enberg #include "kvm/kvm.h" 7b30d05adSPekka Enberg #include "kvm/pci.h" 8b30d05adSPekka Enberg 98b1ff07eSPekka Enberg #define VIRTIO_BLK_IRQ 14 10984b7ae0SPekka Enberg 11fbc2fbf9SPekka Enberg struct device { 12*40ce993fSPekka Enberg struct virtio_blk_config blk_config; 13c435b91dSPekka Enberg uint32_t host_features; 14fbc2fbf9SPekka Enberg uint32_t guest_features; 15*40ce993fSPekka Enberg uint16_t config_vector; 16fbc2fbf9SPekka Enberg uint8_t status; 17fbc2fbf9SPekka Enberg }; 18fbc2fbf9SPekka Enberg 19*40ce993fSPekka Enberg #define DISK_CYLINDERS 1024 20*40ce993fSPekka Enberg #define DISK_HEADS 64 21*40ce993fSPekka Enberg #define DISK_SECTORS 32 22*40ce993fSPekka Enberg 23c435b91dSPekka Enberg static struct device device = { 24*40ce993fSPekka Enberg .blk_config = (struct virtio_blk_config) { 25*40ce993fSPekka Enberg .capacity = DISK_CYLINDERS * DISK_HEADS * DISK_SECTORS, 26*40ce993fSPekka Enberg /* VIRTIO_BLK_F_GEOMETRY */ 27*40ce993fSPekka Enberg .geometry = { 28*40ce993fSPekka Enberg .cylinders = DISK_CYLINDERS, 29*40ce993fSPekka Enberg .heads = DISK_HEADS, 30*40ce993fSPekka Enberg .sectors = DISK_SECTORS, 31*40ce993fSPekka Enberg }, 32*40ce993fSPekka Enberg /* VIRTIO_BLK_SIZE */ 33*40ce993fSPekka Enberg .blk_size = 4096, 34*40ce993fSPekka Enberg }, 3598790f28SPekka Enberg .host_features = (1UL << VIRTIO_BLK_F_GEOMETRY) 36c435b91dSPekka Enberg | (1UL << VIRTIO_BLK_F_BLK_SIZE), 37c435b91dSPekka Enberg }; 38fbc2fbf9SPekka Enberg 39*40ce993fSPekka Enberg static bool virtio_blk_config_in(void *data, unsigned long offset, int size, uint32_t count) 40*40ce993fSPekka Enberg { 41*40ce993fSPekka Enberg uint8_t *config_space = (uint8_t *) &device.blk_config; 42*40ce993fSPekka Enberg 43*40ce993fSPekka Enberg if (size != 1 || count != 1) 44*40ce993fSPekka Enberg return false; 45*40ce993fSPekka Enberg 46*40ce993fSPekka Enberg ioport__write8(data, config_space[offset - VIRTIO_PCI_CONFIG_NOMSI]); 47*40ce993fSPekka Enberg 48*40ce993fSPekka Enberg return true; 49*40ce993fSPekka Enberg } 50*40ce993fSPekka Enberg 51fbc2fbf9SPekka Enberg static bool blk_virtio_in(struct kvm *self, uint16_t port, void *data, int size, uint32_t count) 52fbc2fbf9SPekka Enberg { 53fbc2fbf9SPekka Enberg unsigned long offset; 54fbc2fbf9SPekka Enberg 55fbc2fbf9SPekka Enberg offset = port - IOPORT_VIRTIO; 56fbc2fbf9SPekka Enberg 57fbc2fbf9SPekka Enberg switch (offset) { 58fbc2fbf9SPekka Enberg case VIRTIO_PCI_HOST_FEATURES: 59c435b91dSPekka Enberg ioport__write32(data, device.host_features); 60fbc2fbf9SPekka Enberg break; 61fbc2fbf9SPekka Enberg case VIRTIO_PCI_GUEST_FEATURES: 628b1ff07eSPekka Enberg return false; 63fbc2fbf9SPekka Enberg case VIRTIO_PCI_QUEUE_PFN: 648b1ff07eSPekka Enberg ioport__write32(data, 0x00); 658b1ff07eSPekka Enberg break; 66fbc2fbf9SPekka Enberg case VIRTIO_PCI_QUEUE_NUM: 678b1ff07eSPekka Enberg ioport__write16(data, 0x10); 688b1ff07eSPekka Enberg break; 69fbc2fbf9SPekka Enberg case VIRTIO_PCI_QUEUE_SEL: 70fbc2fbf9SPekka Enberg case VIRTIO_PCI_QUEUE_NOTIFY: 71fbc2fbf9SPekka Enberg return false; 72fbc2fbf9SPekka Enberg case VIRTIO_PCI_STATUS: 73fbc2fbf9SPekka Enberg ioport__write8(data, device.status); 74fbc2fbf9SPekka Enberg break; 75fbc2fbf9SPekka Enberg case VIRTIO_PCI_ISR: 768b1ff07eSPekka Enberg ioport__write8(data, 0x1); 778b1ff07eSPekka Enberg kvm__irq_line(self, VIRTIO_BLK_IRQ, 0); 787e61688eSPekka Enberg break; 79fbc2fbf9SPekka Enberg case VIRTIO_MSI_CONFIG_VECTOR: 80*40ce993fSPekka Enberg ioport__write16(data, device.config_vector); 81*40ce993fSPekka Enberg break; 82fbc2fbf9SPekka Enberg default: 83*40ce993fSPekka Enberg return virtio_blk_config_in(data, offset, size, count); 84fbc2fbf9SPekka Enberg }; 85fbc2fbf9SPekka Enberg 86fbc2fbf9SPekka Enberg return true; 87fbc2fbf9SPekka Enberg } 88fbc2fbf9SPekka Enberg 89fbc2fbf9SPekka Enberg static bool blk_virtio_out(struct kvm *self, uint16_t port, void *data, int size, uint32_t count) 90fbc2fbf9SPekka Enberg { 91fbc2fbf9SPekka Enberg unsigned long offset; 92fbc2fbf9SPekka Enberg 93fbc2fbf9SPekka Enberg offset = port - IOPORT_VIRTIO; 94fbc2fbf9SPekka Enberg 95fbc2fbf9SPekka Enberg switch (offset) { 96fbc2fbf9SPekka Enberg case VIRTIO_PCI_GUEST_FEATURES: 97fbc2fbf9SPekka Enberg device.guest_features = ioport__read32(data); 98fbc2fbf9SPekka Enberg break; 99fbc2fbf9SPekka Enberg case VIRTIO_PCI_QUEUE_PFN: 1007e61688eSPekka Enberg break; 101fbc2fbf9SPekka Enberg case VIRTIO_PCI_QUEUE_SEL: 1027e61688eSPekka Enberg break; 1037e61688eSPekka Enberg case VIRTIO_PCI_QUEUE_NOTIFY: 1048b1ff07eSPekka Enberg kvm__irq_line(self, VIRTIO_BLK_IRQ, 1); 1057e61688eSPekka Enberg break; 106fbc2fbf9SPekka Enberg case VIRTIO_PCI_STATUS: 107fbc2fbf9SPekka Enberg device.status = ioport__read8(data); 108fbc2fbf9SPekka Enberg break; 109fbc2fbf9SPekka Enberg case VIRTIO_MSI_CONFIG_VECTOR: 110*40ce993fSPekka Enberg device.config_vector = VIRTIO_MSI_NO_VECTOR; 111*40ce993fSPekka Enberg break; 112fbc2fbf9SPekka Enberg case VIRTIO_MSI_QUEUE_VECTOR: 113*40ce993fSPekka Enberg break; 114fbc2fbf9SPekka Enberg default: 115fbc2fbf9SPekka Enberg return false; 116fbc2fbf9SPekka Enberg }; 117fbc2fbf9SPekka Enberg 118fbc2fbf9SPekka Enberg return true; 119fbc2fbf9SPekka Enberg } 120fbc2fbf9SPekka Enberg 121fbc2fbf9SPekka Enberg static struct ioport_operations blk_virtio_io_ops = { 122fbc2fbf9SPekka Enberg .io_in = blk_virtio_in, 123fbc2fbf9SPekka Enberg .io_out = blk_virtio_out, 124fbc2fbf9SPekka Enberg }; 125fbc2fbf9SPekka Enberg 126b30d05adSPekka Enberg #define PCI_VENDOR_ID_REDHAT_QUMRANET 0x1af4 127b30d05adSPekka Enberg #define PCI_DEVICE_ID_VIRTIO_BLK 0x1001 128b30d05adSPekka Enberg #define PCI_SUBSYSTEM_VENDOR_ID_REDHAT_QUMRANET 0x1af4 129b30d05adSPekka Enberg #define PCI_SUBSYSTEM_ID_VIRTIO_BLK 0x0002 130b30d05adSPekka Enberg 131fbc2fbf9SPekka Enberg static struct pci_device_header blk_virtio_pci_device = { 132b30d05adSPekka Enberg .vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET, 133b30d05adSPekka Enberg .device_id = PCI_DEVICE_ID_VIRTIO_BLK, 134b30d05adSPekka Enberg .header_type = PCI_HEADER_TYPE_NORMAL, 135b30d05adSPekka Enberg .revision_id = 0, 136b30d05adSPekka Enberg .class = 0x010000, 137b30d05adSPekka Enberg .subsys_vendor_id = PCI_SUBSYSTEM_VENDOR_ID_REDHAT_QUMRANET, 138b30d05adSPekka Enberg .subsys_id = PCI_SUBSYSTEM_ID_VIRTIO_BLK, 139b30d05adSPekka Enberg .bar[0] = IOPORT_VIRTIO | PCI_BASE_ADDRESS_SPACE_IO, 140dc53a427SPekka Enberg /* XXX: Is this IRQ setup OK? */ 141dc53a427SPekka Enberg .irq_pin = 1, 1428b1ff07eSPekka Enberg .irq_line = VIRTIO_BLK_IRQ, 143b30d05adSPekka Enberg }; 144b30d05adSPekka Enberg 145b30d05adSPekka Enberg void blk_virtio__init(void) 146b30d05adSPekka Enberg { 147fbc2fbf9SPekka Enberg pci__register(&blk_virtio_pci_device, 1); 148b30d05adSPekka Enberg 1498b1ff07eSPekka Enberg ioport__register(IOPORT_VIRTIO, &blk_virtio_io_ops, 256); 150b30d05adSPekka Enberg } 151