17c9aac00SAnup Patel #include "kvm/devices.h" 27c9aac00SAnup Patel #include "kvm/fdt.h" 37c9aac00SAnup Patel #include "kvm/kvm.h" 47c9aac00SAnup Patel #include "kvm/kvm-cpu.h" 57c9aac00SAnup Patel 67c9aac00SAnup Patel #include <stdbool.h> 77c9aac00SAnup Patel 87c9aac00SAnup Patel #include <linux/byteorder.h> 97c9aac00SAnup Patel #include <linux/kernel.h> 107c9aac00SAnup Patel #include <linux/sizes.h> 117c9aac00SAnup Patel 128aff29e1SAtish Patra struct isa_ext_info { 138aff29e1SAtish Patra const char *name; 148aff29e1SAtish Patra unsigned long ext_id; 158aff29e1SAtish Patra }; 168aff29e1SAtish Patra 178aff29e1SAtish Patra struct isa_ext_info isa_info_arr[] = { 18b346fabeSAnup Patel /* sorted alphabetically */ 198659200fSAnup Patel {"ssaia", KVM_RISCV_ISA_EXT_SSAIA}, 203c07aeafSAtish Patra {"sstc", KVM_RISCV_ISA_EXT_SSTC}, 21ac16e943SAnup Patel {"svinval", KVM_RISCV_ISA_EXT_SVINVAL}, 2256e2d678SAnup Patel {"svnapot", KVM_RISCV_ISA_EXT_SVNAPOT}, 23b346fabeSAnup Patel {"svpbmt", KVM_RISCV_ISA_EXT_SVPBMT}, 24*6331850dSAnup Patel {"zba", KVM_RISCV_ISA_EXT_ZBA}, 258c1584e7SAnup Patel {"zbb", KVM_RISCV_ISA_EXT_ZBB}, 26*6331850dSAnup Patel {"zbs", KVM_RISCV_ISA_EXT_ZBS}, 27798398f4SAndrew Jones {"zicbom", KVM_RISCV_ISA_EXT_ZICBOM}, 288f1e47caSAndrew Jones {"zicboz", KVM_RISCV_ISA_EXT_ZICBOZ}, 29b346fabeSAnup Patel {"zihintpause", KVM_RISCV_ISA_EXT_ZIHINTPAUSE}, 308aff29e1SAtish Patra }; 318aff29e1SAtish Patra 327c9aac00SAnup Patel static void dump_fdt(const char *dtb_file, void *fdt) 337c9aac00SAnup Patel { 347c9aac00SAnup Patel int count, fd; 357c9aac00SAnup Patel 367c9aac00SAnup Patel fd = open(dtb_file, O_CREAT | O_TRUNC | O_RDWR, 0666); 377c9aac00SAnup Patel if (fd < 0) 387c9aac00SAnup Patel die("Failed to write dtb to %s", dtb_file); 397c9aac00SAnup Patel 407c9aac00SAnup Patel count = write(fd, fdt, FDT_MAX_SIZE); 417c9aac00SAnup Patel if (count < 0) 427c9aac00SAnup Patel die_perror("Failed to dump dtb"); 437c9aac00SAnup Patel 447c9aac00SAnup Patel pr_debug("Wrote %d bytes to dtb %s", count, dtb_file); 457c9aac00SAnup Patel close(fd); 467c9aac00SAnup Patel } 477c9aac00SAnup Patel 487c9aac00SAnup Patel #define CPU_NAME_MAX_LEN 15 497c9aac00SAnup Patel static void generate_cpu_nodes(void *fdt, struct kvm *kvm) 507c9aac00SAnup Patel { 517c9aac00SAnup Patel int cpu, pos, i, index, valid_isa_len; 527c9aac00SAnup Patel const char *valid_isa_order = "IEMAFDQCLBJTPVNSUHKORWXYZG"; 538aff29e1SAtish Patra int arr_sz = ARRAY_SIZE(isa_info_arr); 548f1e47caSAndrew Jones unsigned long cbom_blksz = 0, cboz_blksz = 0; 557c9aac00SAnup Patel 567c9aac00SAnup Patel _FDT(fdt_begin_node(fdt, "cpus")); 577c9aac00SAnup Patel _FDT(fdt_property_cell(fdt, "#address-cells", 0x1)); 587c9aac00SAnup Patel _FDT(fdt_property_cell(fdt, "#size-cells", 0x0)); 597c9aac00SAnup Patel _FDT(fdt_property_cell(fdt, "timebase-frequency", 607c9aac00SAnup Patel kvm->cpus[0]->riscv_timebase)); 617c9aac00SAnup Patel 627c9aac00SAnup Patel for (cpu = 0; cpu < kvm->nrcpus; ++cpu) { 637c9aac00SAnup Patel char cpu_name[CPU_NAME_MAX_LEN]; 647887b398SAnup Patel #define CPU_ISA_MAX_LEN (ARRAY_SIZE(isa_info_arr) * 16) 657c9aac00SAnup Patel char cpu_isa[CPU_ISA_MAX_LEN]; 667c9aac00SAnup Patel struct kvm_cpu *vcpu = kvm->cpus[cpu]; 678aff29e1SAtish Patra struct kvm_one_reg reg; 688aff29e1SAtish Patra unsigned long isa_ext_out = 0; 697c9aac00SAnup Patel 707c9aac00SAnup Patel snprintf(cpu_name, CPU_NAME_MAX_LEN, "cpu@%x", cpu); 717c9aac00SAnup Patel 727c9aac00SAnup Patel snprintf(cpu_isa, CPU_ISA_MAX_LEN, "rv%ld", vcpu->riscv_xlen); 737c9aac00SAnup Patel pos = strlen(cpu_isa); 747c9aac00SAnup Patel valid_isa_len = strlen(valid_isa_order); 757c9aac00SAnup Patel for (i = 0; i < valid_isa_len; i++) { 767c9aac00SAnup Patel index = valid_isa_order[i] - 'A'; 777c9aac00SAnup Patel if (vcpu->riscv_isa & (1 << (index))) 787c9aac00SAnup Patel cpu_isa[pos++] = 'a' + index; 797c9aac00SAnup Patel } 808aff29e1SAtish Patra 818aff29e1SAtish Patra for (i = 0; i < arr_sz; i++) { 828aff29e1SAtish Patra reg.id = RISCV_ISA_EXT_REG(isa_info_arr[i].ext_id); 838aff29e1SAtish Patra reg.addr = (unsigned long)&isa_ext_out; 848aff29e1SAtish Patra if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) 858aff29e1SAtish Patra continue; 868aff29e1SAtish Patra if (!isa_ext_out) 878aff29e1SAtish Patra /* This extension is not available in hardware */ 888aff29e1SAtish Patra continue; 898aff29e1SAtish Patra 90e17d182aSAnup Patel if (kvm->cfg.arch.ext_disabled[isa_info_arr[i].ext_id]) { 91e17d182aSAnup Patel isa_ext_out = 0; 92e17d182aSAnup Patel if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) 93e17d182aSAnup Patel pr_warning("Failed to disable %s ISA exension\n", 94e17d182aSAnup Patel isa_info_arr[i].name); 95e17d182aSAnup Patel continue; 96e17d182aSAnup Patel } 97e17d182aSAnup Patel 98798398f4SAndrew Jones if (isa_info_arr[i].ext_id == KVM_RISCV_ISA_EXT_ZICBOM && !cbom_blksz) { 99798398f4SAndrew Jones reg.id = RISCV_CONFIG_REG(zicbom_block_size); 100798398f4SAndrew Jones reg.addr = (unsigned long)&cbom_blksz; 101798398f4SAndrew Jones if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) 102798398f4SAndrew Jones die("KVM_GET_ONE_REG failed (config.zicbom_block_size)"); 103798398f4SAndrew Jones } 104798398f4SAndrew Jones 1058f1e47caSAndrew Jones if (isa_info_arr[i].ext_id == KVM_RISCV_ISA_EXT_ZICBOZ && !cboz_blksz) { 1068f1e47caSAndrew Jones reg.id = RISCV_CONFIG_REG(zicboz_block_size); 1078f1e47caSAndrew Jones reg.addr = (unsigned long)&cboz_blksz; 1088f1e47caSAndrew Jones if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0) 1098f1e47caSAndrew Jones die("KVM_GET_ONE_REG failed (config.zicboz_block_size)"); 1108f1e47caSAndrew Jones } 1118f1e47caSAndrew Jones 1128aff29e1SAtish Patra if ((strlen(isa_info_arr[i].name) + pos + 1) >= CPU_ISA_MAX_LEN) { 113fcb07675SAnup Patel pr_warning("Insufficient space to append ISA exension %s\n", 114fcb07675SAnup Patel isa_info_arr[i].name); 1158aff29e1SAtish Patra break; 1168aff29e1SAtish Patra } 1178aff29e1SAtish Patra pos += snprintf(cpu_isa + pos, CPU_ISA_MAX_LEN, "_%s", 1188aff29e1SAtish Patra isa_info_arr[i].name); 1198aff29e1SAtish Patra } 1207c9aac00SAnup Patel cpu_isa[pos] = '\0'; 1217c9aac00SAnup Patel 1227c9aac00SAnup Patel _FDT(fdt_begin_node(fdt, cpu_name)); 1237c9aac00SAnup Patel _FDT(fdt_property_string(fdt, "device_type", "cpu")); 1247c9aac00SAnup Patel _FDT(fdt_property_string(fdt, "compatible", "riscv")); 1257c9aac00SAnup Patel if (vcpu->riscv_xlen == 64) 1267c9aac00SAnup Patel _FDT(fdt_property_string(fdt, "mmu-type", 1277c9aac00SAnup Patel "riscv,sv48")); 1287c9aac00SAnup Patel else 1297c9aac00SAnup Patel _FDT(fdt_property_string(fdt, "mmu-type", 1307c9aac00SAnup Patel "riscv,sv32")); 1317c9aac00SAnup Patel _FDT(fdt_property_string(fdt, "riscv,isa", cpu_isa)); 132798398f4SAndrew Jones if (cbom_blksz) 133798398f4SAndrew Jones _FDT(fdt_property_cell(fdt, "riscv,cbom-block-size", cbom_blksz)); 1348f1e47caSAndrew Jones if (cboz_blksz) 1358f1e47caSAndrew Jones _FDT(fdt_property_cell(fdt, "riscv,cboz-block-size", cboz_blksz)); 1367c9aac00SAnup Patel _FDT(fdt_property_cell(fdt, "reg", cpu)); 1377c9aac00SAnup Patel _FDT(fdt_property_string(fdt, "status", "okay")); 1387c9aac00SAnup Patel 1397c9aac00SAnup Patel _FDT(fdt_begin_node(fdt, "interrupt-controller")); 1407c9aac00SAnup Patel _FDT(fdt_property_string(fdt, "compatible", "riscv,cpu-intc")); 1417c9aac00SAnup Patel _FDT(fdt_property_cell(fdt, "#interrupt-cells", 1)); 1427c9aac00SAnup Patel _FDT(fdt_property(fdt, "interrupt-controller", NULL, 0)); 1437c9aac00SAnup Patel _FDT(fdt_property_cell(fdt, "phandle", 1447c9aac00SAnup Patel PHANDLE_CPU_INTC_BASE + cpu)); 1457c9aac00SAnup Patel _FDT(fdt_end_node(fdt)); 1467c9aac00SAnup Patel 1477c9aac00SAnup Patel _FDT(fdt_end_node(fdt)); 1487c9aac00SAnup Patel } 1497c9aac00SAnup Patel 1507c9aac00SAnup Patel _FDT(fdt_end_node(fdt)); 1517c9aac00SAnup Patel } 1527c9aac00SAnup Patel 1537c9aac00SAnup Patel static int setup_fdt(struct kvm *kvm) 1547c9aac00SAnup Patel { 1557c9aac00SAnup Patel struct device_header *dev_hdr; 1567c9aac00SAnup Patel u8 staging_fdt[FDT_MAX_SIZE]; 1577c9aac00SAnup Patel u64 mem_reg_prop[] = { 1587c9aac00SAnup Patel cpu_to_fdt64(kvm->arch.memory_guest_start), 1597c9aac00SAnup Patel cpu_to_fdt64(kvm->ram_size), 1607c9aac00SAnup Patel }; 161ed805be5SAnup Patel char *str; 1627c9aac00SAnup Patel void *fdt = staging_fdt; 1637c9aac00SAnup Patel void *fdt_dest = guest_flat_to_host(kvm, 1647c9aac00SAnup Patel kvm->arch.dtb_guest_start); 1657c9aac00SAnup Patel void (*generate_mmio_fdt_nodes)(void *, struct device_header *, 1667c9aac00SAnup Patel void (*)(void *, u8, enum irq_type)); 1677c9aac00SAnup Patel 1687c9aac00SAnup Patel /* Create new tree without a reserve map */ 1697c9aac00SAnup Patel _FDT(fdt_create(fdt, FDT_MAX_SIZE)); 1707c9aac00SAnup Patel _FDT(fdt_finish_reservemap(fdt)); 1717c9aac00SAnup Patel 1727c9aac00SAnup Patel /* Header */ 1737c9aac00SAnup Patel _FDT(fdt_begin_node(fdt, "")); 1747c9aac00SAnup Patel _FDT(fdt_property_string(fdt, "compatible", "linux,dummy-virt")); 1757c9aac00SAnup Patel _FDT(fdt_property_cell(fdt, "#address-cells", 0x2)); 1767c9aac00SAnup Patel _FDT(fdt_property_cell(fdt, "#size-cells", 0x2)); 1777c9aac00SAnup Patel 1787c9aac00SAnup Patel /* /chosen */ 1797c9aac00SAnup Patel _FDT(fdt_begin_node(fdt, "chosen")); 1807c9aac00SAnup Patel 1817c9aac00SAnup Patel /* Pass on our amended command line to a Linux kernel only. */ 1827c9aac00SAnup Patel if (kvm->cfg.firmware_filename) { 1837c9aac00SAnup Patel if (kvm->cfg.kernel_cmdline) 1847c9aac00SAnup Patel _FDT(fdt_property_string(fdt, "bootargs", 1857c9aac00SAnup Patel kvm->cfg.kernel_cmdline)); 1867c9aac00SAnup Patel } else 1877c9aac00SAnup Patel _FDT(fdt_property_string(fdt, "bootargs", 1887c9aac00SAnup Patel kvm->cfg.real_cmdline)); 1897c9aac00SAnup Patel 1907c9aac00SAnup Patel _FDT(fdt_property_string(fdt, "stdout-path", "serial0")); 1917c9aac00SAnup Patel 1927c9aac00SAnup Patel /* Initrd */ 1937c9aac00SAnup Patel if (kvm->arch.initrd_size != 0) { 1947c9aac00SAnup Patel u64 ird_st_prop = cpu_to_fdt64(kvm->arch.initrd_guest_start); 1957c9aac00SAnup Patel u64 ird_end_prop = cpu_to_fdt64(kvm->arch.initrd_guest_start + 1967c9aac00SAnup Patel kvm->arch.initrd_size); 1977c9aac00SAnup Patel 1987c9aac00SAnup Patel _FDT(fdt_property(fdt, "linux,initrd-start", 1997c9aac00SAnup Patel &ird_st_prop, sizeof(ird_st_prop))); 2007c9aac00SAnup Patel _FDT(fdt_property(fdt, "linux,initrd-end", 2017c9aac00SAnup Patel &ird_end_prop, sizeof(ird_end_prop))); 2027c9aac00SAnup Patel } 2037c9aac00SAnup Patel 2047c9aac00SAnup Patel _FDT(fdt_end_node(fdt)); 2057c9aac00SAnup Patel 2067c9aac00SAnup Patel /* Memory */ 2077c9aac00SAnup Patel _FDT(fdt_begin_node(fdt, "memory")); 2087c9aac00SAnup Patel _FDT(fdt_property_string(fdt, "device_type", "memory")); 2097c9aac00SAnup Patel _FDT(fdt_property(fdt, "reg", mem_reg_prop, sizeof(mem_reg_prop))); 2107c9aac00SAnup Patel _FDT(fdt_end_node(fdt)); 2117c9aac00SAnup Patel 2127c9aac00SAnup Patel /* CPUs */ 2137c9aac00SAnup Patel generate_cpu_nodes(fdt, kvm); 2147c9aac00SAnup Patel 2150dff3501SAnup Patel /* IRQCHIP */ 2160dff3501SAnup Patel if (!riscv_irqchip_generate_fdt_node) 2170dff3501SAnup Patel die("No way to generate IRQCHIP FDT node\n"); 2180dff3501SAnup Patel riscv_irqchip_generate_fdt_node(fdt, kvm); 2190dff3501SAnup Patel 2207c9aac00SAnup Patel /* Simple Bus */ 2217c9aac00SAnup Patel _FDT(fdt_begin_node(fdt, "smb")); 2227c9aac00SAnup Patel _FDT(fdt_property_string(fdt, "compatible", "simple-bus")); 2237c9aac00SAnup Patel _FDT(fdt_property_cell(fdt, "#address-cells", 0x2)); 2247c9aac00SAnup Patel _FDT(fdt_property_cell(fdt, "#size-cells", 0x2)); 2250dff3501SAnup Patel _FDT(fdt_property_cell(fdt, "interrupt-parent", 2260dff3501SAnup Patel riscv_irqchip_phandle)); 2277c9aac00SAnup Patel _FDT(fdt_property(fdt, "ranges", NULL, 0)); 2287c9aac00SAnup Patel 2297c9aac00SAnup Patel /* Virtio MMIO devices */ 2307c9aac00SAnup Patel dev_hdr = device__first_dev(DEVICE_BUS_MMIO); 2317c9aac00SAnup Patel while (dev_hdr) { 2327c9aac00SAnup Patel generate_mmio_fdt_nodes = dev_hdr->data; 2330dff3501SAnup Patel generate_mmio_fdt_nodes(fdt, dev_hdr, 2340dff3501SAnup Patel riscv__generate_irq_prop); 2357c9aac00SAnup Patel dev_hdr = device__next_dev(dev_hdr); 2367c9aac00SAnup Patel } 2377c9aac00SAnup Patel 2387c9aac00SAnup Patel /* IOPORT devices */ 2397c9aac00SAnup Patel dev_hdr = device__first_dev(DEVICE_BUS_IOPORT); 2407c9aac00SAnup Patel while (dev_hdr) { 2417c9aac00SAnup Patel generate_mmio_fdt_nodes = dev_hdr->data; 2420dff3501SAnup Patel generate_mmio_fdt_nodes(fdt, dev_hdr, 2430dff3501SAnup Patel riscv__generate_irq_prop); 2447c9aac00SAnup Patel dev_hdr = device__next_dev(dev_hdr); 2457c9aac00SAnup Patel } 2467c9aac00SAnup Patel 247cdd7d8ccSAnup Patel /* PCI host controller */ 248cdd7d8ccSAnup Patel pci__generate_fdt_nodes(fdt); 249cdd7d8ccSAnup Patel 2507c9aac00SAnup Patel _FDT(fdt_end_node(fdt)); 2517c9aac00SAnup Patel 2527c9aac00SAnup Patel if (fdt_stdout_path) { 253ed805be5SAnup Patel str = malloc(strlen(fdt_stdout_path) + strlen("/smb") + 1); 254ed805be5SAnup Patel sprintf(str, "/smb%s", fdt_stdout_path); 2557c9aac00SAnup Patel free(fdt_stdout_path); 2567c9aac00SAnup Patel fdt_stdout_path = NULL; 257ed805be5SAnup Patel 258ed805be5SAnup Patel _FDT(fdt_begin_node(fdt, "aliases")); 259ed805be5SAnup Patel _FDT(fdt_property_string(fdt, "serial0", str)); 260ed805be5SAnup Patel _FDT(fdt_end_node(fdt)); 261ed805be5SAnup Patel free(str); 2627c9aac00SAnup Patel } 2637c9aac00SAnup Patel 2647c9aac00SAnup Patel /* Finalise. */ 2657c9aac00SAnup Patel _FDT(fdt_end_node(fdt)); 2667c9aac00SAnup Patel _FDT(fdt_finish(fdt)); 2677c9aac00SAnup Patel 2687c9aac00SAnup Patel _FDT(fdt_open_into(fdt, fdt_dest, FDT_MAX_SIZE)); 2697c9aac00SAnup Patel _FDT(fdt_pack(fdt_dest)); 2707c9aac00SAnup Patel 2717c9aac00SAnup Patel if (kvm->cfg.arch.dump_dtb_filename) 2727c9aac00SAnup Patel dump_fdt(kvm->cfg.arch.dump_dtb_filename, fdt_dest); 2737c9aac00SAnup Patel return 0; 2747c9aac00SAnup Patel } 2757c9aac00SAnup Patel late_init(setup_fdt); 276