1 /* 2 * PPC64 processor support 3 * 4 * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 as published 8 * by the Free Software Foundation. 9 */ 10 11 #include "kvm/kvm-cpu.h" 12 13 #include "kvm/symbol.h" 14 #include "kvm/util.h" 15 #include "kvm/kvm.h" 16 17 #include "spapr.h" 18 #include "spapr_pci.h" 19 #include "xics.h" 20 21 #include <sys/ioctl.h> 22 #include <sys/mman.h> 23 #include <signal.h> 24 #include <stdlib.h> 25 #include <string.h> 26 #include <errno.h> 27 #include <stdio.h> 28 #include <assert.h> 29 30 static int debug_fd; 31 32 void kvm_cpu__set_debug_fd(int fd) 33 { 34 debug_fd = fd; 35 } 36 37 int kvm_cpu__get_debug_fd(void) 38 { 39 return debug_fd; 40 } 41 42 static struct kvm_cpu *kvm_cpu__new(struct kvm *kvm) 43 { 44 struct kvm_cpu *vcpu; 45 46 vcpu = calloc(1, sizeof *vcpu); 47 if (!vcpu) 48 return NULL; 49 50 vcpu->kvm = kvm; 51 52 return vcpu; 53 } 54 55 void kvm_cpu__delete(struct kvm_cpu *vcpu) 56 { 57 free(vcpu); 58 } 59 60 struct kvm_cpu *kvm_cpu__init(struct kvm *kvm, unsigned long cpu_id) 61 { 62 struct kvm_cpu *vcpu; 63 int mmap_size; 64 struct kvm_enable_cap papr_cap = { .cap = KVM_CAP_PPC_PAPR }; 65 66 vcpu = kvm_cpu__new(kvm); 67 if (!vcpu) 68 return NULL; 69 70 vcpu->cpu_id = cpu_id; 71 72 vcpu->vcpu_fd = ioctl(vcpu->kvm->vm_fd, KVM_CREATE_VCPU, cpu_id); 73 if (vcpu->vcpu_fd < 0) 74 die_perror("KVM_CREATE_VCPU ioctl"); 75 76 mmap_size = ioctl(vcpu->kvm->sys_fd, KVM_GET_VCPU_MMAP_SIZE, 0); 77 if (mmap_size < 0) 78 die_perror("KVM_GET_VCPU_MMAP_SIZE ioctl"); 79 80 vcpu->kvm_run = mmap(NULL, mmap_size, PROT_RW, MAP_SHARED, vcpu->vcpu_fd, 0); 81 if (vcpu->kvm_run == MAP_FAILED) 82 die("unable to mmap vcpu fd"); 83 84 if (ioctl(vcpu->vcpu_fd, KVM_ENABLE_CAP, &papr_cap) < 0) 85 die("unable to enable PAPR capability"); 86 87 /* 88 * We start all CPUs, directing non-primary threads into the kernel's 89 * secondary start point. When we come to support SLOF, we will start 90 * only one and SLOF will RTAS call us to ask for others to be 91 * started. (FIXME: make more generic & interface with whichever 92 * firmware a platform may be using.) 93 */ 94 vcpu->is_running = true; 95 96 /* Register with IRQ controller (FIXME, assumes XICS) */ 97 xics_cpu_register(vcpu); 98 99 return vcpu; 100 } 101 102 static void kvm_cpu__setup_fpu(struct kvm_cpu *vcpu) 103 { 104 /* Don't have to do anything, there's no expected FPU state. */ 105 } 106 107 static void kvm_cpu__setup_regs(struct kvm_cpu *vcpu) 108 { 109 /* 110 * FIXME: This assumes PPC64 and Linux guest. It doesn't use the 111 * OpenFirmware entry method, but instead the "embedded" entry which 112 * passes the FDT address directly. 113 */ 114 struct kvm_regs *r = &vcpu->regs; 115 116 if (vcpu->cpu_id == 0) { 117 r->pc = KERNEL_START_ADDR; 118 r->gpr[3] = vcpu->kvm->fdt_gra; 119 r->gpr[5] = 0; 120 } else { 121 r->pc = KERNEL_SECONDARY_START_ADDR; 122 r->gpr[3] = vcpu->cpu_id; 123 } 124 r->msr = 0x8000000000001000UL; /* 64bit, non-HV, ME */ 125 126 if (ioctl(vcpu->vcpu_fd, KVM_SET_REGS, &vcpu->regs) < 0) 127 die_perror("KVM_SET_REGS failed"); 128 } 129 130 static void kvm_cpu__setup_sregs(struct kvm_cpu *vcpu) 131 { 132 /* 133 * Some sregs setup to initialise SDR1/PVR/HIOR on PPC64 SPAPR 134 * platforms using PR KVM. (Technically, this is all ignored on 135 * SPAPR HV KVM.) Different setup is required for non-PV non-SPAPR 136 * platforms! (FIXME.) 137 */ 138 struct kvm_sregs sregs; 139 struct kvm_one_reg reg = {}; 140 141 if (ioctl(vcpu->vcpu_fd, KVM_GET_SREGS, &sregs) < 0) 142 die("KVM_GET_SREGS failed"); 143 144 sregs.u.s.sdr1 = vcpu->kvm->sdr1; 145 sregs.pvr = vcpu->kvm->pvr; 146 147 if (ioctl(vcpu->vcpu_fd, KVM_SET_SREGS, &sregs) < 0) 148 die("KVM_SET_SREGS failed"); 149 150 reg.id = KVM_ONE_REG_PPC_HIOR; 151 reg.u.reg64 = 0; 152 if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, ®) < 0) 153 die("KVM_SET_ONE_REG failed"); 154 } 155 156 /** 157 * kvm_cpu__reset_vcpu - reset virtual CPU to a known state 158 */ 159 void kvm_cpu__reset_vcpu(struct kvm_cpu *vcpu) 160 { 161 kvm_cpu__setup_regs(vcpu); 162 kvm_cpu__setup_sregs(vcpu); 163 kvm_cpu__setup_fpu(vcpu); 164 } 165 166 /* kvm_cpu__irq - set KVM's IRQ flag on this vcpu */ 167 void kvm_cpu__irq(struct kvm_cpu *vcpu, int pin, int level) 168 { 169 unsigned int virq = level ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET; 170 171 /* FIXME: POWER-specific */ 172 if (pin != POWER7_EXT_IRQ) 173 return; 174 if (ioctl(vcpu->vcpu_fd, KVM_INTERRUPT, &virq) < 0) 175 pr_warning("Could not KVM_INTERRUPT."); 176 } 177 178 void kvm_cpu__arch_nmi(struct kvm_cpu *cpu) 179 { 180 } 181 182 bool kvm_cpu__handle_exit(struct kvm_cpu *vcpu) 183 { 184 bool ret = true; 185 struct kvm_run *run = vcpu->kvm_run; 186 switch(run->exit_reason) { 187 case KVM_EXIT_PAPR_HCALL: 188 run->papr_hcall.ret = spapr_hypercall(vcpu, run->papr_hcall.nr, 189 (target_ulong*)run->papr_hcall.args); 190 break; 191 default: 192 ret = false; 193 } 194 return ret; 195 } 196 197 bool kvm_cpu__emulate_mmio(struct kvm *kvm, u64 phys_addr, u8 *data, u32 len, u8 is_write) 198 { 199 /* 200 * FIXME: This function will need to be split in order to support 201 * various PowerPC platforms/PHB types, etc. It currently assumes SPAPR 202 * PPC64 guest. 203 */ 204 bool ret = false; 205 206 if ((phys_addr >= SPAPR_PCI_WIN_START) && 207 (phys_addr < SPAPR_PCI_WIN_END)) { 208 ret = spapr_phb_mmio(kvm, phys_addr, data, len, is_write); 209 } else { 210 pr_warning("MMIO %s unknown address %llx (size %d)!\n", 211 is_write ? "write to" : "read from", 212 phys_addr, len); 213 } 214 return ret; 215 } 216 217 #define CONDSTR_BIT(m, b) (((m) & MSR_##b) ? #b" " : "") 218 219 void kvm_cpu__show_registers(struct kvm_cpu *vcpu) 220 { 221 struct kvm_regs regs; 222 struct kvm_sregs sregs; 223 int r; 224 225 if (ioctl(vcpu->vcpu_fd, KVM_GET_REGS, ®s) < 0) 226 die("KVM_GET_REGS failed"); 227 if (ioctl(vcpu->vcpu_fd, KVM_GET_SREGS, &sregs) < 0) 228 die("KVM_GET_SREGS failed"); 229 230 dprintf(debug_fd, "\n Registers:\n"); 231 dprintf(debug_fd, " NIP: %016llx MSR: %016llx " 232 "( %s%s%s%s%s%s%s%s%s%s%s%s)\n", 233 regs.pc, regs.msr, 234 CONDSTR_BIT(regs.msr, SF), 235 CONDSTR_BIT(regs.msr, HV), /* ! */ 236 CONDSTR_BIT(regs.msr, VEC), 237 CONDSTR_BIT(regs.msr, VSX), 238 CONDSTR_BIT(regs.msr, EE), 239 CONDSTR_BIT(regs.msr, PR), 240 CONDSTR_BIT(regs.msr, FP), 241 CONDSTR_BIT(regs.msr, ME), 242 CONDSTR_BIT(regs.msr, IR), 243 CONDSTR_BIT(regs.msr, DR), 244 CONDSTR_BIT(regs.msr, RI), 245 CONDSTR_BIT(regs.msr, LE)); 246 dprintf(debug_fd, " CTR: %016llx LR: %016llx CR: %08llx\n", 247 regs.ctr, regs.lr, regs.cr); 248 dprintf(debug_fd, " SRR0: %016llx SRR1: %016llx XER: %016llx\n", 249 regs.srr0, regs.srr1, regs.xer); 250 dprintf(debug_fd, " SPRG0: %016llx SPRG1: %016llx\n", 251 regs.sprg0, regs.sprg1); 252 dprintf(debug_fd, " SPRG2: %016llx SPRG3: %016llx\n", 253 regs.sprg2, regs.sprg3); 254 dprintf(debug_fd, " SPRG4: %016llx SPRG5: %016llx\n", 255 regs.sprg4, regs.sprg5); 256 dprintf(debug_fd, " SPRG6: %016llx SPRG7: %016llx\n", 257 regs.sprg6, regs.sprg7); 258 dprintf(debug_fd, " GPRs:\n "); 259 for (r = 0; r < 32; r++) { 260 dprintf(debug_fd, "%016llx ", regs.gpr[r]); 261 if ((r & 3) == 3) 262 dprintf(debug_fd, "\n "); 263 } 264 dprintf(debug_fd, "\n"); 265 266 /* FIXME: Assumes SLB-based (book3s) guest */ 267 for (r = 0; r < 32; r++) { 268 dprintf(debug_fd, " SLB%02d %016llx %016llx\n", r, 269 sregs.u.s.ppc64.slb[r].slbe, 270 sregs.u.s.ppc64.slb[r].slbv); 271 } 272 dprintf(debug_fd, "----------\n"); 273 } 274 275 void kvm_cpu__show_code(struct kvm_cpu *vcpu) 276 { 277 if (ioctl(vcpu->vcpu_fd, KVM_GET_REGS, &vcpu->regs) < 0) 278 die("KVM_GET_REGS failed"); 279 280 /* FIXME: Dump/disassemble some code...! */ 281 282 dprintf(debug_fd, "\n Stack:\n"); 283 dprintf(debug_fd, " ------\n"); 284 /* Only works in real mode: */ 285 kvm__dump_mem(vcpu->kvm, vcpu->regs.gpr[1], 32); 286 } 287 288 void kvm_cpu__show_page_tables(struct kvm_cpu *vcpu) 289 { 290 /* Does nothing yet */ 291 } 292