11bbe92f5SDave Martin /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2304dcb64SAndre Przywara #ifndef __LINUX_KVM_H 3304dcb64SAndre Przywara #define __LINUX_KVM_H 4304dcb64SAndre Przywara 5304dcb64SAndre Przywara /* 6304dcb64SAndre Przywara * Userspace interface for /dev/kvm - kernel based virtual machine 7304dcb64SAndre Przywara * 8304dcb64SAndre Przywara * Note: you must update KVM_API_VERSION if you change this interface. 9304dcb64SAndre Przywara */ 10304dcb64SAndre Przywara 115968b5ffSAnup Patel #include <linux/const.h> 12304dcb64SAndre Przywara #include <linux/types.h> 13304dcb64SAndre Przywara #include <linux/compiler.h> 14304dcb64SAndre Przywara #include <linux/ioctl.h> 15304dcb64SAndre Przywara #include <asm/kvm.h> 16304dcb64SAndre Przywara 17304dcb64SAndre Przywara #define KVM_API_VERSION 12 18304dcb64SAndre Przywara 19304dcb64SAndre Przywara /* for KVM_SET_USER_MEMORY_REGION */ 20304dcb64SAndre Przywara struct kvm_userspace_memory_region { 21304dcb64SAndre Przywara __u32 slot; 22304dcb64SAndre Przywara __u32 flags; 23304dcb64SAndre Przywara __u64 guest_phys_addr; 24304dcb64SAndre Przywara __u64 memory_size; /* bytes */ 25304dcb64SAndre Przywara __u64 userspace_addr; /* start of the userspace allocated memory */ 26304dcb64SAndre Przywara }; 27304dcb64SAndre Przywara 28*99684681SAnup Patel /* for KVM_SET_USER_MEMORY_REGION2 */ 29*99684681SAnup Patel struct kvm_userspace_memory_region2 { 30*99684681SAnup Patel __u32 slot; 31*99684681SAnup Patel __u32 flags; 32*99684681SAnup Patel __u64 guest_phys_addr; 33*99684681SAnup Patel __u64 memory_size; 34*99684681SAnup Patel __u64 userspace_addr; 35*99684681SAnup Patel __u64 guest_memfd_offset; 36*99684681SAnup Patel __u32 guest_memfd; 37*99684681SAnup Patel __u32 pad1; 38*99684681SAnup Patel __u64 pad2[14]; 39*99684681SAnup Patel }; 40*99684681SAnup Patel 41304dcb64SAndre Przywara /* 42be986824SAnup Patel * The bit 0 ~ bit 15 of kvm_userspace_memory_region::flags are visible for 43be986824SAnup Patel * userspace, other bits are reserved for kvm internal use which are defined 44be986824SAnup Patel * in include/linux/kvm_host.h. 45304dcb64SAndre Przywara */ 46304dcb64SAndre Przywara #define KVM_MEM_LOG_DIRTY_PAGES (1UL << 0) 47304dcb64SAndre Przywara #define KVM_MEM_READONLY (1UL << 1) 48*99684681SAnup Patel #define KVM_MEM_GUEST_MEMFD (1UL << 2) 49304dcb64SAndre Przywara 50304dcb64SAndre Przywara /* for KVM_IRQ_LINE */ 51304dcb64SAndre Przywara struct kvm_irq_level { 52304dcb64SAndre Przywara /* 53304dcb64SAndre Przywara * ACPI gsi notion of irq. 54304dcb64SAndre Przywara * For IA-64 (APIC model) IOAPIC0: irq 0-23; IOAPIC1: irq 24-47.. 55304dcb64SAndre Przywara * For X86 (standard AT mode) PIC0/1: irq 0-15. IOAPIC0: 0-23.. 565968b5ffSAnup Patel * For ARM: See Documentation/virt/kvm/api.rst 57304dcb64SAndre Przywara */ 58304dcb64SAndre Przywara union { 59304dcb64SAndre Przywara __u32 irq; 60304dcb64SAndre Przywara __s32 status; 61304dcb64SAndre Przywara }; 62304dcb64SAndre Przywara __u32 level; 63304dcb64SAndre Przywara }; 64304dcb64SAndre Przywara 65304dcb64SAndre Przywara 66304dcb64SAndre Przywara struct kvm_irqchip { 67304dcb64SAndre Przywara __u32 chip_id; 68304dcb64SAndre Przywara __u32 pad; 69304dcb64SAndre Przywara union { 70304dcb64SAndre Przywara char dummy[512]; /* reserving space */ 71304dcb64SAndre Przywara #ifdef __KVM_HAVE_PIT 72304dcb64SAndre Przywara struct kvm_pic_state pic; 73304dcb64SAndre Przywara #endif 74304dcb64SAndre Przywara #ifdef __KVM_HAVE_IOAPIC 75304dcb64SAndre Przywara struct kvm_ioapic_state ioapic; 76304dcb64SAndre Przywara #endif 77304dcb64SAndre Przywara } chip; 78304dcb64SAndre Przywara }; 79304dcb64SAndre Przywara 80304dcb64SAndre Przywara /* for KVM_CREATE_PIT2 */ 81304dcb64SAndre Przywara struct kvm_pit_config { 82304dcb64SAndre Przywara __u32 flags; 83304dcb64SAndre Przywara __u32 pad[15]; 84304dcb64SAndre Przywara }; 85304dcb64SAndre Przywara 86304dcb64SAndre Przywara #define KVM_PIT_SPEAKER_DUMMY 1 87304dcb64SAndre Przywara 88304dcb64SAndre Przywara struct kvm_s390_skeys { 89304dcb64SAndre Przywara __u64 start_gfn; 90304dcb64SAndre Przywara __u64 count; 91304dcb64SAndre Przywara __u64 skeydata_addr; 92304dcb64SAndre Przywara __u32 flags; 93304dcb64SAndre Przywara __u32 reserved[9]; 94304dcb64SAndre Przywara }; 95b3f606e1SMarc Zyngier 961bbe92f5SDave Martin #define KVM_S390_CMMA_PEEK (1 << 0) 971bbe92f5SDave Martin 981bbe92f5SDave Martin /** 991bbe92f5SDave Martin * kvm_s390_cmma_log - Used for CMMA migration. 1001bbe92f5SDave Martin * 1011bbe92f5SDave Martin * Used both for input and output. 1021bbe92f5SDave Martin * 1031bbe92f5SDave Martin * @start_gfn: Guest page number to start from. 1041bbe92f5SDave Martin * @count: Size of the result buffer. 1051bbe92f5SDave Martin * @flags: Control operation mode via KVM_S390_CMMA_* flags 1061bbe92f5SDave Martin * @remaining: Used with KVM_S390_GET_CMMA_BITS. Indicates how many dirty 1071bbe92f5SDave Martin * pages are still remaining. 1081bbe92f5SDave Martin * @mask: Used with KVM_S390_SET_CMMA_BITS. Bitmap of bits to actually set 1091bbe92f5SDave Martin * in the PGSTE. 1101bbe92f5SDave Martin * @values: Pointer to the values buffer. 1111bbe92f5SDave Martin * 1121bbe92f5SDave Martin * Used in KVM_S390_{G,S}ET_CMMA_BITS ioctls. 1131bbe92f5SDave Martin */ 1141bbe92f5SDave Martin struct kvm_s390_cmma_log { 1151bbe92f5SDave Martin __u64 start_gfn; 1161bbe92f5SDave Martin __u32 count; 1171bbe92f5SDave Martin __u32 flags; 1181bbe92f5SDave Martin union { 1191bbe92f5SDave Martin __u64 remaining; 1201bbe92f5SDave Martin __u64 mask; 1211bbe92f5SDave Martin }; 1221bbe92f5SDave Martin __u64 values; 1231bbe92f5SDave Martin }; 1241bbe92f5SDave Martin 125b3f606e1SMarc Zyngier struct kvm_hyperv_exit { 126b3f606e1SMarc Zyngier #define KVM_EXIT_HYPERV_SYNIC 1 127b37ed70eSAndre Przywara #define KVM_EXIT_HYPERV_HCALL 2 1285968b5ffSAnup Patel #define KVM_EXIT_HYPERV_SYNDBG 3 129b3f606e1SMarc Zyngier __u32 type; 1305968b5ffSAnup Patel __u32 pad1; 131b3f606e1SMarc Zyngier union { 132b3f606e1SMarc Zyngier struct { 133b3f606e1SMarc Zyngier __u32 msr; 1345968b5ffSAnup Patel __u32 pad2; 135b3f606e1SMarc Zyngier __u64 control; 136b3f606e1SMarc Zyngier __u64 evt_page; 137b3f606e1SMarc Zyngier __u64 msg_page; 138b3f606e1SMarc Zyngier } synic; 139b37ed70eSAndre Przywara struct { 140b37ed70eSAndre Przywara __u64 input; 141b37ed70eSAndre Przywara __u64 result; 142b37ed70eSAndre Przywara __u64 params[2]; 143b37ed70eSAndre Przywara } hcall; 1445968b5ffSAnup Patel struct { 1455968b5ffSAnup Patel __u32 msr; 1465968b5ffSAnup Patel __u32 pad2; 1475968b5ffSAnup Patel __u64 control; 1485968b5ffSAnup Patel __u64 status; 1495968b5ffSAnup Patel __u64 send_page; 1505968b5ffSAnup Patel __u64 recv_page; 1515968b5ffSAnup Patel __u64 pending_page; 1525968b5ffSAnup Patel } syndbg; 1535968b5ffSAnup Patel } u; 1545968b5ffSAnup Patel }; 1555968b5ffSAnup Patel 1565968b5ffSAnup Patel struct kvm_xen_exit { 1575968b5ffSAnup Patel #define KVM_EXIT_XEN_HCALL 1 1585968b5ffSAnup Patel __u32 type; 1595968b5ffSAnup Patel union { 1605968b5ffSAnup Patel struct { 1615968b5ffSAnup Patel __u32 longmode; 1625968b5ffSAnup Patel __u32 cpl; 1635968b5ffSAnup Patel __u64 input; 1645968b5ffSAnup Patel __u64 result; 1655968b5ffSAnup Patel __u64 params[6]; 1665968b5ffSAnup Patel } hcall; 167b3f606e1SMarc Zyngier } u; 168b3f606e1SMarc Zyngier }; 169b3f606e1SMarc Zyngier 170304dcb64SAndre Przywara #define KVM_S390_GET_SKEYS_NONE 1 171304dcb64SAndre Przywara #define KVM_S390_SKEYS_MAX 1048576 172304dcb64SAndre Przywara 173304dcb64SAndre Przywara #define KVM_EXIT_UNKNOWN 0 174304dcb64SAndre Przywara #define KVM_EXIT_EXCEPTION 1 175304dcb64SAndre Przywara #define KVM_EXIT_IO 2 176304dcb64SAndre Przywara #define KVM_EXIT_HYPERCALL 3 177304dcb64SAndre Przywara #define KVM_EXIT_DEBUG 4 178304dcb64SAndre Przywara #define KVM_EXIT_HLT 5 179304dcb64SAndre Przywara #define KVM_EXIT_MMIO 6 180304dcb64SAndre Przywara #define KVM_EXIT_IRQ_WINDOW_OPEN 7 181304dcb64SAndre Przywara #define KVM_EXIT_SHUTDOWN 8 182304dcb64SAndre Przywara #define KVM_EXIT_FAIL_ENTRY 9 183304dcb64SAndre Przywara #define KVM_EXIT_INTR 10 184304dcb64SAndre Przywara #define KVM_EXIT_SET_TPR 11 185304dcb64SAndre Przywara #define KVM_EXIT_TPR_ACCESS 12 186304dcb64SAndre Przywara #define KVM_EXIT_S390_SIEIC 13 187304dcb64SAndre Przywara #define KVM_EXIT_S390_RESET 14 188304dcb64SAndre Przywara #define KVM_EXIT_DCR 15 /* deprecated */ 189304dcb64SAndre Przywara #define KVM_EXIT_NMI 16 190304dcb64SAndre Przywara #define KVM_EXIT_INTERNAL_ERROR 17 191304dcb64SAndre Przywara #define KVM_EXIT_OSI 18 192304dcb64SAndre Przywara #define KVM_EXIT_PAPR_HCALL 19 193304dcb64SAndre Przywara #define KVM_EXIT_S390_UCONTROL 20 194304dcb64SAndre Przywara #define KVM_EXIT_WATCHDOG 21 195304dcb64SAndre Przywara #define KVM_EXIT_S390_TSCH 22 196304dcb64SAndre Przywara #define KVM_EXIT_EPR 23 197304dcb64SAndre Przywara #define KVM_EXIT_SYSTEM_EVENT 24 198304dcb64SAndre Przywara #define KVM_EXIT_S390_STSI 25 199b3f606e1SMarc Zyngier #define KVM_EXIT_IOAPIC_EOI 26 200b3f606e1SMarc Zyngier #define KVM_EXIT_HYPERV 27 2015968b5ffSAnup Patel #define KVM_EXIT_ARM_NISV 28 2025968b5ffSAnup Patel #define KVM_EXIT_X86_RDMSR 29 2035968b5ffSAnup Patel #define KVM_EXIT_X86_WRMSR 30 2045968b5ffSAnup Patel #define KVM_EXIT_DIRTY_RING_FULL 31 2055968b5ffSAnup Patel #define KVM_EXIT_AP_RESET_HOLD 32 2065968b5ffSAnup Patel #define KVM_EXIT_X86_BUS_LOCK 33 2075968b5ffSAnup Patel #define KVM_EXIT_XEN 34 2085968b5ffSAnup Patel #define KVM_EXIT_RISCV_SBI 35 2098d0facecSAnup Patel #define KVM_EXIT_RISCV_CSR 36 2108d0facecSAnup Patel #define KVM_EXIT_NOTIFY 37 21192ef2dcdSWill Deacon #define KVM_EXIT_LOONGARCH_IOCSR 38 212*99684681SAnup Patel #define KVM_EXIT_MEMORY_FAULT 39 213304dcb64SAndre Przywara 214304dcb64SAndre Przywara /* For KVM_EXIT_INTERNAL_ERROR */ 215304dcb64SAndre Przywara /* Emulate instruction failed. */ 216304dcb64SAndre Przywara #define KVM_INTERNAL_ERROR_EMULATION 1 217304dcb64SAndre Przywara /* Encounter unexpected simultaneous exceptions. */ 218304dcb64SAndre Przywara #define KVM_INTERNAL_ERROR_SIMUL_EX 2 219304dcb64SAndre Przywara /* Encounter unexpected vm-exit due to delivery event. */ 220304dcb64SAndre Przywara #define KVM_INTERNAL_ERROR_DELIVERY_EV 3 2215968b5ffSAnup Patel /* Encounter unexpected vm-exit reason */ 2225968b5ffSAnup Patel #define KVM_INTERNAL_ERROR_UNEXPECTED_EXIT_REASON 4 2235968b5ffSAnup Patel 2245968b5ffSAnup Patel /* Flags that describe what fields in emulation_failure hold valid data. */ 2255968b5ffSAnup Patel #define KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES (1ULL << 0) 226304dcb64SAndre Przywara 227304dcb64SAndre Przywara /* for KVM_RUN, returned by mmap(vcpu_fd, offset=0) */ 228304dcb64SAndre Przywara struct kvm_run { 229304dcb64SAndre Przywara /* in */ 230304dcb64SAndre Przywara __u8 request_interrupt_window; 231764dfba1SAndre Przywara __u8 immediate_exit; 232764dfba1SAndre Przywara __u8 padding1[6]; 233304dcb64SAndre Przywara 234304dcb64SAndre Przywara /* out */ 235304dcb64SAndre Przywara __u32 exit_reason; 236304dcb64SAndre Przywara __u8 ready_for_interrupt_injection; 237304dcb64SAndre Przywara __u8 if_flag; 238b3f606e1SMarc Zyngier __u16 flags; 239304dcb64SAndre Przywara 240304dcb64SAndre Przywara /* in (pre_kvm_run), out (post_kvm_run) */ 241304dcb64SAndre Przywara __u64 cr8; 242304dcb64SAndre Przywara __u64 apic_base; 243304dcb64SAndre Przywara 244304dcb64SAndre Przywara #ifdef __KVM_S390 245304dcb64SAndre Przywara /* the processor status word for s390 */ 246304dcb64SAndre Przywara __u64 psw_mask; /* psw upper half */ 247304dcb64SAndre Przywara __u64 psw_addr; /* psw lower half */ 248304dcb64SAndre Przywara #endif 249304dcb64SAndre Przywara union { 250304dcb64SAndre Przywara /* KVM_EXIT_UNKNOWN */ 251304dcb64SAndre Przywara struct { 252304dcb64SAndre Przywara __u64 hardware_exit_reason; 253304dcb64SAndre Przywara } hw; 254304dcb64SAndre Przywara /* KVM_EXIT_FAIL_ENTRY */ 255304dcb64SAndre Przywara struct { 256304dcb64SAndre Przywara __u64 hardware_entry_failure_reason; 2575968b5ffSAnup Patel __u32 cpu; 258304dcb64SAndre Przywara } fail_entry; 259304dcb64SAndre Przywara /* KVM_EXIT_EXCEPTION */ 260304dcb64SAndre Przywara struct { 261304dcb64SAndre Przywara __u32 exception; 262304dcb64SAndre Przywara __u32 error_code; 263304dcb64SAndre Przywara } ex; 264304dcb64SAndre Przywara /* KVM_EXIT_IO */ 265304dcb64SAndre Przywara struct { 266304dcb64SAndre Przywara #define KVM_EXIT_IO_IN 0 267304dcb64SAndre Przywara #define KVM_EXIT_IO_OUT 1 268304dcb64SAndre Przywara __u8 direction; 269304dcb64SAndre Przywara __u8 size; /* bytes */ 270304dcb64SAndre Przywara __u16 port; 271304dcb64SAndre Przywara __u32 count; 272304dcb64SAndre Przywara __u64 data_offset; /* relative to kvm_run start */ 273304dcb64SAndre Przywara } io; 274b3f606e1SMarc Zyngier /* KVM_EXIT_DEBUG */ 275304dcb64SAndre Przywara struct { 276304dcb64SAndre Przywara struct kvm_debug_exit_arch arch; 277304dcb64SAndre Przywara } debug; 278304dcb64SAndre Przywara /* KVM_EXIT_MMIO */ 279304dcb64SAndre Przywara struct { 280304dcb64SAndre Przywara __u64 phys_addr; 281304dcb64SAndre Przywara __u8 data[8]; 282304dcb64SAndre Przywara __u32 len; 283304dcb64SAndre Przywara __u8 is_write; 284304dcb64SAndre Przywara } mmio; 28592ef2dcdSWill Deacon /* KVM_EXIT_LOONGARCH_IOCSR */ 28692ef2dcdSWill Deacon struct { 28792ef2dcdSWill Deacon __u64 phys_addr; 28892ef2dcdSWill Deacon __u8 data[8]; 28992ef2dcdSWill Deacon __u32 len; 29092ef2dcdSWill Deacon __u8 is_write; 29192ef2dcdSWill Deacon } iocsr_io; 292304dcb64SAndre Przywara /* KVM_EXIT_HYPERCALL */ 293304dcb64SAndre Przywara struct { 294304dcb64SAndre Przywara __u64 nr; 295304dcb64SAndre Przywara __u64 args[6]; 296304dcb64SAndre Przywara __u64 ret; 297be986824SAnup Patel 298be986824SAnup Patel union { 299be986824SAnup Patel #ifndef __KERNEL__ 300304dcb64SAndre Przywara __u32 longmode; 301be986824SAnup Patel #endif 302be986824SAnup Patel __u64 flags; 303be986824SAnup Patel }; 304304dcb64SAndre Przywara } hypercall; 305304dcb64SAndre Przywara /* KVM_EXIT_TPR_ACCESS */ 306304dcb64SAndre Przywara struct { 307304dcb64SAndre Przywara __u64 rip; 308304dcb64SAndre Przywara __u32 is_write; 309304dcb64SAndre Przywara __u32 pad; 310304dcb64SAndre Przywara } tpr_access; 311304dcb64SAndre Przywara /* KVM_EXIT_S390_SIEIC */ 312304dcb64SAndre Przywara struct { 313304dcb64SAndre Przywara __u8 icptcode; 314304dcb64SAndre Przywara __u16 ipa; 315304dcb64SAndre Przywara __u32 ipb; 316304dcb64SAndre Przywara } s390_sieic; 317304dcb64SAndre Przywara /* KVM_EXIT_S390_RESET */ 318304dcb64SAndre Przywara #define KVM_S390_RESET_POR 1 319304dcb64SAndre Przywara #define KVM_S390_RESET_CLEAR 2 320304dcb64SAndre Przywara #define KVM_S390_RESET_SUBSYSTEM 4 321304dcb64SAndre Przywara #define KVM_S390_RESET_CPU_INIT 8 322304dcb64SAndre Przywara #define KVM_S390_RESET_IPL 16 323304dcb64SAndre Przywara __u64 s390_reset_flags; 324304dcb64SAndre Przywara /* KVM_EXIT_S390_UCONTROL */ 325304dcb64SAndre Przywara struct { 326304dcb64SAndre Przywara __u64 trans_exc_code; 327304dcb64SAndre Przywara __u32 pgm_code; 328304dcb64SAndre Przywara } s390_ucontrol; 329304dcb64SAndre Przywara /* KVM_EXIT_DCR (deprecated) */ 330304dcb64SAndre Przywara struct { 331304dcb64SAndre Przywara __u32 dcrn; 332304dcb64SAndre Przywara __u32 data; 333304dcb64SAndre Przywara __u8 is_write; 334304dcb64SAndre Przywara } dcr; 335b3f606e1SMarc Zyngier /* KVM_EXIT_INTERNAL_ERROR */ 336304dcb64SAndre Przywara struct { 337304dcb64SAndre Przywara __u32 suberror; 338304dcb64SAndre Przywara /* Available with KVM_CAP_INTERNAL_ERROR_DATA: */ 339304dcb64SAndre Przywara __u32 ndata; 340304dcb64SAndre Przywara __u64 data[16]; 341304dcb64SAndre Przywara } internal; 3425968b5ffSAnup Patel /* 3435968b5ffSAnup Patel * KVM_INTERNAL_ERROR_EMULATION 3445968b5ffSAnup Patel * 3455968b5ffSAnup Patel * "struct emulation_failure" is an overlay of "struct internal" 3465968b5ffSAnup Patel * that is used for the KVM_INTERNAL_ERROR_EMULATION sub-type of 3475968b5ffSAnup Patel * KVM_EXIT_INTERNAL_ERROR. Note, unlike other internal error 3485968b5ffSAnup Patel * sub-types, this struct is ABI! It also needs to be backwards 3495968b5ffSAnup Patel * compatible with "struct internal". Take special care that 3505968b5ffSAnup Patel * "ndata" is correct, that new fields are enumerated in "flags", 3515968b5ffSAnup Patel * and that each flag enumerates fields that are 64-bit aligned 3525968b5ffSAnup Patel * and sized (so that ndata+internal.data[] is valid/accurate). 3535968b5ffSAnup Patel * 3545968b5ffSAnup Patel * Space beyond the defined fields may be used to store arbitrary 3555968b5ffSAnup Patel * debug information relating to the emulation failure. It is 3565968b5ffSAnup Patel * accounted for in "ndata" but the format is unspecified and is 3575968b5ffSAnup Patel * not represented in "flags". Any such information is *not* ABI! 3585968b5ffSAnup Patel */ 3595968b5ffSAnup Patel struct { 3605968b5ffSAnup Patel __u32 suberror; 3615968b5ffSAnup Patel __u32 ndata; 3625968b5ffSAnup Patel __u64 flags; 3635968b5ffSAnup Patel union { 3645968b5ffSAnup Patel struct { 3655968b5ffSAnup Patel __u8 insn_size; 3665968b5ffSAnup Patel __u8 insn_bytes[15]; 3675968b5ffSAnup Patel }; 3685968b5ffSAnup Patel }; 3695968b5ffSAnup Patel /* Arbitrary debug data may follow. */ 3705968b5ffSAnup Patel } emulation_failure; 371304dcb64SAndre Przywara /* KVM_EXIT_OSI */ 372304dcb64SAndre Przywara struct { 373304dcb64SAndre Przywara __u64 gprs[32]; 374304dcb64SAndre Przywara } osi; 375b3f606e1SMarc Zyngier /* KVM_EXIT_PAPR_HCALL */ 376304dcb64SAndre Przywara struct { 377304dcb64SAndre Przywara __u64 nr; 378304dcb64SAndre Przywara __u64 ret; 379304dcb64SAndre Przywara __u64 args[9]; 380304dcb64SAndre Przywara } papr_hcall; 381304dcb64SAndre Przywara /* KVM_EXIT_S390_TSCH */ 382304dcb64SAndre Przywara struct { 383304dcb64SAndre Przywara __u16 subchannel_id; 384304dcb64SAndre Przywara __u16 subchannel_nr; 385304dcb64SAndre Przywara __u32 io_int_parm; 386304dcb64SAndre Przywara __u32 io_int_word; 387304dcb64SAndre Przywara __u32 ipb; 388304dcb64SAndre Przywara __u8 dequeued; 389304dcb64SAndre Przywara } s390_tsch; 390304dcb64SAndre Przywara /* KVM_EXIT_EPR */ 391304dcb64SAndre Przywara struct { 392304dcb64SAndre Przywara __u32 epr; 393304dcb64SAndre Przywara } epr; 394304dcb64SAndre Przywara /* KVM_EXIT_SYSTEM_EVENT */ 395304dcb64SAndre Przywara struct { 396304dcb64SAndre Przywara #define KVM_SYSTEM_EVENT_SHUTDOWN 1 397304dcb64SAndre Przywara #define KVM_SYSTEM_EVENT_RESET 2 398b3f606e1SMarc Zyngier #define KVM_SYSTEM_EVENT_CRASH 3 3998d0facecSAnup Patel #define KVM_SYSTEM_EVENT_WAKEUP 4 4008d0facecSAnup Patel #define KVM_SYSTEM_EVENT_SUSPEND 5 4018d0facecSAnup Patel #define KVM_SYSTEM_EVENT_SEV_TERM 6 402304dcb64SAndre Przywara __u32 type; 4038d0facecSAnup Patel __u32 ndata; 4048d0facecSAnup Patel union { 4058d0facecSAnup Patel #ifndef __KERNEL__ 406304dcb64SAndre Przywara __u64 flags; 4078d0facecSAnup Patel #endif 4088d0facecSAnup Patel __u64 data[16]; 4098d0facecSAnup Patel }; 410304dcb64SAndre Przywara } system_event; 411304dcb64SAndre Przywara /* KVM_EXIT_S390_STSI */ 412304dcb64SAndre Przywara struct { 413304dcb64SAndre Przywara __u64 addr; 414304dcb64SAndre Przywara __u8 ar; 415304dcb64SAndre Przywara __u8 reserved; 416304dcb64SAndre Przywara __u8 fc; 417304dcb64SAndre Przywara __u8 sel1; 418304dcb64SAndre Przywara __u16 sel2; 419304dcb64SAndre Przywara } s390_stsi; 420b3f606e1SMarc Zyngier /* KVM_EXIT_IOAPIC_EOI */ 421b3f606e1SMarc Zyngier struct { 422b3f606e1SMarc Zyngier __u8 vector; 423b3f606e1SMarc Zyngier } eoi; 424b3f606e1SMarc Zyngier /* KVM_EXIT_HYPERV */ 425b3f606e1SMarc Zyngier struct kvm_hyperv_exit hyperv; 4265968b5ffSAnup Patel /* KVM_EXIT_ARM_NISV */ 4275968b5ffSAnup Patel struct { 4285968b5ffSAnup Patel __u64 esr_iss; 4295968b5ffSAnup Patel __u64 fault_ipa; 4305968b5ffSAnup Patel } arm_nisv; 4315968b5ffSAnup Patel /* KVM_EXIT_X86_RDMSR / KVM_EXIT_X86_WRMSR */ 4325968b5ffSAnup Patel struct { 4335968b5ffSAnup Patel __u8 error; /* user -> kernel */ 4345968b5ffSAnup Patel __u8 pad[7]; 4355968b5ffSAnup Patel #define KVM_MSR_EXIT_REASON_INVAL (1 << 0) 4365968b5ffSAnup Patel #define KVM_MSR_EXIT_REASON_UNKNOWN (1 << 1) 4375968b5ffSAnup Patel #define KVM_MSR_EXIT_REASON_FILTER (1 << 2) 438be986824SAnup Patel #define KVM_MSR_EXIT_REASON_VALID_MASK (KVM_MSR_EXIT_REASON_INVAL | \ 439be986824SAnup Patel KVM_MSR_EXIT_REASON_UNKNOWN | \ 440be986824SAnup Patel KVM_MSR_EXIT_REASON_FILTER) 4415968b5ffSAnup Patel __u32 reason; /* kernel -> user */ 4425968b5ffSAnup Patel __u32 index; /* kernel -> user */ 4435968b5ffSAnup Patel __u64 data; /* kernel <-> user */ 4445968b5ffSAnup Patel } msr; 4455968b5ffSAnup Patel /* KVM_EXIT_XEN */ 4465968b5ffSAnup Patel struct kvm_xen_exit xen; 4475968b5ffSAnup Patel /* KVM_EXIT_RISCV_SBI */ 4485968b5ffSAnup Patel struct { 4495968b5ffSAnup Patel unsigned long extension_id; 4505968b5ffSAnup Patel unsigned long function_id; 4515968b5ffSAnup Patel unsigned long args[6]; 4525968b5ffSAnup Patel unsigned long ret[2]; 4535968b5ffSAnup Patel } riscv_sbi; 4548d0facecSAnup Patel /* KVM_EXIT_RISCV_CSR */ 4558d0facecSAnup Patel struct { 4568d0facecSAnup Patel unsigned long csr_num; 4578d0facecSAnup Patel unsigned long new_value; 4588d0facecSAnup Patel unsigned long write_mask; 4598d0facecSAnup Patel unsigned long ret_value; 4608d0facecSAnup Patel } riscv_csr; 4618d0facecSAnup Patel /* KVM_EXIT_NOTIFY */ 4628d0facecSAnup Patel struct { 4638d0facecSAnup Patel #define KVM_NOTIFY_CONTEXT_INVALID (1 << 0) 4648d0facecSAnup Patel __u32 flags; 4658d0facecSAnup Patel } notify; 466*99684681SAnup Patel /* KVM_EXIT_MEMORY_FAULT */ 467*99684681SAnup Patel struct { 468*99684681SAnup Patel #define KVM_MEMORY_EXIT_FLAG_PRIVATE (1ULL << 3) 469*99684681SAnup Patel __u64 flags; 470*99684681SAnup Patel __u64 gpa; 471*99684681SAnup Patel __u64 size; 472*99684681SAnup Patel } memory_fault; 473304dcb64SAndre Przywara /* Fix the size of the union. */ 474304dcb64SAndre Przywara char padding[256]; 475304dcb64SAndre Przywara }; 476304dcb64SAndre Przywara 4771bbe92f5SDave Martin /* 2048 is the size of the char array used to bound/pad the size 4781bbe92f5SDave Martin * of the union that holds sync regs. 4791bbe92f5SDave Martin */ 4801bbe92f5SDave Martin #define SYNC_REGS_SIZE_BYTES 2048 481304dcb64SAndre Przywara /* 482304dcb64SAndre Przywara * shared registers between kvm and userspace. 483304dcb64SAndre Przywara * kvm_valid_regs specifies the register classes set by the host 484304dcb64SAndre Przywara * kvm_dirty_regs specified the register classes dirtied by userspace 485304dcb64SAndre Przywara * struct kvm_sync_regs is architecture specific, as well as the 486304dcb64SAndre Przywara * bits for kvm_valid_regs and kvm_dirty_regs 487304dcb64SAndre Przywara */ 488304dcb64SAndre Przywara __u64 kvm_valid_regs; 489304dcb64SAndre Przywara __u64 kvm_dirty_regs; 490304dcb64SAndre Przywara union { 491304dcb64SAndre Przywara struct kvm_sync_regs regs; 4921bbe92f5SDave Martin char padding[SYNC_REGS_SIZE_BYTES]; 493304dcb64SAndre Przywara } s; 494304dcb64SAndre Przywara }; 495304dcb64SAndre Przywara 496304dcb64SAndre Przywara /* for KVM_REGISTER_COALESCED_MMIO / KVM_UNREGISTER_COALESCED_MMIO */ 497304dcb64SAndre Przywara 498304dcb64SAndre Przywara struct kvm_coalesced_mmio_zone { 499304dcb64SAndre Przywara __u64 addr; 500304dcb64SAndre Przywara __u32 size; 5011bbe92f5SDave Martin union { 502304dcb64SAndre Przywara __u32 pad; 5031bbe92f5SDave Martin __u32 pio; 5041bbe92f5SDave Martin }; 505304dcb64SAndre Przywara }; 506304dcb64SAndre Przywara 507304dcb64SAndre Przywara struct kvm_coalesced_mmio { 508304dcb64SAndre Przywara __u64 phys_addr; 509304dcb64SAndre Przywara __u32 len; 5101bbe92f5SDave Martin union { 511304dcb64SAndre Przywara __u32 pad; 5121bbe92f5SDave Martin __u32 pio; 5131bbe92f5SDave Martin }; 514304dcb64SAndre Przywara __u8 data[8]; 515304dcb64SAndre Przywara }; 516304dcb64SAndre Przywara 517304dcb64SAndre Przywara struct kvm_coalesced_mmio_ring { 518304dcb64SAndre Przywara __u32 first, last; 5198d0facecSAnup Patel struct kvm_coalesced_mmio coalesced_mmio[]; 520304dcb64SAndre Przywara }; 521304dcb64SAndre Przywara 522304dcb64SAndre Przywara #define KVM_COALESCED_MMIO_MAX \ 523304dcb64SAndre Przywara ((PAGE_SIZE - sizeof(struct kvm_coalesced_mmio_ring)) / \ 524304dcb64SAndre Przywara sizeof(struct kvm_coalesced_mmio)) 525304dcb64SAndre Przywara 526304dcb64SAndre Przywara /* for KVM_TRANSLATE */ 527304dcb64SAndre Przywara struct kvm_translation { 528304dcb64SAndre Przywara /* in */ 529304dcb64SAndre Przywara __u64 linear_address; 530304dcb64SAndre Przywara 531304dcb64SAndre Przywara /* out */ 532304dcb64SAndre Przywara __u64 physical_address; 533304dcb64SAndre Przywara __u8 valid; 534304dcb64SAndre Przywara __u8 writeable; 535304dcb64SAndre Przywara __u8 usermode; 536304dcb64SAndre Przywara __u8 pad[5]; 537304dcb64SAndre Przywara }; 538304dcb64SAndre Przywara 539304dcb64SAndre Przywara /* for KVM_S390_MEM_OP */ 540304dcb64SAndre Przywara struct kvm_s390_mem_op { 541304dcb64SAndre Przywara /* in */ 542304dcb64SAndre Przywara __u64 gaddr; /* the guest address */ 543304dcb64SAndre Przywara __u64 flags; /* flags */ 544304dcb64SAndre Przywara __u32 size; /* amount of bytes */ 545304dcb64SAndre Przywara __u32 op; /* type of operation */ 546304dcb64SAndre Przywara __u64 buf; /* buffer in userspace */ 5475968b5ffSAnup Patel union { 548083a976eSAlexandru Elisei struct { 549304dcb64SAndre Przywara __u8 ar; /* the access register number */ 550083a976eSAlexandru Elisei __u8 key; /* access key, ignored if flag unset */ 551be986824SAnup Patel __u8 pad1[6]; /* ignored */ 552be986824SAnup Patel __u64 old_addr; /* ignored if cmpxchg flag unset */ 553083a976eSAlexandru Elisei }; 5545968b5ffSAnup Patel __u32 sida_offset; /* offset into the sida */ 555083a976eSAlexandru Elisei __u8 reserved[32]; /* ignored */ 5565968b5ffSAnup Patel }; 557304dcb64SAndre Przywara }; 558304dcb64SAndre Przywara /* types for kvm_s390_mem_op->op */ 559304dcb64SAndre Przywara #define KVM_S390_MEMOP_LOGICAL_READ 0 560304dcb64SAndre Przywara #define KVM_S390_MEMOP_LOGICAL_WRITE 1 5615968b5ffSAnup Patel #define KVM_S390_MEMOP_SIDA_READ 2 5625968b5ffSAnup Patel #define KVM_S390_MEMOP_SIDA_WRITE 3 563083a976eSAlexandru Elisei #define KVM_S390_MEMOP_ABSOLUTE_READ 4 564083a976eSAlexandru Elisei #define KVM_S390_MEMOP_ABSOLUTE_WRITE 5 565be986824SAnup Patel #define KVM_S390_MEMOP_ABSOLUTE_CMPXCHG 6 566be986824SAnup Patel 567304dcb64SAndre Przywara /* flags for kvm_s390_mem_op->flags */ 568304dcb64SAndre Przywara #define KVM_S390_MEMOP_F_CHECK_ONLY (1ULL << 0) 569304dcb64SAndre Przywara #define KVM_S390_MEMOP_F_INJECT_EXCEPTION (1ULL << 1) 570083a976eSAlexandru Elisei #define KVM_S390_MEMOP_F_SKEY_PROTECTION (1ULL << 2) 571304dcb64SAndre Przywara 572be986824SAnup Patel /* flags specifying extension support via KVM_CAP_S390_MEM_OP_EXTENSION */ 573be986824SAnup Patel #define KVM_S390_MEMOP_EXTENSION_CAP_BASE (1 << 0) 574be986824SAnup Patel #define KVM_S390_MEMOP_EXTENSION_CAP_CMPXCHG (1 << 1) 575be986824SAnup Patel 576304dcb64SAndre Przywara /* for KVM_INTERRUPT */ 577304dcb64SAndre Przywara struct kvm_interrupt { 578304dcb64SAndre Przywara /* in */ 579304dcb64SAndre Przywara __u32 irq; 580304dcb64SAndre Przywara }; 581304dcb64SAndre Przywara 582304dcb64SAndre Przywara /* for KVM_GET_DIRTY_LOG */ 583304dcb64SAndre Przywara struct kvm_dirty_log { 584304dcb64SAndre Przywara __u32 slot; 585304dcb64SAndre Przywara __u32 padding1; 586304dcb64SAndre Przywara union { 587304dcb64SAndre Przywara void __user *dirty_bitmap; /* one bit per page */ 588304dcb64SAndre Przywara __u64 padding2; 589304dcb64SAndre Przywara }; 590304dcb64SAndre Przywara }; 591304dcb64SAndre Przywara 5921bbe92f5SDave Martin /* for KVM_CLEAR_DIRTY_LOG */ 5931bbe92f5SDave Martin struct kvm_clear_dirty_log { 5941bbe92f5SDave Martin __u32 slot; 5951bbe92f5SDave Martin __u32 num_pages; 5961bbe92f5SDave Martin __u64 first_page; 5971bbe92f5SDave Martin union { 5981bbe92f5SDave Martin void __user *dirty_bitmap; /* one bit per page */ 5991bbe92f5SDave Martin __u64 padding2; 6001bbe92f5SDave Martin }; 6011bbe92f5SDave Martin }; 6021bbe92f5SDave Martin 603304dcb64SAndre Przywara /* for KVM_SET_SIGNAL_MASK */ 604304dcb64SAndre Przywara struct kvm_signal_mask { 605304dcb64SAndre Przywara __u32 len; 6068d0facecSAnup Patel __u8 sigset[]; 607304dcb64SAndre Przywara }; 608304dcb64SAndre Przywara 609304dcb64SAndre Przywara /* for KVM_TPR_ACCESS_REPORTING */ 610304dcb64SAndre Przywara struct kvm_tpr_access_ctl { 611304dcb64SAndre Przywara __u32 enabled; 612304dcb64SAndre Przywara __u32 flags; 613304dcb64SAndre Przywara __u32 reserved[8]; 614304dcb64SAndre Przywara }; 615304dcb64SAndre Przywara 616304dcb64SAndre Przywara /* for KVM_SET_VAPIC_ADDR */ 617304dcb64SAndre Przywara struct kvm_vapic_addr { 618304dcb64SAndre Przywara __u64 vapic_addr; 619304dcb64SAndre Przywara }; 620304dcb64SAndre Przywara 621304dcb64SAndre Przywara /* for KVM_SET_MP_STATE */ 622304dcb64SAndre Przywara 623304dcb64SAndre Przywara /* not all states are valid on all architectures */ 624304dcb64SAndre Przywara #define KVM_MP_STATE_RUNNABLE 0 625304dcb64SAndre Przywara #define KVM_MP_STATE_UNINITIALIZED 1 626304dcb64SAndre Przywara #define KVM_MP_STATE_INIT_RECEIVED 2 627304dcb64SAndre Przywara #define KVM_MP_STATE_HALTED 3 628304dcb64SAndre Przywara #define KVM_MP_STATE_SIPI_RECEIVED 4 629304dcb64SAndre Przywara #define KVM_MP_STATE_STOPPED 5 630304dcb64SAndre Przywara #define KVM_MP_STATE_CHECK_STOP 6 631304dcb64SAndre Przywara #define KVM_MP_STATE_OPERATING 7 632304dcb64SAndre Przywara #define KVM_MP_STATE_LOAD 8 6335968b5ffSAnup Patel #define KVM_MP_STATE_AP_RESET_HOLD 9 6348d0facecSAnup Patel #define KVM_MP_STATE_SUSPENDED 10 635304dcb64SAndre Przywara 636304dcb64SAndre Przywara struct kvm_mp_state { 637304dcb64SAndre Przywara __u32 mp_state; 638304dcb64SAndre Przywara }; 639304dcb64SAndre Przywara 640304dcb64SAndre Przywara struct kvm_s390_psw { 641304dcb64SAndre Przywara __u64 mask; 642304dcb64SAndre Przywara __u64 addr; 643304dcb64SAndre Przywara }; 644304dcb64SAndre Przywara 645304dcb64SAndre Przywara /* valid values for type in kvm_s390_interrupt */ 646304dcb64SAndre Przywara #define KVM_S390_SIGP_STOP 0xfffe0000u 647304dcb64SAndre Przywara #define KVM_S390_PROGRAM_INT 0xfffe0001u 648304dcb64SAndre Przywara #define KVM_S390_SIGP_SET_PREFIX 0xfffe0002u 649304dcb64SAndre Przywara #define KVM_S390_RESTART 0xfffe0003u 650304dcb64SAndre Przywara #define KVM_S390_INT_PFAULT_INIT 0xfffe0004u 651304dcb64SAndre Przywara #define KVM_S390_INT_PFAULT_DONE 0xfffe0005u 652304dcb64SAndre Przywara #define KVM_S390_MCHK 0xfffe1000u 653304dcb64SAndre Przywara #define KVM_S390_INT_CLOCK_COMP 0xffff1004u 654304dcb64SAndre Przywara #define KVM_S390_INT_CPU_TIMER 0xffff1005u 655304dcb64SAndre Przywara #define KVM_S390_INT_VIRTIO 0xffff2603u 656304dcb64SAndre Przywara #define KVM_S390_INT_SERVICE 0xffff2401u 657304dcb64SAndre Przywara #define KVM_S390_INT_EMERGENCY 0xffff1201u 658304dcb64SAndre Przywara #define KVM_S390_INT_EXTERNAL_CALL 0xffff1202u 659304dcb64SAndre Przywara /* Anything below 0xfffe0000u is taken by INT_IO */ 660304dcb64SAndre Przywara #define KVM_S390_INT_IO(ai,cssid,ssid,schid) \ 661304dcb64SAndre Przywara (((schid)) | \ 662304dcb64SAndre Przywara ((ssid) << 16) | \ 663304dcb64SAndre Przywara ((cssid) << 18) | \ 664304dcb64SAndre Przywara ((ai) << 26)) 665304dcb64SAndre Przywara #define KVM_S390_INT_IO_MIN 0x00000000u 666304dcb64SAndre Przywara #define KVM_S390_INT_IO_MAX 0xfffdffffu 667b3f606e1SMarc Zyngier #define KVM_S390_INT_IO_AI_MASK 0x04000000u 668304dcb64SAndre Przywara 669304dcb64SAndre Przywara 670304dcb64SAndre Przywara struct kvm_s390_interrupt { 671304dcb64SAndre Przywara __u32 type; 672304dcb64SAndre Przywara __u32 parm; 673304dcb64SAndre Przywara __u64 parm64; 674304dcb64SAndre Przywara }; 675304dcb64SAndre Przywara 676304dcb64SAndre Przywara struct kvm_s390_io_info { 677304dcb64SAndre Przywara __u16 subchannel_id; 678304dcb64SAndre Przywara __u16 subchannel_nr; 679304dcb64SAndre Przywara __u32 io_int_parm; 680304dcb64SAndre Przywara __u32 io_int_word; 681304dcb64SAndre Przywara }; 682304dcb64SAndre Przywara 683304dcb64SAndre Przywara struct kvm_s390_ext_info { 684304dcb64SAndre Przywara __u32 ext_params; 685304dcb64SAndre Przywara __u32 pad; 686304dcb64SAndre Przywara __u64 ext_params2; 687304dcb64SAndre Przywara }; 688304dcb64SAndre Przywara 689304dcb64SAndre Przywara struct kvm_s390_pgm_info { 690304dcb64SAndre Przywara __u64 trans_exc_code; 691304dcb64SAndre Przywara __u64 mon_code; 692304dcb64SAndre Przywara __u64 per_address; 693304dcb64SAndre Przywara __u32 data_exc_code; 694304dcb64SAndre Przywara __u16 code; 695304dcb64SAndre Przywara __u16 mon_class_nr; 696304dcb64SAndre Przywara __u8 per_code; 697304dcb64SAndre Przywara __u8 per_atmid; 698304dcb64SAndre Przywara __u8 exc_access_id; 699304dcb64SAndre Przywara __u8 per_access_id; 700304dcb64SAndre Przywara __u8 op_access_id; 701b37ed70eSAndre Przywara #define KVM_S390_PGM_FLAGS_ILC_VALID 0x01 702b37ed70eSAndre Przywara #define KVM_S390_PGM_FLAGS_ILC_0 0x02 703b37ed70eSAndre Przywara #define KVM_S390_PGM_FLAGS_ILC_1 0x04 704b37ed70eSAndre Przywara #define KVM_S390_PGM_FLAGS_ILC_MASK 0x06 705b37ed70eSAndre Przywara #define KVM_S390_PGM_FLAGS_NO_REWIND 0x08 706b37ed70eSAndre Przywara __u8 flags; 707b37ed70eSAndre Przywara __u8 pad[2]; 708304dcb64SAndre Przywara }; 709304dcb64SAndre Przywara 710304dcb64SAndre Przywara struct kvm_s390_prefix_info { 711304dcb64SAndre Przywara __u32 address; 712304dcb64SAndre Przywara }; 713304dcb64SAndre Przywara 714304dcb64SAndre Przywara struct kvm_s390_extcall_info { 715304dcb64SAndre Przywara __u16 code; 716304dcb64SAndre Przywara }; 717304dcb64SAndre Przywara 718304dcb64SAndre Przywara struct kvm_s390_emerg_info { 719304dcb64SAndre Przywara __u16 code; 720304dcb64SAndre Przywara }; 721304dcb64SAndre Przywara 722304dcb64SAndre Przywara #define KVM_S390_STOP_FLAG_STORE_STATUS 0x01 723304dcb64SAndre Przywara struct kvm_s390_stop_info { 724304dcb64SAndre Przywara __u32 flags; 725304dcb64SAndre Przywara }; 726304dcb64SAndre Przywara 727304dcb64SAndre Przywara struct kvm_s390_mchk_info { 728304dcb64SAndre Przywara __u64 cr14; 729304dcb64SAndre Przywara __u64 mcic; 730304dcb64SAndre Przywara __u64 failing_storage_address; 731304dcb64SAndre Przywara __u32 ext_damage_code; 732304dcb64SAndre Przywara __u32 pad; 733304dcb64SAndre Przywara __u8 fixed_logout[16]; 734304dcb64SAndre Przywara }; 735304dcb64SAndre Przywara 736304dcb64SAndre Przywara struct kvm_s390_irq { 737304dcb64SAndre Przywara __u64 type; 738304dcb64SAndre Przywara union { 739304dcb64SAndre Przywara struct kvm_s390_io_info io; 740304dcb64SAndre Przywara struct kvm_s390_ext_info ext; 741304dcb64SAndre Przywara struct kvm_s390_pgm_info pgm; 742304dcb64SAndre Przywara struct kvm_s390_emerg_info emerg; 743304dcb64SAndre Przywara struct kvm_s390_extcall_info extcall; 744304dcb64SAndre Przywara struct kvm_s390_prefix_info prefix; 745304dcb64SAndre Przywara struct kvm_s390_stop_info stop; 746304dcb64SAndre Przywara struct kvm_s390_mchk_info mchk; 747304dcb64SAndre Przywara char reserved[64]; 748304dcb64SAndre Przywara } u; 749304dcb64SAndre Przywara }; 750304dcb64SAndre Przywara 751304dcb64SAndre Przywara struct kvm_s390_irq_state { 752304dcb64SAndre Przywara __u64 buf; 7531bbe92f5SDave Martin __u32 flags; /* will stay unused for compatibility reasons */ 754304dcb64SAndre Przywara __u32 len; 7551bbe92f5SDave Martin __u32 reserved[4]; /* will stay unused for compatibility reasons */ 756304dcb64SAndre Przywara }; 757304dcb64SAndre Przywara 758304dcb64SAndre Przywara /* for KVM_SET_GUEST_DEBUG */ 759304dcb64SAndre Przywara 760304dcb64SAndre Przywara #define KVM_GUESTDBG_ENABLE 0x00000001 761304dcb64SAndre Przywara #define KVM_GUESTDBG_SINGLESTEP 0x00000002 762304dcb64SAndre Przywara 763304dcb64SAndre Przywara struct kvm_guest_debug { 764304dcb64SAndre Przywara __u32 control; 765304dcb64SAndre Przywara __u32 pad; 766304dcb64SAndre Przywara struct kvm_guest_debug_arch arch; 767304dcb64SAndre Przywara }; 768304dcb64SAndre Przywara 769304dcb64SAndre Przywara enum { 770304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_datamatch, 771304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_pio, 772304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_deassign, 773304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_virtio_ccw_notify, 774304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_fast_mmio, 775304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_max, 776304dcb64SAndre Przywara }; 777304dcb64SAndre Przywara 778304dcb64SAndre Przywara #define KVM_IOEVENTFD_FLAG_DATAMATCH (1 << kvm_ioeventfd_flag_nr_datamatch) 779304dcb64SAndre Przywara #define KVM_IOEVENTFD_FLAG_PIO (1 << kvm_ioeventfd_flag_nr_pio) 780304dcb64SAndre Przywara #define KVM_IOEVENTFD_FLAG_DEASSIGN (1 << kvm_ioeventfd_flag_nr_deassign) 781304dcb64SAndre Przywara #define KVM_IOEVENTFD_FLAG_VIRTIO_CCW_NOTIFY \ 782304dcb64SAndre Przywara (1 << kvm_ioeventfd_flag_nr_virtio_ccw_notify) 783304dcb64SAndre Przywara 784304dcb64SAndre Przywara #define KVM_IOEVENTFD_VALID_FLAG_MASK ((1 << kvm_ioeventfd_flag_nr_max) - 1) 785304dcb64SAndre Przywara 786304dcb64SAndre Przywara struct kvm_ioeventfd { 787304dcb64SAndre Przywara __u64 datamatch; 788304dcb64SAndre Przywara __u64 addr; /* legal pio/mmio address */ 789304dcb64SAndre Przywara __u32 len; /* 1, 2, 4, or 8 bytes; or 0 to ignore length */ 790304dcb64SAndre Przywara __s32 fd; 791304dcb64SAndre Przywara __u32 flags; 792304dcb64SAndre Przywara __u8 pad[36]; 793304dcb64SAndre Przywara }; 794304dcb64SAndre Przywara 7951bbe92f5SDave Martin #define KVM_X86_DISABLE_EXITS_MWAIT (1 << 0) 7961bbe92f5SDave Martin #define KVM_X86_DISABLE_EXITS_HLT (1 << 1) 7971bbe92f5SDave Martin #define KVM_X86_DISABLE_EXITS_PAUSE (1 << 2) 79866b24a33SWill Deacon #define KVM_X86_DISABLE_EXITS_CSTATE (1 << 3) 7991bbe92f5SDave Martin #define KVM_X86_DISABLE_VALID_EXITS (KVM_X86_DISABLE_EXITS_MWAIT | \ 8001bbe92f5SDave Martin KVM_X86_DISABLE_EXITS_HLT | \ 80166b24a33SWill Deacon KVM_X86_DISABLE_EXITS_PAUSE | \ 80266b24a33SWill Deacon KVM_X86_DISABLE_EXITS_CSTATE) 8031bbe92f5SDave Martin 804304dcb64SAndre Przywara /* for KVM_ENABLE_CAP */ 805304dcb64SAndre Przywara struct kvm_enable_cap { 806304dcb64SAndre Przywara /* in */ 807304dcb64SAndre Przywara __u32 cap; 808304dcb64SAndre Przywara __u32 flags; 809304dcb64SAndre Przywara __u64 args[4]; 810304dcb64SAndre Przywara __u8 pad[64]; 811304dcb64SAndre Przywara }; 812304dcb64SAndre Przywara 813304dcb64SAndre Przywara /* for KVM_PPC_GET_PVINFO */ 814764dfba1SAndre Przywara 815764dfba1SAndre Przywara #define KVM_PPC_PVINFO_FLAGS_EV_IDLE (1<<0) 816764dfba1SAndre Przywara 817304dcb64SAndre Przywara struct kvm_ppc_pvinfo { 818304dcb64SAndre Przywara /* out */ 819304dcb64SAndre Przywara __u32 flags; 820304dcb64SAndre Przywara __u32 hcall[4]; 821304dcb64SAndre Przywara __u8 pad[108]; 822304dcb64SAndre Przywara }; 823304dcb64SAndre Przywara 824304dcb64SAndre Przywara /* for KVM_PPC_GET_SMMU_INFO */ 825304dcb64SAndre Przywara #define KVM_PPC_PAGE_SIZES_MAX_SZ 8 826304dcb64SAndre Przywara 827304dcb64SAndre Przywara struct kvm_ppc_one_page_size { 828304dcb64SAndre Przywara __u32 page_shift; /* Page shift (or 0) */ 829304dcb64SAndre Przywara __u32 pte_enc; /* Encoding in the HPTE (>>12) */ 830304dcb64SAndre Przywara }; 831304dcb64SAndre Przywara 832304dcb64SAndre Przywara struct kvm_ppc_one_seg_page_size { 833304dcb64SAndre Przywara __u32 page_shift; /* Base page shift of segment (or 0) */ 834304dcb64SAndre Przywara __u32 slb_enc; /* SLB encoding for BookS */ 835304dcb64SAndre Przywara struct kvm_ppc_one_page_size enc[KVM_PPC_PAGE_SIZES_MAX_SZ]; 836304dcb64SAndre Przywara }; 837304dcb64SAndre Przywara 838304dcb64SAndre Przywara #define KVM_PPC_PAGE_SIZES_REAL 0x00000001 839304dcb64SAndre Przywara #define KVM_PPC_1T_SEGMENTS 0x00000002 8401bbe92f5SDave Martin #define KVM_PPC_NO_HASH 0x00000004 841304dcb64SAndre Przywara 842304dcb64SAndre Przywara struct kvm_ppc_smmu_info { 843304dcb64SAndre Przywara __u64 flags; 844304dcb64SAndre Przywara __u32 slb_size; 8451bbe92f5SDave Martin __u16 data_keys; /* # storage keys supported for data */ 8461bbe92f5SDave Martin __u16 instr_keys; /* # storage keys supported for instructions */ 847304dcb64SAndre Przywara struct kvm_ppc_one_seg_page_size sps[KVM_PPC_PAGE_SIZES_MAX_SZ]; 848304dcb64SAndre Przywara }; 849304dcb64SAndre Przywara 850764dfba1SAndre Przywara /* for KVM_PPC_RESIZE_HPT_{PREPARE,COMMIT} */ 851764dfba1SAndre Przywara struct kvm_ppc_resize_hpt { 852764dfba1SAndre Przywara __u64 flags; 853764dfba1SAndre Przywara __u32 shift; 854764dfba1SAndre Przywara __u32 pad; 855764dfba1SAndre Przywara }; 856304dcb64SAndre Przywara 857304dcb64SAndre Przywara #define KVMIO 0xAE 858304dcb64SAndre Przywara 859304dcb64SAndre Przywara /* machine type bits, to be used as argument to KVM_CREATE_VM */ 860304dcb64SAndre Przywara #define KVM_VM_S390_UCONTROL 1 861304dcb64SAndre Przywara 862304dcb64SAndre Przywara /* on ppc, 0 indicate default, 1 should force HV and 2 PR */ 863304dcb64SAndre Przywara #define KVM_VM_PPC_HV 1 864304dcb64SAndre Przywara #define KVM_VM_PPC_PR 2 865304dcb64SAndre Przywara 8665968b5ffSAnup Patel /* on MIPS, 0 indicates auto, 1 forces VZ ASE, 2 forces trap & emulate */ 8675968b5ffSAnup Patel #define KVM_VM_MIPS_AUTO 0 8681bbe92f5SDave Martin #define KVM_VM_MIPS_VZ 1 8695968b5ffSAnup Patel #define KVM_VM_MIPS_TE 2 8701bbe92f5SDave Martin 871304dcb64SAndre Przywara #define KVM_S390_SIE_PAGE_OFFSET 1 872304dcb64SAndre Przywara 873304dcb64SAndre Przywara /* 8741bbe92f5SDave Martin * On arm64, machine type can be used to request the physical 8751bbe92f5SDave Martin * address size for the VM. Bits[7-0] are reserved for the guest 8761bbe92f5SDave Martin * PA size shift (i.e, log2(PA_Size)). For backward compatibility, 8771bbe92f5SDave Martin * value 0 implies the default IPA size, 40bits. 8781bbe92f5SDave Martin */ 8791bbe92f5SDave Martin #define KVM_VM_TYPE_ARM_IPA_SIZE_MASK 0xffULL 8801bbe92f5SDave Martin #define KVM_VM_TYPE_ARM_IPA_SIZE(x) \ 8811bbe92f5SDave Martin ((x) & KVM_VM_TYPE_ARM_IPA_SIZE_MASK) 8821bbe92f5SDave Martin /* 883304dcb64SAndre Przywara * ioctls for /dev/kvm fds: 884304dcb64SAndre Przywara */ 885304dcb64SAndre Przywara #define KVM_GET_API_VERSION _IO(KVMIO, 0x00) 886304dcb64SAndre Przywara #define KVM_CREATE_VM _IO(KVMIO, 0x01) /* returns a VM fd */ 887304dcb64SAndre Przywara #define KVM_GET_MSR_INDEX_LIST _IOWR(KVMIO, 0x02, struct kvm_msr_list) 888304dcb64SAndre Przywara 889304dcb64SAndre Przywara #define KVM_S390_ENABLE_SIE _IO(KVMIO, 0x06) 890304dcb64SAndre Przywara /* 891304dcb64SAndre Przywara * Check if a kvm extension is available. Argument is extension number, 892304dcb64SAndre Przywara * return is 1 (yes) or 0 (no, sorry). 893304dcb64SAndre Przywara */ 894304dcb64SAndre Przywara #define KVM_CHECK_EXTENSION _IO(KVMIO, 0x03) 895304dcb64SAndre Przywara /* 896304dcb64SAndre Przywara * Get size for mmap(vcpu_fd) 897304dcb64SAndre Przywara */ 898304dcb64SAndre Przywara #define KVM_GET_VCPU_MMAP_SIZE _IO(KVMIO, 0x04) /* in bytes */ 899304dcb64SAndre Przywara #define KVM_GET_SUPPORTED_CPUID _IOWR(KVMIO, 0x05, struct kvm_cpuid2) 900304dcb64SAndre Przywara #define KVM_GET_EMULATED_CPUID _IOWR(KVMIO, 0x09, struct kvm_cpuid2) 9011bbe92f5SDave Martin #define KVM_GET_MSR_FEATURE_INDEX_LIST _IOWR(KVMIO, 0x0a, struct kvm_msr_list) 902304dcb64SAndre Przywara 903304dcb64SAndre Przywara /* 904304dcb64SAndre Przywara * Extension capability list. 905304dcb64SAndre Przywara */ 906304dcb64SAndre Przywara #define KVM_CAP_IRQCHIP 0 907304dcb64SAndre Przywara #define KVM_CAP_HLT 1 908304dcb64SAndre Przywara #define KVM_CAP_MMU_SHADOW_CACHE_CONTROL 2 909304dcb64SAndre Przywara #define KVM_CAP_USER_MEMORY 3 910304dcb64SAndre Przywara #define KVM_CAP_SET_TSS_ADDR 4 911304dcb64SAndre Przywara #define KVM_CAP_VAPIC 6 912304dcb64SAndre Przywara #define KVM_CAP_EXT_CPUID 7 913304dcb64SAndre Przywara #define KVM_CAP_CLOCKSOURCE 8 914304dcb64SAndre Przywara #define KVM_CAP_NR_VCPUS 9 /* returns recommended max vcpus per vm */ 915304dcb64SAndre Przywara #define KVM_CAP_NR_MEMSLOTS 10 /* returns max memory slots per vm */ 916304dcb64SAndre Przywara #define KVM_CAP_PIT 11 917304dcb64SAndre Przywara #define KVM_CAP_NOP_IO_DELAY 12 918304dcb64SAndre Przywara #define KVM_CAP_PV_MMU 13 919304dcb64SAndre Przywara #define KVM_CAP_MP_STATE 14 920304dcb64SAndre Przywara #define KVM_CAP_COALESCED_MMIO 15 921304dcb64SAndre Przywara #define KVM_CAP_SYNC_MMU 16 /* Changes to host mmap are reflected in guest */ 922304dcb64SAndre Przywara #define KVM_CAP_IOMMU 18 923304dcb64SAndre Przywara /* Bug in KVM_SET_USER_MEMORY_REGION fixed: */ 924304dcb64SAndre Przywara #define KVM_CAP_DESTROY_MEMORY_REGION_WORKS 21 925304dcb64SAndre Przywara #define KVM_CAP_USER_NMI 22 926304dcb64SAndre Przywara #ifdef __KVM_HAVE_GUEST_DEBUG 927304dcb64SAndre Przywara #define KVM_CAP_SET_GUEST_DEBUG 23 928304dcb64SAndre Przywara #endif 929304dcb64SAndre Przywara #ifdef __KVM_HAVE_PIT 930304dcb64SAndre Przywara #define KVM_CAP_REINJECT_CONTROL 24 931304dcb64SAndre Przywara #endif 932304dcb64SAndre Przywara #define KVM_CAP_IRQ_ROUTING 25 933304dcb64SAndre Przywara #define KVM_CAP_IRQ_INJECT_STATUS 26 934304dcb64SAndre Przywara #define KVM_CAP_ASSIGN_DEV_IRQ 29 935304dcb64SAndre Przywara /* Another bug in KVM_SET_USER_MEMORY_REGION fixed: */ 936304dcb64SAndre Przywara #define KVM_CAP_JOIN_MEMORY_REGIONS_WORKS 30 937304dcb64SAndre Przywara #ifdef __KVM_HAVE_MCE 938304dcb64SAndre Przywara #define KVM_CAP_MCE 31 939304dcb64SAndre Przywara #endif 940304dcb64SAndre Przywara #define KVM_CAP_IRQFD 32 941304dcb64SAndre Przywara #ifdef __KVM_HAVE_PIT 942304dcb64SAndre Przywara #define KVM_CAP_PIT2 33 943304dcb64SAndre Przywara #endif 944304dcb64SAndre Przywara #define KVM_CAP_SET_BOOT_CPU_ID 34 945304dcb64SAndre Przywara #ifdef __KVM_HAVE_PIT_STATE2 946304dcb64SAndre Przywara #define KVM_CAP_PIT_STATE2 35 947304dcb64SAndre Przywara #endif 948304dcb64SAndre Przywara #define KVM_CAP_IOEVENTFD 36 949304dcb64SAndre Przywara #define KVM_CAP_SET_IDENTITY_MAP_ADDR 37 950304dcb64SAndre Przywara #ifdef __KVM_HAVE_XEN_HVM 951304dcb64SAndre Przywara #define KVM_CAP_XEN_HVM 38 952304dcb64SAndre Przywara #endif 953304dcb64SAndre Przywara #define KVM_CAP_ADJUST_CLOCK 39 954304dcb64SAndre Przywara #define KVM_CAP_INTERNAL_ERROR_DATA 40 955304dcb64SAndre Przywara #ifdef __KVM_HAVE_VCPU_EVENTS 956304dcb64SAndre Przywara #define KVM_CAP_VCPU_EVENTS 41 957304dcb64SAndre Przywara #endif 958304dcb64SAndre Przywara #define KVM_CAP_S390_PSW 42 959304dcb64SAndre Przywara #define KVM_CAP_PPC_SEGSTATE 43 960304dcb64SAndre Przywara #define KVM_CAP_HYPERV 44 961304dcb64SAndre Przywara #define KVM_CAP_HYPERV_VAPIC 45 962304dcb64SAndre Przywara #define KVM_CAP_HYPERV_SPIN 46 963304dcb64SAndre Przywara #define KVM_CAP_PCI_SEGMENT 47 964304dcb64SAndre Przywara #define KVM_CAP_PPC_PAIRED_SINGLES 48 965304dcb64SAndre Przywara #define KVM_CAP_INTR_SHADOW 49 966304dcb64SAndre Przywara #ifdef __KVM_HAVE_DEBUGREGS 967304dcb64SAndre Przywara #define KVM_CAP_DEBUGREGS 50 968304dcb64SAndre Przywara #endif 969304dcb64SAndre Przywara #define KVM_CAP_X86_ROBUST_SINGLESTEP 51 970304dcb64SAndre Przywara #define KVM_CAP_PPC_OSI 52 971304dcb64SAndre Przywara #define KVM_CAP_PPC_UNSET_IRQ 53 972304dcb64SAndre Przywara #define KVM_CAP_ENABLE_CAP 54 973304dcb64SAndre Przywara #ifdef __KVM_HAVE_XSAVE 974304dcb64SAndre Przywara #define KVM_CAP_XSAVE 55 975304dcb64SAndre Przywara #endif 976304dcb64SAndre Przywara #ifdef __KVM_HAVE_XCRS 977304dcb64SAndre Przywara #define KVM_CAP_XCRS 56 978304dcb64SAndre Przywara #endif 979304dcb64SAndre Przywara #define KVM_CAP_PPC_GET_PVINFO 57 980304dcb64SAndre Przywara #define KVM_CAP_PPC_IRQ_LEVEL 58 981304dcb64SAndre Przywara #define KVM_CAP_ASYNC_PF 59 982304dcb64SAndre Przywara #define KVM_CAP_TSC_CONTROL 60 983304dcb64SAndre Przywara #define KVM_CAP_GET_TSC_KHZ 61 984304dcb64SAndre Przywara #define KVM_CAP_PPC_BOOKE_SREGS 62 985304dcb64SAndre Przywara #define KVM_CAP_SPAPR_TCE 63 986304dcb64SAndre Przywara #define KVM_CAP_PPC_SMT 64 987304dcb64SAndre Przywara #define KVM_CAP_PPC_RMA 65 988304dcb64SAndre Przywara #define KVM_CAP_MAX_VCPUS 66 /* returns max vcpus per vm */ 989304dcb64SAndre Przywara #define KVM_CAP_PPC_HIOR 67 990304dcb64SAndre Przywara #define KVM_CAP_PPC_PAPR 68 991304dcb64SAndre Przywara #define KVM_CAP_SW_TLB 69 992304dcb64SAndre Przywara #define KVM_CAP_ONE_REG 70 993304dcb64SAndre Przywara #define KVM_CAP_S390_GMAP 71 994304dcb64SAndre Przywara #define KVM_CAP_TSC_DEADLINE_TIMER 72 995304dcb64SAndre Przywara #define KVM_CAP_S390_UCONTROL 73 996304dcb64SAndre Przywara #define KVM_CAP_SYNC_REGS 74 997304dcb64SAndre Przywara #define KVM_CAP_PCI_2_3 75 998304dcb64SAndre Przywara #define KVM_CAP_KVMCLOCK_CTRL 76 999304dcb64SAndre Przywara #define KVM_CAP_SIGNAL_MSI 77 1000304dcb64SAndre Przywara #define KVM_CAP_PPC_GET_SMMU_INFO 78 1001304dcb64SAndre Przywara #define KVM_CAP_S390_COW 79 1002304dcb64SAndre Przywara #define KVM_CAP_PPC_ALLOC_HTAB 80 1003304dcb64SAndre Przywara #define KVM_CAP_READONLY_MEM 81 1004304dcb64SAndre Przywara #define KVM_CAP_IRQFD_RESAMPLE 82 1005304dcb64SAndre Przywara #define KVM_CAP_PPC_BOOKE_WATCHDOG 83 1006304dcb64SAndre Przywara #define KVM_CAP_PPC_HTAB_FD 84 1007304dcb64SAndre Przywara #define KVM_CAP_S390_CSS_SUPPORT 85 1008304dcb64SAndre Przywara #define KVM_CAP_PPC_EPR 86 1009304dcb64SAndre Przywara #define KVM_CAP_ARM_PSCI 87 1010304dcb64SAndre Przywara #define KVM_CAP_ARM_SET_DEVICE_ADDR 88 1011304dcb64SAndre Przywara #define KVM_CAP_DEVICE_CTRL 89 1012304dcb64SAndre Przywara #define KVM_CAP_IRQ_MPIC 90 1013304dcb64SAndre Przywara #define KVM_CAP_PPC_RTAS 91 1014304dcb64SAndre Przywara #define KVM_CAP_IRQ_XICS 92 1015304dcb64SAndre Przywara #define KVM_CAP_ARM_EL1_32BIT 93 1016304dcb64SAndre Przywara #define KVM_CAP_SPAPR_MULTITCE 94 1017304dcb64SAndre Przywara #define KVM_CAP_EXT_EMUL_CPUID 95 1018304dcb64SAndre Przywara #define KVM_CAP_HYPERV_TIME 96 1019304dcb64SAndre Przywara #define KVM_CAP_IOAPIC_POLARITY_IGNORED 97 1020304dcb64SAndre Przywara #define KVM_CAP_ENABLE_CAP_VM 98 1021304dcb64SAndre Przywara #define KVM_CAP_S390_IRQCHIP 99 1022304dcb64SAndre Przywara #define KVM_CAP_IOEVENTFD_NO_LENGTH 100 1023304dcb64SAndre Przywara #define KVM_CAP_VM_ATTRIBUTES 101 1024304dcb64SAndre Przywara #define KVM_CAP_ARM_PSCI_0_2 102 1025304dcb64SAndre Przywara #define KVM_CAP_PPC_FIXUP_HCALL 103 1026304dcb64SAndre Przywara #define KVM_CAP_PPC_ENABLE_HCALL 104 1027304dcb64SAndre Przywara #define KVM_CAP_CHECK_EXTENSION_VM 105 1028304dcb64SAndre Przywara #define KVM_CAP_S390_USER_SIGP 106 1029304dcb64SAndre Przywara #define KVM_CAP_S390_VECTOR_REGISTERS 107 1030304dcb64SAndre Przywara #define KVM_CAP_S390_MEM_OP 108 1031304dcb64SAndre Przywara #define KVM_CAP_S390_USER_STSI 109 1032304dcb64SAndre Przywara #define KVM_CAP_S390_SKEYS 110 1033304dcb64SAndre Przywara #define KVM_CAP_MIPS_FPU 111 1034304dcb64SAndre Przywara #define KVM_CAP_MIPS_MSA 112 1035304dcb64SAndre Przywara #define KVM_CAP_S390_INJECT_IRQ 113 1036304dcb64SAndre Przywara #define KVM_CAP_S390_IRQ_STATE 114 1037304dcb64SAndre Przywara #define KVM_CAP_PPC_HWRNG 115 1038b3f606e1SMarc Zyngier #define KVM_CAP_DISABLE_QUIRKS 116 1039b3f606e1SMarc Zyngier #define KVM_CAP_X86_SMM 117 1040b3f606e1SMarc Zyngier #define KVM_CAP_MULTI_ADDRESS_SPACE 118 1041b3f606e1SMarc Zyngier #define KVM_CAP_GUEST_DEBUG_HW_BPS 119 1042b3f606e1SMarc Zyngier #define KVM_CAP_GUEST_DEBUG_HW_WPS 120 1043b3f606e1SMarc Zyngier #define KVM_CAP_SPLIT_IRQCHIP 121 1044b3f606e1SMarc Zyngier #define KVM_CAP_IOEVENTFD_ANY_LENGTH 122 1045b3f606e1SMarc Zyngier #define KVM_CAP_HYPERV_SYNIC 123 1046b3f606e1SMarc Zyngier #define KVM_CAP_S390_RI 124 1047b37ed70eSAndre Przywara #define KVM_CAP_SPAPR_TCE_64 125 1048b37ed70eSAndre Przywara #define KVM_CAP_ARM_PMU_V3 126 1049b37ed70eSAndre Przywara #define KVM_CAP_VCPU_ATTRIBUTES 127 1050764dfba1SAndre Przywara #define KVM_CAP_MAX_VCPU_ID 128 1051764dfba1SAndre Przywara #define KVM_CAP_X2APIC_API 129 1052764dfba1SAndre Przywara #define KVM_CAP_S390_USER_INSTR0 130 1053764dfba1SAndre Przywara #define KVM_CAP_MSI_DEVID 131 1054764dfba1SAndre Przywara #define KVM_CAP_PPC_HTM 132 1055764dfba1SAndre Przywara #define KVM_CAP_SPAPR_RESIZE_HPT 133 1056764dfba1SAndre Przywara #define KVM_CAP_PPC_MMU_RADIX 134 1057764dfba1SAndre Przywara #define KVM_CAP_PPC_MMU_HASH_V3 135 1058764dfba1SAndre Przywara #define KVM_CAP_IMMEDIATE_EXIT 136 10591bbe92f5SDave Martin #define KVM_CAP_MIPS_VZ 137 10601bbe92f5SDave Martin #define KVM_CAP_MIPS_TE 138 10611bbe92f5SDave Martin #define KVM_CAP_MIPS_64BIT 139 10621bbe92f5SDave Martin #define KVM_CAP_S390_GS 140 10631bbe92f5SDave Martin #define KVM_CAP_S390_AIS 141 10641bbe92f5SDave Martin #define KVM_CAP_SPAPR_TCE_VFIO 142 10651bbe92f5SDave Martin #define KVM_CAP_X86_DISABLE_EXITS 143 10661bbe92f5SDave Martin #define KVM_CAP_ARM_USER_IRQ 144 10671bbe92f5SDave Martin #define KVM_CAP_S390_CMMA_MIGRATION 145 10681bbe92f5SDave Martin #define KVM_CAP_PPC_FWNMI 146 10691bbe92f5SDave Martin #define KVM_CAP_PPC_SMT_POSSIBLE 147 10701bbe92f5SDave Martin #define KVM_CAP_HYPERV_SYNIC2 148 10711bbe92f5SDave Martin #define KVM_CAP_HYPERV_VP_INDEX 149 10721bbe92f5SDave Martin #define KVM_CAP_S390_AIS_MIGRATION 150 10731bbe92f5SDave Martin #define KVM_CAP_PPC_GET_CPU_CHAR 151 10741bbe92f5SDave Martin #define KVM_CAP_S390_BPB 152 10751bbe92f5SDave Martin #define KVM_CAP_GET_MSR_FEATURES 153 10761bbe92f5SDave Martin #define KVM_CAP_HYPERV_EVENTFD 154 10771bbe92f5SDave Martin #define KVM_CAP_HYPERV_TLBFLUSH 155 10781bbe92f5SDave Martin #define KVM_CAP_S390_HPAGE_1M 156 10791bbe92f5SDave Martin #define KVM_CAP_NESTED_STATE 157 10801bbe92f5SDave Martin #define KVM_CAP_ARM_INJECT_SERROR_ESR 158 10811bbe92f5SDave Martin #define KVM_CAP_MSR_PLATFORM_INFO 159 10821bbe92f5SDave Martin #define KVM_CAP_PPC_NESTED_HV 160 10831bbe92f5SDave Martin #define KVM_CAP_HYPERV_SEND_IPI 161 10841bbe92f5SDave Martin #define KVM_CAP_COALESCED_PIO 162 10851bbe92f5SDave Martin #define KVM_CAP_HYPERV_ENLIGHTENED_VMCS 163 10861bbe92f5SDave Martin #define KVM_CAP_EXCEPTION_PAYLOAD 164 10871bbe92f5SDave Martin #define KVM_CAP_ARM_VM_IPA_SIZE 165 108866b24a33SWill Deacon #define KVM_CAP_MANUAL_DIRTY_LOG_PROTECT 166 /* Obsolete */ 10891bbe92f5SDave Martin #define KVM_CAP_HYPERV_CPUID 167 109066b24a33SWill Deacon #define KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2 168 109166b24a33SWill Deacon #define KVM_CAP_PPC_IRQ_XIVE 169 109266b24a33SWill Deacon #define KVM_CAP_ARM_SVE 170 109366b24a33SWill Deacon #define KVM_CAP_ARM_PTRAUTH_ADDRESS 171 109466b24a33SWill Deacon #define KVM_CAP_ARM_PTRAUTH_GENERIC 172 109566b24a33SWill Deacon #define KVM_CAP_PMU_EVENT_FILTER 173 10965968b5ffSAnup Patel #define KVM_CAP_ARM_IRQ_LINE_LAYOUT_2 174 10975968b5ffSAnup Patel #define KVM_CAP_HYPERV_DIRECT_TLBFLUSH 175 10985968b5ffSAnup Patel #define KVM_CAP_PPC_GUEST_DEBUG_SSTEP 176 10995968b5ffSAnup Patel #define KVM_CAP_ARM_NISV_TO_USER 177 11005968b5ffSAnup Patel #define KVM_CAP_ARM_INJECT_EXT_DABT 178 11015968b5ffSAnup Patel #define KVM_CAP_S390_VCPU_RESETS 179 11025968b5ffSAnup Patel #define KVM_CAP_S390_PROTECTED 180 11035968b5ffSAnup Patel #define KVM_CAP_PPC_SECURE_GUEST 181 11045968b5ffSAnup Patel #define KVM_CAP_HALT_POLL 182 11055968b5ffSAnup Patel #define KVM_CAP_ASYNC_PF_INT 183 11065968b5ffSAnup Patel #define KVM_CAP_LAST_CPU 184 11075968b5ffSAnup Patel #define KVM_CAP_SMALLER_MAXPHYADDR 185 11085968b5ffSAnup Patel #define KVM_CAP_S390_DIAG318 186 11095968b5ffSAnup Patel #define KVM_CAP_STEAL_TIME 187 11105968b5ffSAnup Patel #define KVM_CAP_X86_USER_SPACE_MSR 188 11115968b5ffSAnup Patel #define KVM_CAP_X86_MSR_FILTER 189 11125968b5ffSAnup Patel #define KVM_CAP_ENFORCE_PV_FEATURE_CPUID 190 11135968b5ffSAnup Patel #define KVM_CAP_SYS_HYPERV_CPUID 191 11145968b5ffSAnup Patel #define KVM_CAP_DIRTY_LOG_RING 192 11155968b5ffSAnup Patel #define KVM_CAP_X86_BUS_LOCK_EXIT 193 11165968b5ffSAnup Patel #define KVM_CAP_PPC_DAWR1 194 11175968b5ffSAnup Patel #define KVM_CAP_SET_GUEST_DEBUG2 195 11185968b5ffSAnup Patel #define KVM_CAP_SGX_ATTRIBUTE 196 11195968b5ffSAnup Patel #define KVM_CAP_VM_COPY_ENC_CONTEXT_FROM 197 11205968b5ffSAnup Patel #define KVM_CAP_PTP_KVM 198 11215968b5ffSAnup Patel #define KVM_CAP_HYPERV_ENFORCE_CPUID 199 11225968b5ffSAnup Patel #define KVM_CAP_SREGS2 200 11235968b5ffSAnup Patel #define KVM_CAP_EXIT_HYPERCALL 201 11245968b5ffSAnup Patel #define KVM_CAP_PPC_RPT_INVALIDATE 202 11255968b5ffSAnup Patel #define KVM_CAP_BINARY_STATS_FD 203 11265968b5ffSAnup Patel #define KVM_CAP_EXIT_ON_EMULATION_FAILURE 204 11275968b5ffSAnup Patel #define KVM_CAP_ARM_MTE 205 11285968b5ffSAnup Patel #define KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM 206 1129af1b793cSAlexandru Elisei #define KVM_CAP_VM_GPA_BITS 207 1130af1b793cSAlexandru Elisei #define KVM_CAP_XSAVE2 208 1131af1b793cSAlexandru Elisei #define KVM_CAP_SYS_ATTRIBUTES 209 1132af1b793cSAlexandru Elisei #define KVM_CAP_PPC_AIL_MODE_3 210 1133083a976eSAlexandru Elisei #define KVM_CAP_S390_MEM_OP_EXTENSION 211 1134083a976eSAlexandru Elisei #define KVM_CAP_PMU_CAPABILITY 212 1135083a976eSAlexandru Elisei #define KVM_CAP_DISABLE_QUIRKS2 213 11368d0facecSAnup Patel #define KVM_CAP_VM_TSC_CONTROL 214 11378d0facecSAnup Patel #define KVM_CAP_SYSTEM_EVENT_DATA 215 11388d0facecSAnup Patel #define KVM_CAP_ARM_SYSTEM_SUSPEND 216 11398d0facecSAnup Patel #define KVM_CAP_S390_PROTECTED_DUMP 217 11408d0facecSAnup Patel #define KVM_CAP_X86_TRIPLE_FAULT_EVENT 218 11418d0facecSAnup Patel #define KVM_CAP_X86_NOTIFY_VMEXIT 219 11428d0facecSAnup Patel #define KVM_CAP_VM_DISABLE_NX_HUGE_PAGES 220 11438d0facecSAnup Patel #define KVM_CAP_S390_ZPCI_OP 221 11448d0facecSAnup Patel #define KVM_CAP_S390_CPU_TOPOLOGY 222 114576dfc0cfSAnup Patel #define KVM_CAP_DIRTY_LOG_RING_ACQ_REL 223 1146be986824SAnup Patel #define KVM_CAP_S390_PROTECTED_ASYNC_DISABLE 224 1147be986824SAnup Patel #define KVM_CAP_DIRTY_LOG_RING_WITH_BITMAP 225 1148be986824SAnup Patel #define KVM_CAP_PMU_EVENT_MASKED_EVENTS 226 1149be986824SAnup Patel #define KVM_CAP_COUNTER_OFFSET 227 115026c85896SAnup Patel #define KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE 228 115126c85896SAnup Patel #define KVM_CAP_ARM_SUPPORTED_BLOCK_SIZES 229 115292ef2dcdSWill Deacon #define KVM_CAP_ARM_SUPPORTED_REG_MASK_RANGES 230 1153*99684681SAnup Patel #define KVM_CAP_USER_MEMORY2 231 1154*99684681SAnup Patel #define KVM_CAP_MEMORY_FAULT_INFO 232 1155*99684681SAnup Patel #define KVM_CAP_MEMORY_ATTRIBUTES 233 1156*99684681SAnup Patel #define KVM_CAP_GUEST_MEMFD 234 1157*99684681SAnup Patel #define KVM_CAP_VM_TYPES 235 1158304dcb64SAndre Przywara 1159304dcb64SAndre Przywara #ifdef KVM_CAP_IRQ_ROUTING 1160304dcb64SAndre Przywara 1161304dcb64SAndre Przywara struct kvm_irq_routing_irqchip { 1162304dcb64SAndre Przywara __u32 irqchip; 1163304dcb64SAndre Przywara __u32 pin; 1164304dcb64SAndre Przywara }; 1165304dcb64SAndre Przywara 1166304dcb64SAndre Przywara struct kvm_irq_routing_msi { 1167304dcb64SAndre Przywara __u32 address_lo; 1168304dcb64SAndre Przywara __u32 address_hi; 1169304dcb64SAndre Przywara __u32 data; 1170764dfba1SAndre Przywara union { 1171304dcb64SAndre Przywara __u32 pad; 1172764dfba1SAndre Przywara __u32 devid; 1173764dfba1SAndre Przywara }; 1174304dcb64SAndre Przywara }; 1175304dcb64SAndre Przywara 1176304dcb64SAndre Przywara struct kvm_irq_routing_s390_adapter { 1177304dcb64SAndre Przywara __u64 ind_addr; 1178304dcb64SAndre Przywara __u64 summary_addr; 1179304dcb64SAndre Przywara __u64 ind_offset; 1180304dcb64SAndre Przywara __u32 summary_offset; 1181304dcb64SAndre Przywara __u32 adapter_id; 1182304dcb64SAndre Przywara }; 1183304dcb64SAndre Przywara 1184b3f606e1SMarc Zyngier struct kvm_irq_routing_hv_sint { 1185b3f606e1SMarc Zyngier __u32 vcpu; 1186b3f606e1SMarc Zyngier __u32 sint; 1187b3f606e1SMarc Zyngier }; 1188b3f606e1SMarc Zyngier 1189af1b793cSAlexandru Elisei struct kvm_irq_routing_xen_evtchn { 1190af1b793cSAlexandru Elisei __u32 port; 1191af1b793cSAlexandru Elisei __u32 vcpu; 1192af1b793cSAlexandru Elisei __u32 priority; 1193af1b793cSAlexandru Elisei }; 1194af1b793cSAlexandru Elisei 1195af1b793cSAlexandru Elisei #define KVM_IRQ_ROUTING_XEN_EVTCHN_PRIO_2LEVEL ((__u32)(-1)) 1196af1b793cSAlexandru Elisei 1197304dcb64SAndre Przywara /* gsi routing entry types */ 1198304dcb64SAndre Przywara #define KVM_IRQ_ROUTING_IRQCHIP 1 1199304dcb64SAndre Przywara #define KVM_IRQ_ROUTING_MSI 2 1200304dcb64SAndre Przywara #define KVM_IRQ_ROUTING_S390_ADAPTER 3 1201b3f606e1SMarc Zyngier #define KVM_IRQ_ROUTING_HV_SINT 4 1202af1b793cSAlexandru Elisei #define KVM_IRQ_ROUTING_XEN_EVTCHN 5 1203304dcb64SAndre Przywara 1204304dcb64SAndre Przywara struct kvm_irq_routing_entry { 1205304dcb64SAndre Przywara __u32 gsi; 1206304dcb64SAndre Przywara __u32 type; 1207304dcb64SAndre Przywara __u32 flags; 1208304dcb64SAndre Przywara __u32 pad; 1209304dcb64SAndre Przywara union { 1210304dcb64SAndre Przywara struct kvm_irq_routing_irqchip irqchip; 1211304dcb64SAndre Przywara struct kvm_irq_routing_msi msi; 1212304dcb64SAndre Przywara struct kvm_irq_routing_s390_adapter adapter; 1213b3f606e1SMarc Zyngier struct kvm_irq_routing_hv_sint hv_sint; 1214af1b793cSAlexandru Elisei struct kvm_irq_routing_xen_evtchn xen_evtchn; 1215304dcb64SAndre Przywara __u32 pad[8]; 1216304dcb64SAndre Przywara } u; 1217304dcb64SAndre Przywara }; 1218304dcb64SAndre Przywara 1219304dcb64SAndre Przywara struct kvm_irq_routing { 1220304dcb64SAndre Przywara __u32 nr; 1221304dcb64SAndre Przywara __u32 flags; 12228d0facecSAnup Patel struct kvm_irq_routing_entry entries[]; 1223304dcb64SAndre Przywara }; 1224304dcb64SAndre Przywara 1225304dcb64SAndre Przywara #endif 1226304dcb64SAndre Przywara 1227304dcb64SAndre Przywara #ifdef KVM_CAP_MCE 1228304dcb64SAndre Przywara /* x86 MCE */ 1229304dcb64SAndre Przywara struct kvm_x86_mce { 1230304dcb64SAndre Przywara __u64 status; 1231304dcb64SAndre Przywara __u64 addr; 1232304dcb64SAndre Przywara __u64 misc; 1233304dcb64SAndre Przywara __u64 mcg_status; 1234304dcb64SAndre Przywara __u8 bank; 1235304dcb64SAndre Przywara __u8 pad1[7]; 1236304dcb64SAndre Przywara __u64 pad2[3]; 1237304dcb64SAndre Przywara }; 1238304dcb64SAndre Przywara #endif 1239304dcb64SAndre Przywara 1240304dcb64SAndre Przywara #ifdef KVM_CAP_XEN_HVM 12415968b5ffSAnup Patel #define KVM_XEN_HVM_CONFIG_HYPERCALL_MSR (1 << 0) 12425968b5ffSAnup Patel #define KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL (1 << 1) 12435968b5ffSAnup Patel #define KVM_XEN_HVM_CONFIG_SHARED_INFO (1 << 2) 12445968b5ffSAnup Patel #define KVM_XEN_HVM_CONFIG_RUNSTATE (1 << 3) 1245af1b793cSAlexandru Elisei #define KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL (1 << 4) 12468d0facecSAnup Patel #define KVM_XEN_HVM_CONFIG_EVTCHN_SEND (1 << 5) 1247be986824SAnup Patel #define KVM_XEN_HVM_CONFIG_RUNSTATE_UPDATE_FLAG (1 << 6) 1248*99684681SAnup Patel #define KVM_XEN_HVM_CONFIG_PVCLOCK_TSC_UNSTABLE (1 << 7) 12495968b5ffSAnup Patel 1250304dcb64SAndre Przywara struct kvm_xen_hvm_config { 1251304dcb64SAndre Przywara __u32 flags; 1252304dcb64SAndre Przywara __u32 msr; 1253304dcb64SAndre Przywara __u64 blob_addr_32; 1254304dcb64SAndre Przywara __u64 blob_addr_64; 1255304dcb64SAndre Przywara __u8 blob_size_32; 1256304dcb64SAndre Przywara __u8 blob_size_64; 1257304dcb64SAndre Przywara __u8 pad2[30]; 1258304dcb64SAndre Przywara }; 1259304dcb64SAndre Przywara #endif 1260304dcb64SAndre Przywara 1261304dcb64SAndre Przywara #define KVM_IRQFD_FLAG_DEASSIGN (1 << 0) 1262304dcb64SAndre Przywara /* 1263304dcb64SAndre Przywara * Available with KVM_CAP_IRQFD_RESAMPLE 1264304dcb64SAndre Przywara * 1265304dcb64SAndre Przywara * KVM_IRQFD_FLAG_RESAMPLE indicates resamplefd is valid and specifies 1266304dcb64SAndre Przywara * the irqfd to operate in resampling mode for level triggered interrupt 12675968b5ffSAnup Patel * emulation. See Documentation/virt/kvm/api.rst. 1268304dcb64SAndre Przywara */ 1269304dcb64SAndre Przywara #define KVM_IRQFD_FLAG_RESAMPLE (1 << 1) 1270304dcb64SAndre Przywara 1271304dcb64SAndre Przywara struct kvm_irqfd { 1272304dcb64SAndre Przywara __u32 fd; 1273304dcb64SAndre Przywara __u32 gsi; 1274304dcb64SAndre Przywara __u32 flags; 1275304dcb64SAndre Przywara __u32 resamplefd; 1276304dcb64SAndre Przywara __u8 pad[16]; 1277304dcb64SAndre Przywara }; 1278304dcb64SAndre Przywara 1279764dfba1SAndre Przywara /* For KVM_CAP_ADJUST_CLOCK */ 1280764dfba1SAndre Przywara 1281764dfba1SAndre Przywara /* Do not use 1, KVM_CHECK_EXTENSION returned it before we had flags. */ 1282764dfba1SAndre Przywara #define KVM_CLOCK_TSC_STABLE 2 12835968b5ffSAnup Patel #define KVM_CLOCK_REALTIME (1 << 2) 12845968b5ffSAnup Patel #define KVM_CLOCK_HOST_TSC (1 << 3) 1285764dfba1SAndre Przywara 1286304dcb64SAndre Przywara struct kvm_clock_data { 1287304dcb64SAndre Przywara __u64 clock; 1288304dcb64SAndre Przywara __u32 flags; 12895968b5ffSAnup Patel __u32 pad0; 12905968b5ffSAnup Patel __u64 realtime; 12915968b5ffSAnup Patel __u64 host_tsc; 12925968b5ffSAnup Patel __u32 pad[4]; 1293304dcb64SAndre Przywara }; 1294304dcb64SAndre Przywara 1295764dfba1SAndre Przywara /* For KVM_CAP_SW_TLB */ 1296764dfba1SAndre Przywara 1297304dcb64SAndre Przywara #define KVM_MMU_FSL_BOOKE_NOHV 0 1298304dcb64SAndre Przywara #define KVM_MMU_FSL_BOOKE_HV 1 1299304dcb64SAndre Przywara 1300304dcb64SAndre Przywara struct kvm_config_tlb { 1301304dcb64SAndre Przywara __u64 params; 1302304dcb64SAndre Przywara __u64 array; 1303304dcb64SAndre Przywara __u32 mmu_type; 1304304dcb64SAndre Przywara __u32 array_len; 1305304dcb64SAndre Przywara }; 1306304dcb64SAndre Przywara 1307304dcb64SAndre Przywara struct kvm_dirty_tlb { 1308304dcb64SAndre Przywara __u64 bitmap; 1309304dcb64SAndre Przywara __u32 num_dirty; 1310304dcb64SAndre Przywara }; 1311304dcb64SAndre Przywara 1312304dcb64SAndre Przywara /* Available with KVM_CAP_ONE_REG */ 1313304dcb64SAndre Przywara 1314304dcb64SAndre Przywara #define KVM_REG_ARCH_MASK 0xff00000000000000ULL 1315304dcb64SAndre Przywara #define KVM_REG_GENERIC 0x0000000000000000ULL 1316304dcb64SAndre Przywara 1317304dcb64SAndre Przywara /* 1318304dcb64SAndre Przywara * Architecture specific registers are to be defined in arch headers and 1319304dcb64SAndre Przywara * ORed with the arch identifier. 1320304dcb64SAndre Przywara */ 1321304dcb64SAndre Przywara #define KVM_REG_PPC 0x1000000000000000ULL 1322304dcb64SAndre Przywara #define KVM_REG_X86 0x2000000000000000ULL 1323304dcb64SAndre Przywara #define KVM_REG_IA64 0x3000000000000000ULL 1324304dcb64SAndre Przywara #define KVM_REG_ARM 0x4000000000000000ULL 1325304dcb64SAndre Przywara #define KVM_REG_S390 0x5000000000000000ULL 1326304dcb64SAndre Przywara #define KVM_REG_ARM64 0x6000000000000000ULL 1327304dcb64SAndre Przywara #define KVM_REG_MIPS 0x7000000000000000ULL 13285968b5ffSAnup Patel #define KVM_REG_RISCV 0x8000000000000000ULL 132992ef2dcdSWill Deacon #define KVM_REG_LOONGARCH 0x9000000000000000ULL 1330304dcb64SAndre Przywara 1331304dcb64SAndre Przywara #define KVM_REG_SIZE_SHIFT 52 1332304dcb64SAndre Przywara #define KVM_REG_SIZE_MASK 0x00f0000000000000ULL 1333304dcb64SAndre Przywara #define KVM_REG_SIZE_U8 0x0000000000000000ULL 1334304dcb64SAndre Przywara #define KVM_REG_SIZE_U16 0x0010000000000000ULL 1335304dcb64SAndre Przywara #define KVM_REG_SIZE_U32 0x0020000000000000ULL 1336304dcb64SAndre Przywara #define KVM_REG_SIZE_U64 0x0030000000000000ULL 1337304dcb64SAndre Przywara #define KVM_REG_SIZE_U128 0x0040000000000000ULL 1338304dcb64SAndre Przywara #define KVM_REG_SIZE_U256 0x0050000000000000ULL 1339304dcb64SAndre Przywara #define KVM_REG_SIZE_U512 0x0060000000000000ULL 1340304dcb64SAndre Przywara #define KVM_REG_SIZE_U1024 0x0070000000000000ULL 134166b24a33SWill Deacon #define KVM_REG_SIZE_U2048 0x0080000000000000ULL 1342304dcb64SAndre Przywara 1343304dcb64SAndre Przywara struct kvm_reg_list { 1344304dcb64SAndre Przywara __u64 n; /* number of regs */ 13458d0facecSAnup Patel __u64 reg[]; 1346304dcb64SAndre Przywara }; 1347304dcb64SAndre Przywara 1348304dcb64SAndre Przywara struct kvm_one_reg { 1349304dcb64SAndre Przywara __u64 id; 1350304dcb64SAndre Przywara __u64 addr; 1351304dcb64SAndre Przywara }; 1352304dcb64SAndre Przywara 1353764dfba1SAndre Przywara #define KVM_MSI_VALID_DEVID (1U << 0) 1354304dcb64SAndre Przywara struct kvm_msi { 1355304dcb64SAndre Przywara __u32 address_lo; 1356304dcb64SAndre Przywara __u32 address_hi; 1357304dcb64SAndre Przywara __u32 data; 1358304dcb64SAndre Przywara __u32 flags; 1359764dfba1SAndre Przywara __u32 devid; 1360764dfba1SAndre Przywara __u8 pad[12]; 1361304dcb64SAndre Przywara }; 1362304dcb64SAndre Przywara 1363304dcb64SAndre Przywara struct kvm_arm_device_addr { 1364304dcb64SAndre Przywara __u64 id; 1365304dcb64SAndre Przywara __u64 addr; 1366304dcb64SAndre Przywara }; 1367304dcb64SAndre Przywara 1368304dcb64SAndre Przywara /* 1369304dcb64SAndre Przywara * Device control API, available with KVM_CAP_DEVICE_CTRL 1370304dcb64SAndre Przywara */ 1371304dcb64SAndre Przywara #define KVM_CREATE_DEVICE_TEST 1 1372304dcb64SAndre Przywara 1373304dcb64SAndre Przywara struct kvm_create_device { 1374304dcb64SAndre Przywara __u32 type; /* in: KVM_DEV_TYPE_xxx */ 1375304dcb64SAndre Przywara __u32 fd; /* out: device handle */ 1376304dcb64SAndre Przywara __u32 flags; /* in: KVM_CREATE_DEVICE_xxx */ 1377304dcb64SAndre Przywara }; 1378304dcb64SAndre Przywara 1379304dcb64SAndre Przywara struct kvm_device_attr { 1380304dcb64SAndre Przywara __u32 flags; /* no flags currently defined */ 1381304dcb64SAndre Przywara __u32 group; /* device-defined */ 1382304dcb64SAndre Przywara __u64 attr; /* group-defined */ 1383304dcb64SAndre Przywara __u64 addr; /* userspace address of attr data */ 1384304dcb64SAndre Przywara }; 1385304dcb64SAndre Przywara 138626c85896SAnup Patel #define KVM_DEV_VFIO_FILE 1 138726c85896SAnup Patel 138826c85896SAnup Patel #define KVM_DEV_VFIO_FILE_ADD 1 138926c85896SAnup Patel #define KVM_DEV_VFIO_FILE_DEL 2 139026c85896SAnup Patel 139126c85896SAnup Patel /* KVM_DEV_VFIO_GROUP aliases are for compile time uapi compatibility */ 139226c85896SAnup Patel #define KVM_DEV_VFIO_GROUP KVM_DEV_VFIO_FILE 139326c85896SAnup Patel 139426c85896SAnup Patel #define KVM_DEV_VFIO_GROUP_ADD KVM_DEV_VFIO_FILE_ADD 139526c85896SAnup Patel #define KVM_DEV_VFIO_GROUP_DEL KVM_DEV_VFIO_FILE_DEL 13961bbe92f5SDave Martin #define KVM_DEV_VFIO_GROUP_SET_SPAPR_TCE 3 1397304dcb64SAndre Przywara 1398304dcb64SAndre Przywara enum kvm_device_type { 1399304dcb64SAndre Przywara KVM_DEV_TYPE_FSL_MPIC_20 = 1, 1400304dcb64SAndre Przywara #define KVM_DEV_TYPE_FSL_MPIC_20 KVM_DEV_TYPE_FSL_MPIC_20 1401304dcb64SAndre Przywara KVM_DEV_TYPE_FSL_MPIC_42, 1402304dcb64SAndre Przywara #define KVM_DEV_TYPE_FSL_MPIC_42 KVM_DEV_TYPE_FSL_MPIC_42 1403304dcb64SAndre Przywara KVM_DEV_TYPE_XICS, 1404304dcb64SAndre Przywara #define KVM_DEV_TYPE_XICS KVM_DEV_TYPE_XICS 1405304dcb64SAndre Przywara KVM_DEV_TYPE_VFIO, 1406304dcb64SAndre Przywara #define KVM_DEV_TYPE_VFIO KVM_DEV_TYPE_VFIO 1407304dcb64SAndre Przywara KVM_DEV_TYPE_ARM_VGIC_V2, 1408304dcb64SAndre Przywara #define KVM_DEV_TYPE_ARM_VGIC_V2 KVM_DEV_TYPE_ARM_VGIC_V2 1409304dcb64SAndre Przywara KVM_DEV_TYPE_FLIC, 1410304dcb64SAndre Przywara #define KVM_DEV_TYPE_FLIC KVM_DEV_TYPE_FLIC 1411304dcb64SAndre Przywara KVM_DEV_TYPE_ARM_VGIC_V3, 1412304dcb64SAndre Przywara #define KVM_DEV_TYPE_ARM_VGIC_V3 KVM_DEV_TYPE_ARM_VGIC_V3 1413764dfba1SAndre Przywara KVM_DEV_TYPE_ARM_VGIC_ITS, 1414764dfba1SAndre Przywara #define KVM_DEV_TYPE_ARM_VGIC_ITS KVM_DEV_TYPE_ARM_VGIC_ITS 141566b24a33SWill Deacon KVM_DEV_TYPE_XIVE, 141666b24a33SWill Deacon #define KVM_DEV_TYPE_XIVE KVM_DEV_TYPE_XIVE 14175968b5ffSAnup Patel KVM_DEV_TYPE_ARM_PV_TIME, 14185968b5ffSAnup Patel #define KVM_DEV_TYPE_ARM_PV_TIME KVM_DEV_TYPE_ARM_PV_TIME 141926c85896SAnup Patel KVM_DEV_TYPE_RISCV_AIA, 142026c85896SAnup Patel #define KVM_DEV_TYPE_RISCV_AIA KVM_DEV_TYPE_RISCV_AIA 1421304dcb64SAndre Przywara KVM_DEV_TYPE_MAX, 1422304dcb64SAndre Przywara }; 1423304dcb64SAndre Przywara 14241bbe92f5SDave Martin struct kvm_vfio_spapr_tce { 14251bbe92f5SDave Martin __s32 groupfd; 14261bbe92f5SDave Martin __s32 tablefd; 14271bbe92f5SDave Martin }; 14281bbe92f5SDave Martin 1429304dcb64SAndre Przywara /* 1430304dcb64SAndre Przywara * KVM_CREATE_VCPU receives as a parameter the vcpu slot, and returns 1431304dcb64SAndre Przywara * a vcpu fd. 1432304dcb64SAndre Przywara */ 1433304dcb64SAndre Przywara #define KVM_CREATE_VCPU _IO(KVMIO, 0x41) 1434304dcb64SAndre Przywara #define KVM_GET_DIRTY_LOG _IOW(KVMIO, 0x42, struct kvm_dirty_log) 1435304dcb64SAndre Przywara #define KVM_SET_NR_MMU_PAGES _IO(KVMIO, 0x44) 1436be986824SAnup Patel #define KVM_GET_NR_MMU_PAGES _IO(KVMIO, 0x45) /* deprecated */ 1437304dcb64SAndre Przywara #define KVM_SET_USER_MEMORY_REGION _IOW(KVMIO, 0x46, \ 1438304dcb64SAndre Przywara struct kvm_userspace_memory_region) 1439304dcb64SAndre Przywara #define KVM_SET_TSS_ADDR _IO(KVMIO, 0x47) 1440304dcb64SAndre Przywara #define KVM_SET_IDENTITY_MAP_ADDR _IOW(KVMIO, 0x48, __u64) 1441*99684681SAnup Patel #define KVM_SET_USER_MEMORY_REGION2 _IOW(KVMIO, 0x49, \ 1442*99684681SAnup Patel struct kvm_userspace_memory_region2) 1443304dcb64SAndre Przywara 1444304dcb64SAndre Przywara /* enable ucontrol for s390 */ 1445304dcb64SAndre Przywara struct kvm_s390_ucas_mapping { 1446304dcb64SAndre Przywara __u64 user_addr; 1447304dcb64SAndre Przywara __u64 vcpu_addr; 1448304dcb64SAndre Przywara __u64 length; 1449304dcb64SAndre Przywara }; 1450304dcb64SAndre Przywara #define KVM_S390_UCAS_MAP _IOW(KVMIO, 0x50, struct kvm_s390_ucas_mapping) 1451304dcb64SAndre Przywara #define KVM_S390_UCAS_UNMAP _IOW(KVMIO, 0x51, struct kvm_s390_ucas_mapping) 1452304dcb64SAndre Przywara #define KVM_S390_VCPU_FAULT _IOW(KVMIO, 0x52, unsigned long) 1453304dcb64SAndre Przywara 1454304dcb64SAndre Przywara /* Device model IOC */ 1455304dcb64SAndre Przywara #define KVM_CREATE_IRQCHIP _IO(KVMIO, 0x60) 1456304dcb64SAndre Przywara #define KVM_IRQ_LINE _IOW(KVMIO, 0x61, struct kvm_irq_level) 1457304dcb64SAndre Przywara #define KVM_GET_IRQCHIP _IOWR(KVMIO, 0x62, struct kvm_irqchip) 1458304dcb64SAndre Przywara #define KVM_SET_IRQCHIP _IOR(KVMIO, 0x63, struct kvm_irqchip) 1459304dcb64SAndre Przywara #define KVM_CREATE_PIT _IO(KVMIO, 0x64) 1460304dcb64SAndre Przywara #define KVM_GET_PIT _IOWR(KVMIO, 0x65, struct kvm_pit_state) 1461304dcb64SAndre Przywara #define KVM_SET_PIT _IOR(KVMIO, 0x66, struct kvm_pit_state) 1462304dcb64SAndre Przywara #define KVM_IRQ_LINE_STATUS _IOWR(KVMIO, 0x67, struct kvm_irq_level) 1463304dcb64SAndre Przywara #define KVM_REGISTER_COALESCED_MMIO \ 1464304dcb64SAndre Przywara _IOW(KVMIO, 0x67, struct kvm_coalesced_mmio_zone) 1465304dcb64SAndre Przywara #define KVM_UNREGISTER_COALESCED_MMIO \ 1466304dcb64SAndre Przywara _IOW(KVMIO, 0x68, struct kvm_coalesced_mmio_zone) 1467304dcb64SAndre Przywara #define KVM_SET_GSI_ROUTING _IOW(KVMIO, 0x6a, struct kvm_irq_routing) 1468304dcb64SAndre Przywara #define KVM_REINJECT_CONTROL _IO(KVMIO, 0x71) 1469304dcb64SAndre Przywara #define KVM_IRQFD _IOW(KVMIO, 0x76, struct kvm_irqfd) 1470304dcb64SAndre Przywara #define KVM_CREATE_PIT2 _IOW(KVMIO, 0x77, struct kvm_pit_config) 1471304dcb64SAndre Przywara #define KVM_SET_BOOT_CPU_ID _IO(KVMIO, 0x78) 1472304dcb64SAndre Przywara #define KVM_IOEVENTFD _IOW(KVMIO, 0x79, struct kvm_ioeventfd) 1473304dcb64SAndre Przywara #define KVM_XEN_HVM_CONFIG _IOW(KVMIO, 0x7a, struct kvm_xen_hvm_config) 1474304dcb64SAndre Przywara #define KVM_SET_CLOCK _IOW(KVMIO, 0x7b, struct kvm_clock_data) 1475304dcb64SAndre Przywara #define KVM_GET_CLOCK _IOR(KVMIO, 0x7c, struct kvm_clock_data) 1476304dcb64SAndre Przywara /* Available with KVM_CAP_PIT_STATE2 */ 1477304dcb64SAndre Przywara #define KVM_GET_PIT2 _IOR(KVMIO, 0x9f, struct kvm_pit_state2) 1478304dcb64SAndre Przywara #define KVM_SET_PIT2 _IOW(KVMIO, 0xa0, struct kvm_pit_state2) 1479304dcb64SAndre Przywara /* Available with KVM_CAP_PPC_GET_PVINFO */ 1480304dcb64SAndre Przywara #define KVM_PPC_GET_PVINFO _IOW(KVMIO, 0xa1, struct kvm_ppc_pvinfo) 14818d0facecSAnup Patel /* Available with KVM_CAP_TSC_CONTROL for a vCPU, or with 14828d0facecSAnup Patel * KVM_CAP_VM_TSC_CONTROL to set defaults for a VM */ 1483304dcb64SAndre Przywara #define KVM_SET_TSC_KHZ _IO(KVMIO, 0xa2) 1484304dcb64SAndre Przywara #define KVM_GET_TSC_KHZ _IO(KVMIO, 0xa3) 1485304dcb64SAndre Przywara /* Available with KVM_CAP_SIGNAL_MSI */ 1486304dcb64SAndre Przywara #define KVM_SIGNAL_MSI _IOW(KVMIO, 0xa5, struct kvm_msi) 1487304dcb64SAndre Przywara /* Available with KVM_CAP_PPC_GET_SMMU_INFO */ 1488304dcb64SAndre Przywara #define KVM_PPC_GET_SMMU_INFO _IOR(KVMIO, 0xa6, struct kvm_ppc_smmu_info) 1489304dcb64SAndre Przywara /* Available with KVM_CAP_PPC_ALLOC_HTAB */ 1490304dcb64SAndre Przywara #define KVM_PPC_ALLOCATE_HTAB _IOWR(KVMIO, 0xa7, __u32) 1491304dcb64SAndre Przywara #define KVM_CREATE_SPAPR_TCE _IOW(KVMIO, 0xa8, struct kvm_create_spapr_tce) 1492b37ed70eSAndre Przywara #define KVM_CREATE_SPAPR_TCE_64 _IOW(KVMIO, 0xa8, \ 1493b37ed70eSAndre Przywara struct kvm_create_spapr_tce_64) 1494304dcb64SAndre Przywara /* Available with KVM_CAP_RMA */ 1495304dcb64SAndre Przywara #define KVM_ALLOCATE_RMA _IOR(KVMIO, 0xa9, struct kvm_allocate_rma) 1496304dcb64SAndre Przywara /* Available with KVM_CAP_PPC_HTAB_FD */ 1497304dcb64SAndre Przywara #define KVM_PPC_GET_HTAB_FD _IOW(KVMIO, 0xaa, struct kvm_get_htab_fd) 1498304dcb64SAndre Przywara /* Available with KVM_CAP_ARM_SET_DEVICE_ADDR */ 1499304dcb64SAndre Przywara #define KVM_ARM_SET_DEVICE_ADDR _IOW(KVMIO, 0xab, struct kvm_arm_device_addr) 1500304dcb64SAndre Przywara /* Available with KVM_CAP_PPC_RTAS */ 1501304dcb64SAndre Przywara #define KVM_PPC_RTAS_DEFINE_TOKEN _IOW(KVMIO, 0xac, struct kvm_rtas_token_args) 1502764dfba1SAndre Przywara /* Available with KVM_CAP_SPAPR_RESIZE_HPT */ 1503764dfba1SAndre Przywara #define KVM_PPC_RESIZE_HPT_PREPARE _IOR(KVMIO, 0xad, struct kvm_ppc_resize_hpt) 1504764dfba1SAndre Przywara #define KVM_PPC_RESIZE_HPT_COMMIT _IOR(KVMIO, 0xae, struct kvm_ppc_resize_hpt) 1505764dfba1SAndre Przywara /* Available with KVM_CAP_PPC_RADIX_MMU or KVM_CAP_PPC_HASH_MMU_V3 */ 1506764dfba1SAndre Przywara #define KVM_PPC_CONFIGURE_V3_MMU _IOW(KVMIO, 0xaf, struct kvm_ppc_mmuv3_cfg) 1507764dfba1SAndre Przywara /* Available with KVM_CAP_PPC_RADIX_MMU */ 1508764dfba1SAndre Przywara #define KVM_PPC_GET_RMMU_INFO _IOW(KVMIO, 0xb0, struct kvm_ppc_rmmu_info) 15091bbe92f5SDave Martin /* Available with KVM_CAP_PPC_GET_CPU_CHAR */ 15101bbe92f5SDave Martin #define KVM_PPC_GET_CPU_CHAR _IOR(KVMIO, 0xb1, struct kvm_ppc_cpu_char) 151166b24a33SWill Deacon /* Available with KVM_CAP_PMU_EVENT_FILTER */ 151266b24a33SWill Deacon #define KVM_SET_PMU_EVENT_FILTER _IOW(KVMIO, 0xb2, struct kvm_pmu_event_filter) 15135968b5ffSAnup Patel #define KVM_PPC_SVM_OFF _IO(KVMIO, 0xb3) 15145968b5ffSAnup Patel #define KVM_ARM_MTE_COPY_TAGS _IOR(KVMIO, 0xb4, struct kvm_arm_copy_mte_tags) 1515be986824SAnup Patel /* Available with KVM_CAP_COUNTER_OFFSET */ 1516be986824SAnup Patel #define KVM_ARM_SET_COUNTER_OFFSET _IOW(KVMIO, 0xb5, struct kvm_arm_counter_offset) 151792ef2dcdSWill Deacon #define KVM_ARM_GET_REG_WRITABLE_MASKS _IOR(KVMIO, 0xb6, struct reg_mask_range) 1518304dcb64SAndre Przywara 1519304dcb64SAndre Przywara /* ioctl for vm fd */ 1520304dcb64SAndre Przywara #define KVM_CREATE_DEVICE _IOWR(KVMIO, 0xe0, struct kvm_create_device) 1521304dcb64SAndre Przywara 1522304dcb64SAndre Przywara /* ioctls for fds returned by KVM_CREATE_DEVICE */ 1523304dcb64SAndre Przywara #define KVM_SET_DEVICE_ATTR _IOW(KVMIO, 0xe1, struct kvm_device_attr) 1524304dcb64SAndre Przywara #define KVM_GET_DEVICE_ATTR _IOW(KVMIO, 0xe2, struct kvm_device_attr) 1525304dcb64SAndre Przywara #define KVM_HAS_DEVICE_ATTR _IOW(KVMIO, 0xe3, struct kvm_device_attr) 1526304dcb64SAndre Przywara 1527304dcb64SAndre Przywara /* 1528304dcb64SAndre Przywara * ioctls for vcpu fds 1529304dcb64SAndre Przywara */ 1530304dcb64SAndre Przywara #define KVM_RUN _IO(KVMIO, 0x80) 1531304dcb64SAndre Przywara #define KVM_GET_REGS _IOR(KVMIO, 0x81, struct kvm_regs) 1532304dcb64SAndre Przywara #define KVM_SET_REGS _IOW(KVMIO, 0x82, struct kvm_regs) 1533304dcb64SAndre Przywara #define KVM_GET_SREGS _IOR(KVMIO, 0x83, struct kvm_sregs) 1534304dcb64SAndre Przywara #define KVM_SET_SREGS _IOW(KVMIO, 0x84, struct kvm_sregs) 1535304dcb64SAndre Przywara #define KVM_TRANSLATE _IOWR(KVMIO, 0x85, struct kvm_translation) 1536304dcb64SAndre Przywara #define KVM_INTERRUPT _IOW(KVMIO, 0x86, struct kvm_interrupt) 1537304dcb64SAndre Przywara #define KVM_GET_MSRS _IOWR(KVMIO, 0x88, struct kvm_msrs) 1538304dcb64SAndre Przywara #define KVM_SET_MSRS _IOW(KVMIO, 0x89, struct kvm_msrs) 1539304dcb64SAndre Przywara #define KVM_SET_CPUID _IOW(KVMIO, 0x8a, struct kvm_cpuid) 1540304dcb64SAndre Przywara #define KVM_SET_SIGNAL_MASK _IOW(KVMIO, 0x8b, struct kvm_signal_mask) 1541304dcb64SAndre Przywara #define KVM_GET_FPU _IOR(KVMIO, 0x8c, struct kvm_fpu) 1542304dcb64SAndre Przywara #define KVM_SET_FPU _IOW(KVMIO, 0x8d, struct kvm_fpu) 1543304dcb64SAndre Przywara #define KVM_GET_LAPIC _IOR(KVMIO, 0x8e, struct kvm_lapic_state) 1544304dcb64SAndre Przywara #define KVM_SET_LAPIC _IOW(KVMIO, 0x8f, struct kvm_lapic_state) 1545304dcb64SAndre Przywara #define KVM_SET_CPUID2 _IOW(KVMIO, 0x90, struct kvm_cpuid2) 1546304dcb64SAndre Przywara #define KVM_GET_CPUID2 _IOWR(KVMIO, 0x91, struct kvm_cpuid2) 1547304dcb64SAndre Przywara /* Available with KVM_CAP_VAPIC */ 1548304dcb64SAndre Przywara #define KVM_TPR_ACCESS_REPORTING _IOWR(KVMIO, 0x92, struct kvm_tpr_access_ctl) 1549304dcb64SAndre Przywara /* Available with KVM_CAP_VAPIC */ 1550304dcb64SAndre Przywara #define KVM_SET_VAPIC_ADDR _IOW(KVMIO, 0x93, struct kvm_vapic_addr) 1551304dcb64SAndre Przywara /* valid for virtual machine (for floating interrupt)_and_ vcpu */ 1552304dcb64SAndre Przywara #define KVM_S390_INTERRUPT _IOW(KVMIO, 0x94, struct kvm_s390_interrupt) 1553304dcb64SAndre Przywara /* store status for s390 */ 1554304dcb64SAndre Przywara #define KVM_S390_STORE_STATUS_NOADDR (-1ul) 1555304dcb64SAndre Przywara #define KVM_S390_STORE_STATUS_PREFIXED (-2ul) 1556304dcb64SAndre Przywara #define KVM_S390_STORE_STATUS _IOW(KVMIO, 0x95, unsigned long) 1557304dcb64SAndre Przywara /* initial ipl psw for s390 */ 1558304dcb64SAndre Przywara #define KVM_S390_SET_INITIAL_PSW _IOW(KVMIO, 0x96, struct kvm_s390_psw) 1559304dcb64SAndre Przywara /* initial reset for s390 */ 1560304dcb64SAndre Przywara #define KVM_S390_INITIAL_RESET _IO(KVMIO, 0x97) 1561304dcb64SAndre Przywara #define KVM_GET_MP_STATE _IOR(KVMIO, 0x98, struct kvm_mp_state) 1562304dcb64SAndre Przywara #define KVM_SET_MP_STATE _IOW(KVMIO, 0x99, struct kvm_mp_state) 1563304dcb64SAndre Przywara /* Available with KVM_CAP_USER_NMI */ 1564304dcb64SAndre Przywara #define KVM_NMI _IO(KVMIO, 0x9a) 1565304dcb64SAndre Przywara /* Available with KVM_CAP_SET_GUEST_DEBUG */ 1566304dcb64SAndre Przywara #define KVM_SET_GUEST_DEBUG _IOW(KVMIO, 0x9b, struct kvm_guest_debug) 1567304dcb64SAndre Przywara /* MCE for x86 */ 1568304dcb64SAndre Przywara #define KVM_X86_SETUP_MCE _IOW(KVMIO, 0x9c, __u64) 1569304dcb64SAndre Przywara #define KVM_X86_GET_MCE_CAP_SUPPORTED _IOR(KVMIO, 0x9d, __u64) 1570304dcb64SAndre Przywara #define KVM_X86_SET_MCE _IOW(KVMIO, 0x9e, struct kvm_x86_mce) 1571304dcb64SAndre Przywara /* Available with KVM_CAP_VCPU_EVENTS */ 1572304dcb64SAndre Przywara #define KVM_GET_VCPU_EVENTS _IOR(KVMIO, 0x9f, struct kvm_vcpu_events) 1573304dcb64SAndre Przywara #define KVM_SET_VCPU_EVENTS _IOW(KVMIO, 0xa0, struct kvm_vcpu_events) 1574304dcb64SAndre Przywara /* Available with KVM_CAP_DEBUGREGS */ 1575304dcb64SAndre Przywara #define KVM_GET_DEBUGREGS _IOR(KVMIO, 0xa1, struct kvm_debugregs) 1576304dcb64SAndre Przywara #define KVM_SET_DEBUGREGS _IOW(KVMIO, 0xa2, struct kvm_debugregs) 1577304dcb64SAndre Przywara /* 157826c85896SAnup Patel * vcpu version available with KVM_CAP_ENABLE_CAP 1579304dcb64SAndre Przywara * vm version available with KVM_CAP_ENABLE_CAP_VM 1580304dcb64SAndre Przywara */ 1581304dcb64SAndre Przywara #define KVM_ENABLE_CAP _IOW(KVMIO, 0xa3, struct kvm_enable_cap) 1582304dcb64SAndre Przywara /* Available with KVM_CAP_XSAVE */ 1583304dcb64SAndre Przywara #define KVM_GET_XSAVE _IOR(KVMIO, 0xa4, struct kvm_xsave) 1584304dcb64SAndre Przywara #define KVM_SET_XSAVE _IOW(KVMIO, 0xa5, struct kvm_xsave) 1585304dcb64SAndre Przywara /* Available with KVM_CAP_XCRS */ 1586304dcb64SAndre Przywara #define KVM_GET_XCRS _IOR(KVMIO, 0xa6, struct kvm_xcrs) 1587304dcb64SAndre Przywara #define KVM_SET_XCRS _IOW(KVMIO, 0xa7, struct kvm_xcrs) 1588304dcb64SAndre Przywara /* Available with KVM_CAP_SW_TLB */ 1589304dcb64SAndre Przywara #define KVM_DIRTY_TLB _IOW(KVMIO, 0xaa, struct kvm_dirty_tlb) 1590304dcb64SAndre Przywara /* Available with KVM_CAP_ONE_REG */ 1591304dcb64SAndre Przywara #define KVM_GET_ONE_REG _IOW(KVMIO, 0xab, struct kvm_one_reg) 1592304dcb64SAndre Przywara #define KVM_SET_ONE_REG _IOW(KVMIO, 0xac, struct kvm_one_reg) 1593304dcb64SAndre Przywara /* VM is being stopped by host */ 1594304dcb64SAndre Przywara #define KVM_KVMCLOCK_CTRL _IO(KVMIO, 0xad) 1595304dcb64SAndre Przywara #define KVM_ARM_VCPU_INIT _IOW(KVMIO, 0xae, struct kvm_vcpu_init) 1596304dcb64SAndre Przywara #define KVM_ARM_PREFERRED_TARGET _IOR(KVMIO, 0xaf, struct kvm_vcpu_init) 1597304dcb64SAndre Przywara #define KVM_GET_REG_LIST _IOWR(KVMIO, 0xb0, struct kvm_reg_list) 1598304dcb64SAndre Przywara /* Available with KVM_CAP_S390_MEM_OP */ 1599304dcb64SAndre Przywara #define KVM_S390_MEM_OP _IOW(KVMIO, 0xb1, struct kvm_s390_mem_op) 1600304dcb64SAndre Przywara /* Available with KVM_CAP_S390_SKEYS */ 1601304dcb64SAndre Przywara #define KVM_S390_GET_SKEYS _IOW(KVMIO, 0xb2, struct kvm_s390_skeys) 1602304dcb64SAndre Przywara #define KVM_S390_SET_SKEYS _IOW(KVMIO, 0xb3, struct kvm_s390_skeys) 1603304dcb64SAndre Przywara /* Available with KVM_CAP_S390_INJECT_IRQ */ 1604304dcb64SAndre Przywara #define KVM_S390_IRQ _IOW(KVMIO, 0xb4, struct kvm_s390_irq) 1605304dcb64SAndre Przywara /* Available with KVM_CAP_S390_IRQ_STATE */ 1606304dcb64SAndre Przywara #define KVM_S390_SET_IRQ_STATE _IOW(KVMIO, 0xb5, struct kvm_s390_irq_state) 1607304dcb64SAndre Przywara #define KVM_S390_GET_IRQ_STATE _IOW(KVMIO, 0xb6, struct kvm_s390_irq_state) 1608b3f606e1SMarc Zyngier /* Available with KVM_CAP_X86_SMM */ 1609b3f606e1SMarc Zyngier #define KVM_SMI _IO(KVMIO, 0xb7) 16101bbe92f5SDave Martin /* Available with KVM_CAP_S390_CMMA_MIGRATION */ 16111bbe92f5SDave Martin #define KVM_S390_GET_CMMA_BITS _IOWR(KVMIO, 0xb8, struct kvm_s390_cmma_log) 16121bbe92f5SDave Martin #define KVM_S390_SET_CMMA_BITS _IOW(KVMIO, 0xb9, struct kvm_s390_cmma_log) 16131bbe92f5SDave Martin /* Memory Encryption Commands */ 16141bbe92f5SDave Martin #define KVM_MEMORY_ENCRYPT_OP _IOWR(KVMIO, 0xba, unsigned long) 16151bbe92f5SDave Martin 16161bbe92f5SDave Martin struct kvm_enc_region { 16171bbe92f5SDave Martin __u64 addr; 16181bbe92f5SDave Martin __u64 size; 16191bbe92f5SDave Martin }; 16201bbe92f5SDave Martin 16211bbe92f5SDave Martin #define KVM_MEMORY_ENCRYPT_REG_REGION _IOR(KVMIO, 0xbb, struct kvm_enc_region) 16221bbe92f5SDave Martin #define KVM_MEMORY_ENCRYPT_UNREG_REGION _IOR(KVMIO, 0xbc, struct kvm_enc_region) 16231bbe92f5SDave Martin 16241bbe92f5SDave Martin /* Available with KVM_CAP_HYPERV_EVENTFD */ 16251bbe92f5SDave Martin #define KVM_HYPERV_EVENTFD _IOW(KVMIO, 0xbd, struct kvm_hyperv_eventfd) 16261bbe92f5SDave Martin 16271bbe92f5SDave Martin /* Available with KVM_CAP_NESTED_STATE */ 16281bbe92f5SDave Martin #define KVM_GET_NESTED_STATE _IOWR(KVMIO, 0xbe, struct kvm_nested_state) 16291bbe92f5SDave Martin #define KVM_SET_NESTED_STATE _IOW(KVMIO, 0xbf, struct kvm_nested_state) 16301bbe92f5SDave Martin 163166b24a33SWill Deacon /* Available with KVM_CAP_MANUAL_DIRTY_LOG_PROTECT_2 */ 16321bbe92f5SDave Martin #define KVM_CLEAR_DIRTY_LOG _IOWR(KVMIO, 0xc0, struct kvm_clear_dirty_log) 16331bbe92f5SDave Martin 16345968b5ffSAnup Patel /* Available with KVM_CAP_HYPERV_CPUID (vcpu) / KVM_CAP_SYS_HYPERV_CPUID (system) */ 16351bbe92f5SDave Martin #define KVM_GET_SUPPORTED_HV_CPUID _IOWR(KVMIO, 0xc1, struct kvm_cpuid2) 16361bbe92f5SDave Martin 163766b24a33SWill Deacon /* Available with KVM_CAP_ARM_SVE */ 163866b24a33SWill Deacon #define KVM_ARM_VCPU_FINALIZE _IOW(KVMIO, 0xc2, int) 163966b24a33SWill Deacon 16405968b5ffSAnup Patel /* Available with KVM_CAP_S390_VCPU_RESETS */ 16415968b5ffSAnup Patel #define KVM_S390_NORMAL_RESET _IO(KVMIO, 0xc3) 16425968b5ffSAnup Patel #define KVM_S390_CLEAR_RESET _IO(KVMIO, 0xc4) 16435968b5ffSAnup Patel 16445968b5ffSAnup Patel struct kvm_s390_pv_sec_parm { 16455968b5ffSAnup Patel __u64 origin; 16465968b5ffSAnup Patel __u64 length; 16475968b5ffSAnup Patel }; 16485968b5ffSAnup Patel 16495968b5ffSAnup Patel struct kvm_s390_pv_unp { 16505968b5ffSAnup Patel __u64 addr; 16515968b5ffSAnup Patel __u64 size; 16525968b5ffSAnup Patel __u64 tweak; 16535968b5ffSAnup Patel }; 16545968b5ffSAnup Patel 16558d0facecSAnup Patel enum pv_cmd_dmp_id { 16568d0facecSAnup Patel KVM_PV_DUMP_INIT, 16578d0facecSAnup Patel KVM_PV_DUMP_CONFIG_STOR_STATE, 16588d0facecSAnup Patel KVM_PV_DUMP_COMPLETE, 16598d0facecSAnup Patel KVM_PV_DUMP_CPU, 16608d0facecSAnup Patel }; 16618d0facecSAnup Patel 16628d0facecSAnup Patel struct kvm_s390_pv_dmp { 16638d0facecSAnup Patel __u64 subcmd; 16648d0facecSAnup Patel __u64 buff_addr; 16658d0facecSAnup Patel __u64 buff_len; 16668d0facecSAnup Patel __u64 gaddr; /* For dump storage state */ 16678d0facecSAnup Patel __u64 reserved[4]; 16688d0facecSAnup Patel }; 16698d0facecSAnup Patel 16708d0facecSAnup Patel enum pv_cmd_info_id { 16718d0facecSAnup Patel KVM_PV_INFO_VM, 16728d0facecSAnup Patel KVM_PV_INFO_DUMP, 16738d0facecSAnup Patel }; 16748d0facecSAnup Patel 16758d0facecSAnup Patel struct kvm_s390_pv_info_dump { 16768d0facecSAnup Patel __u64 dump_cpu_buffer_len; 16778d0facecSAnup Patel __u64 dump_config_mem_buffer_per_1m; 16788d0facecSAnup Patel __u64 dump_config_finalize_len; 16798d0facecSAnup Patel }; 16808d0facecSAnup Patel 16818d0facecSAnup Patel struct kvm_s390_pv_info_vm { 16828d0facecSAnup Patel __u64 inst_calls_list[4]; 16838d0facecSAnup Patel __u64 max_cpus; 16848d0facecSAnup Patel __u64 max_guests; 16858d0facecSAnup Patel __u64 max_guest_addr; 16868d0facecSAnup Patel __u64 feature_indication; 16878d0facecSAnup Patel }; 16888d0facecSAnup Patel 16898d0facecSAnup Patel struct kvm_s390_pv_info_header { 16908d0facecSAnup Patel __u32 id; 16918d0facecSAnup Patel __u32 len_max; 16928d0facecSAnup Patel __u32 len_written; 16938d0facecSAnup Patel __u32 reserved; 16948d0facecSAnup Patel }; 16958d0facecSAnup Patel 16968d0facecSAnup Patel struct kvm_s390_pv_info { 16978d0facecSAnup Patel struct kvm_s390_pv_info_header header; 16988d0facecSAnup Patel union { 16998d0facecSAnup Patel struct kvm_s390_pv_info_dump dump; 17008d0facecSAnup Patel struct kvm_s390_pv_info_vm vm; 17018d0facecSAnup Patel }; 17028d0facecSAnup Patel }; 17038d0facecSAnup Patel 17045968b5ffSAnup Patel enum pv_cmd_id { 17055968b5ffSAnup Patel KVM_PV_ENABLE, 17065968b5ffSAnup Patel KVM_PV_DISABLE, 17075968b5ffSAnup Patel KVM_PV_SET_SEC_PARMS, 17085968b5ffSAnup Patel KVM_PV_UNPACK, 17095968b5ffSAnup Patel KVM_PV_VERIFY, 17105968b5ffSAnup Patel KVM_PV_PREP_RESET, 17115968b5ffSAnup Patel KVM_PV_UNSHARE_ALL, 17128d0facecSAnup Patel KVM_PV_INFO, 17138d0facecSAnup Patel KVM_PV_DUMP, 1714be986824SAnup Patel KVM_PV_ASYNC_CLEANUP_PREPARE, 1715be986824SAnup Patel KVM_PV_ASYNC_CLEANUP_PERFORM, 17165968b5ffSAnup Patel }; 17175968b5ffSAnup Patel 17185968b5ffSAnup Patel struct kvm_pv_cmd { 17195968b5ffSAnup Patel __u32 cmd; /* Command to be executed */ 17205968b5ffSAnup Patel __u16 rc; /* Ultravisor return code */ 17215968b5ffSAnup Patel __u16 rrc; /* Ultravisor return reason code */ 17225968b5ffSAnup Patel __u64 data; /* Data or address */ 17235968b5ffSAnup Patel __u32 flags; /* flags for future extensions. Must be 0 for now */ 17245968b5ffSAnup Patel __u32 reserved[3]; 17255968b5ffSAnup Patel }; 17265968b5ffSAnup Patel 17275968b5ffSAnup Patel /* Available with KVM_CAP_S390_PROTECTED */ 17285968b5ffSAnup Patel #define KVM_S390_PV_COMMAND _IOWR(KVMIO, 0xc5, struct kvm_pv_cmd) 17295968b5ffSAnup Patel 17305968b5ffSAnup Patel /* Available with KVM_CAP_X86_MSR_FILTER */ 17315968b5ffSAnup Patel #define KVM_X86_SET_MSR_FILTER _IOW(KVMIO, 0xc6, struct kvm_msr_filter) 17325968b5ffSAnup Patel 17335968b5ffSAnup Patel /* Available with KVM_CAP_DIRTY_LOG_RING */ 17345968b5ffSAnup Patel #define KVM_RESET_DIRTY_RINGS _IO(KVMIO, 0xc7) 17355968b5ffSAnup Patel 17365968b5ffSAnup Patel /* Per-VM Xen attributes */ 17375968b5ffSAnup Patel #define KVM_XEN_HVM_GET_ATTR _IOWR(KVMIO, 0xc8, struct kvm_xen_hvm_attr) 17385968b5ffSAnup Patel #define KVM_XEN_HVM_SET_ATTR _IOW(KVMIO, 0xc9, struct kvm_xen_hvm_attr) 17395968b5ffSAnup Patel 17405968b5ffSAnup Patel struct kvm_xen_hvm_attr { 17415968b5ffSAnup Patel __u16 type; 17425968b5ffSAnup Patel __u16 pad[3]; 17435968b5ffSAnup Patel union { 17445968b5ffSAnup Patel __u8 long_mode; 17455968b5ffSAnup Patel __u8 vector; 1746be986824SAnup Patel __u8 runstate_update_flag; 17475968b5ffSAnup Patel struct { 17485968b5ffSAnup Patel __u64 gfn; 1749be986824SAnup Patel #define KVM_XEN_INVALID_GFN ((__u64)-1) 17505968b5ffSAnup Patel } shared_info; 17518d0facecSAnup Patel struct { 17528d0facecSAnup Patel __u32 send_port; 17538d0facecSAnup Patel __u32 type; /* EVTCHNSTAT_ipi / EVTCHNSTAT_interdomain */ 17548d0facecSAnup Patel __u32 flags; 17558d0facecSAnup Patel #define KVM_XEN_EVTCHN_DEASSIGN (1 << 0) 17568d0facecSAnup Patel #define KVM_XEN_EVTCHN_UPDATE (1 << 1) 17578d0facecSAnup Patel #define KVM_XEN_EVTCHN_RESET (1 << 2) 17588d0facecSAnup Patel /* 17598d0facecSAnup Patel * Events sent by the guest are either looped back to 17608d0facecSAnup Patel * the guest itself (potentially on a different port#) 17618d0facecSAnup Patel * or signalled via an eventfd. 17628d0facecSAnup Patel */ 17638d0facecSAnup Patel union { 17648d0facecSAnup Patel struct { 17658d0facecSAnup Patel __u32 port; 17668d0facecSAnup Patel __u32 vcpu; 17678d0facecSAnup Patel __u32 priority; 17688d0facecSAnup Patel } port; 17698d0facecSAnup Patel struct { 17708d0facecSAnup Patel __u32 port; /* Zero for eventfd */ 17718d0facecSAnup Patel __s32 fd; 17728d0facecSAnup Patel } eventfd; 17738d0facecSAnup Patel __u32 padding[4]; 17748d0facecSAnup Patel } deliver; 17758d0facecSAnup Patel } evtchn; 17768d0facecSAnup Patel __u32 xen_version; 17775968b5ffSAnup Patel __u64 pad[8]; 17785968b5ffSAnup Patel } u; 17795968b5ffSAnup Patel }; 17805968b5ffSAnup Patel 1781be986824SAnup Patel 17825968b5ffSAnup Patel /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_SHARED_INFO */ 17835968b5ffSAnup Patel #define KVM_XEN_ATTR_TYPE_LONG_MODE 0x0 17845968b5ffSAnup Patel #define KVM_XEN_ATTR_TYPE_SHARED_INFO 0x1 17855968b5ffSAnup Patel #define KVM_XEN_ATTR_TYPE_UPCALL_VECTOR 0x2 17868d0facecSAnup Patel /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */ 17878d0facecSAnup Patel #define KVM_XEN_ATTR_TYPE_EVTCHN 0x3 17888d0facecSAnup Patel #define KVM_XEN_ATTR_TYPE_XEN_VERSION 0x4 1789be986824SAnup Patel /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_RUNSTATE_UPDATE_FLAG */ 1790be986824SAnup Patel #define KVM_XEN_ATTR_TYPE_RUNSTATE_UPDATE_FLAG 0x5 17915968b5ffSAnup Patel 17925968b5ffSAnup Patel /* Per-vCPU Xen attributes */ 17935968b5ffSAnup Patel #define KVM_XEN_VCPU_GET_ATTR _IOWR(KVMIO, 0xca, struct kvm_xen_vcpu_attr) 17945968b5ffSAnup Patel #define KVM_XEN_VCPU_SET_ATTR _IOW(KVMIO, 0xcb, struct kvm_xen_vcpu_attr) 17955968b5ffSAnup Patel 17968d0facecSAnup Patel /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */ 17978d0facecSAnup Patel #define KVM_XEN_HVM_EVTCHN_SEND _IOW(KVMIO, 0xd0, struct kvm_irq_routing_xen_evtchn) 17988d0facecSAnup Patel 17995968b5ffSAnup Patel #define KVM_GET_SREGS2 _IOR(KVMIO, 0xcc, struct kvm_sregs2) 18005968b5ffSAnup Patel #define KVM_SET_SREGS2 _IOW(KVMIO, 0xcd, struct kvm_sregs2) 18015968b5ffSAnup Patel 18025968b5ffSAnup Patel struct kvm_xen_vcpu_attr { 18035968b5ffSAnup Patel __u16 type; 18045968b5ffSAnup Patel __u16 pad[3]; 18055968b5ffSAnup Patel union { 18065968b5ffSAnup Patel __u64 gpa; 1807be986824SAnup Patel #define KVM_XEN_INVALID_GPA ((__u64)-1) 18085968b5ffSAnup Patel __u64 pad[8]; 18095968b5ffSAnup Patel struct { 18105968b5ffSAnup Patel __u64 state; 18115968b5ffSAnup Patel __u64 state_entry_time; 18125968b5ffSAnup Patel __u64 time_running; 18135968b5ffSAnup Patel __u64 time_runnable; 18145968b5ffSAnup Patel __u64 time_blocked; 18155968b5ffSAnup Patel __u64 time_offline; 18165968b5ffSAnup Patel } runstate; 18178d0facecSAnup Patel __u32 vcpu_id; 18188d0facecSAnup Patel struct { 18198d0facecSAnup Patel __u32 port; 18208d0facecSAnup Patel __u32 priority; 18218d0facecSAnup Patel __u64 expires_ns; 18228d0facecSAnup Patel } timer; 18238d0facecSAnup Patel __u8 vector; 18245968b5ffSAnup Patel } u; 18255968b5ffSAnup Patel }; 18265968b5ffSAnup Patel 18275968b5ffSAnup Patel /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_SHARED_INFO */ 18285968b5ffSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_VCPU_INFO 0x0 18295968b5ffSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_VCPU_TIME_INFO 0x1 18305968b5ffSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADDR 0x2 18315968b5ffSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_CURRENT 0x3 18325968b5ffSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_DATA 0x4 18335968b5ffSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADJUST 0x5 18348d0facecSAnup Patel /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */ 18358d0facecSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_VCPU_ID 0x6 18368d0facecSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_TIMER 0x7 18378d0facecSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_UPCALL_VECTOR 0x8 18385968b5ffSAnup Patel 18391bbe92f5SDave Martin /* Secure Encrypted Virtualization command */ 18401bbe92f5SDave Martin enum sev_cmd_id { 18411bbe92f5SDave Martin /* Guest initialization commands */ 18421bbe92f5SDave Martin KVM_SEV_INIT = 0, 18431bbe92f5SDave Martin KVM_SEV_ES_INIT, 18441bbe92f5SDave Martin /* Guest launch commands */ 18451bbe92f5SDave Martin KVM_SEV_LAUNCH_START, 18461bbe92f5SDave Martin KVM_SEV_LAUNCH_UPDATE_DATA, 18471bbe92f5SDave Martin KVM_SEV_LAUNCH_UPDATE_VMSA, 18481bbe92f5SDave Martin KVM_SEV_LAUNCH_SECRET, 18491bbe92f5SDave Martin KVM_SEV_LAUNCH_MEASURE, 18501bbe92f5SDave Martin KVM_SEV_LAUNCH_FINISH, 18511bbe92f5SDave Martin /* Guest migration commands (outgoing) */ 18521bbe92f5SDave Martin KVM_SEV_SEND_START, 18531bbe92f5SDave Martin KVM_SEV_SEND_UPDATE_DATA, 18541bbe92f5SDave Martin KVM_SEV_SEND_UPDATE_VMSA, 18551bbe92f5SDave Martin KVM_SEV_SEND_FINISH, 18561bbe92f5SDave Martin /* Guest migration commands (incoming) */ 18571bbe92f5SDave Martin KVM_SEV_RECEIVE_START, 18581bbe92f5SDave Martin KVM_SEV_RECEIVE_UPDATE_DATA, 18591bbe92f5SDave Martin KVM_SEV_RECEIVE_UPDATE_VMSA, 18601bbe92f5SDave Martin KVM_SEV_RECEIVE_FINISH, 18611bbe92f5SDave Martin /* Guest status and debug commands */ 18621bbe92f5SDave Martin KVM_SEV_GUEST_STATUS, 18631bbe92f5SDave Martin KVM_SEV_DBG_DECRYPT, 18641bbe92f5SDave Martin KVM_SEV_DBG_ENCRYPT, 18651bbe92f5SDave Martin /* Guest certificates commands */ 18661bbe92f5SDave Martin KVM_SEV_CERT_EXPORT, 18675968b5ffSAnup Patel /* Attestation report */ 18685968b5ffSAnup Patel KVM_SEV_GET_ATTESTATION_REPORT, 18695968b5ffSAnup Patel /* Guest Migration Extension */ 18705968b5ffSAnup Patel KVM_SEV_SEND_CANCEL, 18711bbe92f5SDave Martin 18721bbe92f5SDave Martin KVM_SEV_NR_MAX, 18731bbe92f5SDave Martin }; 18741bbe92f5SDave Martin 18751bbe92f5SDave Martin struct kvm_sev_cmd { 18761bbe92f5SDave Martin __u32 id; 18771bbe92f5SDave Martin __u64 data; 18781bbe92f5SDave Martin __u32 error; 18791bbe92f5SDave Martin __u32 sev_fd; 18801bbe92f5SDave Martin }; 18811bbe92f5SDave Martin 18821bbe92f5SDave Martin struct kvm_sev_launch_start { 18831bbe92f5SDave Martin __u32 handle; 18841bbe92f5SDave Martin __u32 policy; 18851bbe92f5SDave Martin __u64 dh_uaddr; 18861bbe92f5SDave Martin __u32 dh_len; 18871bbe92f5SDave Martin __u64 session_uaddr; 18881bbe92f5SDave Martin __u32 session_len; 18891bbe92f5SDave Martin }; 18901bbe92f5SDave Martin 18911bbe92f5SDave Martin struct kvm_sev_launch_update_data { 18921bbe92f5SDave Martin __u64 uaddr; 18931bbe92f5SDave Martin __u32 len; 18941bbe92f5SDave Martin }; 18951bbe92f5SDave Martin 18961bbe92f5SDave Martin 18971bbe92f5SDave Martin struct kvm_sev_launch_secret { 18981bbe92f5SDave Martin __u64 hdr_uaddr; 18991bbe92f5SDave Martin __u32 hdr_len; 19001bbe92f5SDave Martin __u64 guest_uaddr; 19011bbe92f5SDave Martin __u32 guest_len; 19021bbe92f5SDave Martin __u64 trans_uaddr; 19031bbe92f5SDave Martin __u32 trans_len; 19041bbe92f5SDave Martin }; 19051bbe92f5SDave Martin 19061bbe92f5SDave Martin struct kvm_sev_launch_measure { 19071bbe92f5SDave Martin __u64 uaddr; 19081bbe92f5SDave Martin __u32 len; 19091bbe92f5SDave Martin }; 19101bbe92f5SDave Martin 19111bbe92f5SDave Martin struct kvm_sev_guest_status { 19121bbe92f5SDave Martin __u32 handle; 19131bbe92f5SDave Martin __u32 policy; 19141bbe92f5SDave Martin __u32 state; 19151bbe92f5SDave Martin }; 19161bbe92f5SDave Martin 19171bbe92f5SDave Martin struct kvm_sev_dbg { 19181bbe92f5SDave Martin __u64 src_uaddr; 19191bbe92f5SDave Martin __u64 dst_uaddr; 19201bbe92f5SDave Martin __u32 len; 19211bbe92f5SDave Martin }; 1922304dcb64SAndre Przywara 19235968b5ffSAnup Patel struct kvm_sev_attestation_report { 19245968b5ffSAnup Patel __u8 mnonce[16]; 19255968b5ffSAnup Patel __u64 uaddr; 19265968b5ffSAnup Patel __u32 len; 19275968b5ffSAnup Patel }; 19285968b5ffSAnup Patel 19295968b5ffSAnup Patel struct kvm_sev_send_start { 19305968b5ffSAnup Patel __u32 policy; 19315968b5ffSAnup Patel __u64 pdh_cert_uaddr; 19325968b5ffSAnup Patel __u32 pdh_cert_len; 19335968b5ffSAnup Patel __u64 plat_certs_uaddr; 19345968b5ffSAnup Patel __u32 plat_certs_len; 19355968b5ffSAnup Patel __u64 amd_certs_uaddr; 19365968b5ffSAnup Patel __u32 amd_certs_len; 19375968b5ffSAnup Patel __u64 session_uaddr; 19385968b5ffSAnup Patel __u32 session_len; 19395968b5ffSAnup Patel }; 19405968b5ffSAnup Patel 19415968b5ffSAnup Patel struct kvm_sev_send_update_data { 19425968b5ffSAnup Patel __u64 hdr_uaddr; 19435968b5ffSAnup Patel __u32 hdr_len; 19445968b5ffSAnup Patel __u64 guest_uaddr; 19455968b5ffSAnup Patel __u32 guest_len; 19465968b5ffSAnup Patel __u64 trans_uaddr; 19475968b5ffSAnup Patel __u32 trans_len; 19485968b5ffSAnup Patel }; 19495968b5ffSAnup Patel 19505968b5ffSAnup Patel struct kvm_sev_receive_start { 19515968b5ffSAnup Patel __u32 handle; 19525968b5ffSAnup Patel __u32 policy; 19535968b5ffSAnup Patel __u64 pdh_uaddr; 19545968b5ffSAnup Patel __u32 pdh_len; 19555968b5ffSAnup Patel __u64 session_uaddr; 19565968b5ffSAnup Patel __u32 session_len; 19575968b5ffSAnup Patel }; 19585968b5ffSAnup Patel 19595968b5ffSAnup Patel struct kvm_sev_receive_update_data { 19605968b5ffSAnup Patel __u64 hdr_uaddr; 19615968b5ffSAnup Patel __u32 hdr_len; 19625968b5ffSAnup Patel __u64 guest_uaddr; 19635968b5ffSAnup Patel __u32 guest_len; 19645968b5ffSAnup Patel __u64 trans_uaddr; 19655968b5ffSAnup Patel __u32 trans_len; 19665968b5ffSAnup Patel }; 19675968b5ffSAnup Patel 1968304dcb64SAndre Przywara #define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0) 1969304dcb64SAndre Przywara #define KVM_DEV_ASSIGN_PCI_2_3 (1 << 1) 1970304dcb64SAndre Przywara #define KVM_DEV_ASSIGN_MASK_INTX (1 << 2) 1971304dcb64SAndre Przywara 1972304dcb64SAndre Przywara struct kvm_assigned_pci_dev { 1973304dcb64SAndre Przywara __u32 assigned_dev_id; 1974304dcb64SAndre Przywara __u32 busnr; 1975304dcb64SAndre Przywara __u32 devfn; 1976304dcb64SAndre Przywara __u32 flags; 1977304dcb64SAndre Przywara __u32 segnr; 1978304dcb64SAndre Przywara union { 1979304dcb64SAndre Przywara __u32 reserved[11]; 1980304dcb64SAndre Przywara }; 1981304dcb64SAndre Przywara }; 1982304dcb64SAndre Przywara 1983304dcb64SAndre Przywara #define KVM_DEV_IRQ_HOST_INTX (1 << 0) 1984304dcb64SAndre Przywara #define KVM_DEV_IRQ_HOST_MSI (1 << 1) 1985304dcb64SAndre Przywara #define KVM_DEV_IRQ_HOST_MSIX (1 << 2) 1986304dcb64SAndre Przywara 1987304dcb64SAndre Przywara #define KVM_DEV_IRQ_GUEST_INTX (1 << 8) 1988304dcb64SAndre Przywara #define KVM_DEV_IRQ_GUEST_MSI (1 << 9) 1989304dcb64SAndre Przywara #define KVM_DEV_IRQ_GUEST_MSIX (1 << 10) 1990304dcb64SAndre Przywara 1991304dcb64SAndre Przywara #define KVM_DEV_IRQ_HOST_MASK 0x00ff 1992304dcb64SAndre Przywara #define KVM_DEV_IRQ_GUEST_MASK 0xff00 1993304dcb64SAndre Przywara 1994304dcb64SAndre Przywara struct kvm_assigned_irq { 1995304dcb64SAndre Przywara __u32 assigned_dev_id; 1996304dcb64SAndre Przywara __u32 host_irq; /* ignored (legacy field) */ 1997304dcb64SAndre Przywara __u32 guest_irq; 1998304dcb64SAndre Przywara __u32 flags; 1999304dcb64SAndre Przywara union { 2000304dcb64SAndre Przywara __u32 reserved[12]; 2001304dcb64SAndre Przywara }; 2002304dcb64SAndre Przywara }; 2003304dcb64SAndre Przywara 2004304dcb64SAndre Przywara struct kvm_assigned_msix_nr { 2005304dcb64SAndre Przywara __u32 assigned_dev_id; 2006304dcb64SAndre Przywara __u16 entry_nr; 2007304dcb64SAndre Przywara __u16 padding; 2008304dcb64SAndre Przywara }; 2009304dcb64SAndre Przywara 2010304dcb64SAndre Przywara #define KVM_MAX_MSIX_PER_DEV 256 2011304dcb64SAndre Przywara struct kvm_assigned_msix_entry { 2012304dcb64SAndre Przywara __u32 assigned_dev_id; 2013304dcb64SAndre Przywara __u32 gsi; 2014304dcb64SAndre Przywara __u16 entry; /* The index of entry in the MSI-X table */ 2015304dcb64SAndre Przywara __u16 padding[3]; 2016304dcb64SAndre Przywara }; 2017304dcb64SAndre Przywara 2018764dfba1SAndre Przywara #define KVM_X2APIC_API_USE_32BIT_IDS (1ULL << 0) 2019764dfba1SAndre Przywara #define KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK (1ULL << 1) 2020764dfba1SAndre Przywara 20211bbe92f5SDave Martin /* Available with KVM_CAP_ARM_USER_IRQ */ 20221bbe92f5SDave Martin 20231bbe92f5SDave Martin /* Bits for run->s.regs.device_irq_level */ 20241bbe92f5SDave Martin #define KVM_ARM_DEV_EL1_VTIMER (1 << 0) 20251bbe92f5SDave Martin #define KVM_ARM_DEV_EL1_PTIMER (1 << 1) 20261bbe92f5SDave Martin #define KVM_ARM_DEV_PMU (1 << 2) 20271bbe92f5SDave Martin 20281bbe92f5SDave Martin struct kvm_hyperv_eventfd { 20291bbe92f5SDave Martin __u32 conn_id; 20301bbe92f5SDave Martin __s32 fd; 20311bbe92f5SDave Martin __u32 flags; 20321bbe92f5SDave Martin __u32 padding[3]; 20331bbe92f5SDave Martin }; 20341bbe92f5SDave Martin 20351bbe92f5SDave Martin #define KVM_HYPERV_CONN_ID_MASK 0x00ffffff 20361bbe92f5SDave Martin #define KVM_HYPERV_EVENTFD_DEASSIGN (1 << 0) 20371bbe92f5SDave Martin 20385968b5ffSAnup Patel #define KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE (1 << 0) 20395968b5ffSAnup Patel #define KVM_DIRTY_LOG_INITIALLY_SET (1 << 1) 20405968b5ffSAnup Patel 20415968b5ffSAnup Patel /* 20425968b5ffSAnup Patel * Arch needs to define the macro after implementing the dirty ring 20435968b5ffSAnup Patel * feature. KVM_DIRTY_LOG_PAGE_OFFSET should be defined as the 20445968b5ffSAnup Patel * starting page offset of the dirty ring structures. 20455968b5ffSAnup Patel */ 20465968b5ffSAnup Patel #ifndef KVM_DIRTY_LOG_PAGE_OFFSET 20475968b5ffSAnup Patel #define KVM_DIRTY_LOG_PAGE_OFFSET 0 20485968b5ffSAnup Patel #endif 20495968b5ffSAnup Patel 20505968b5ffSAnup Patel /* 20515968b5ffSAnup Patel * KVM dirty GFN flags, defined as: 20525968b5ffSAnup Patel * 20535968b5ffSAnup Patel * |---------------+---------------+--------------| 20545968b5ffSAnup Patel * | bit 1 (reset) | bit 0 (dirty) | Status | 20555968b5ffSAnup Patel * |---------------+---------------+--------------| 20565968b5ffSAnup Patel * | 0 | 0 | Invalid GFN | 20575968b5ffSAnup Patel * | 0 | 1 | Dirty GFN | 20585968b5ffSAnup Patel * | 1 | X | GFN to reset | 20595968b5ffSAnup Patel * |---------------+---------------+--------------| 20605968b5ffSAnup Patel * 20615968b5ffSAnup Patel * Lifecycle of a dirty GFN goes like: 20625968b5ffSAnup Patel * 20635968b5ffSAnup Patel * dirtied harvested reset 20645968b5ffSAnup Patel * 00 -----------> 01 -------------> 1X -------+ 20655968b5ffSAnup Patel * ^ | 20665968b5ffSAnup Patel * | | 20675968b5ffSAnup Patel * +------------------------------------------+ 20685968b5ffSAnup Patel * 20695968b5ffSAnup Patel * The userspace program is only responsible for the 01->1X state 20705968b5ffSAnup Patel * conversion after harvesting an entry. Also, it must not skip any 20715968b5ffSAnup Patel * dirty bits, so that dirty bits are always harvested in sequence. 20725968b5ffSAnup Patel */ 20735968b5ffSAnup Patel #define KVM_DIRTY_GFN_F_DIRTY _BITUL(0) 20745968b5ffSAnup Patel #define KVM_DIRTY_GFN_F_RESET _BITUL(1) 20755968b5ffSAnup Patel #define KVM_DIRTY_GFN_F_MASK 0x3 20765968b5ffSAnup Patel 20775968b5ffSAnup Patel /* 20785968b5ffSAnup Patel * KVM dirty rings should be mapped at KVM_DIRTY_LOG_PAGE_OFFSET of 20795968b5ffSAnup Patel * per-vcpu mmaped regions as an array of struct kvm_dirty_gfn. The 20805968b5ffSAnup Patel * size of the gfn buffer is decided by the first argument when 20815968b5ffSAnup Patel * enabling KVM_CAP_DIRTY_LOG_RING. 20825968b5ffSAnup Patel */ 20835968b5ffSAnup Patel struct kvm_dirty_gfn { 20845968b5ffSAnup Patel __u32 flags; 20855968b5ffSAnup Patel __u32 slot; 20865968b5ffSAnup Patel __u64 offset; 20875968b5ffSAnup Patel }; 20885968b5ffSAnup Patel 20895968b5ffSAnup Patel #define KVM_BUS_LOCK_DETECTION_OFF (1 << 0) 20905968b5ffSAnup Patel #define KVM_BUS_LOCK_DETECTION_EXIT (1 << 1) 20915968b5ffSAnup Patel 2092083a976eSAlexandru Elisei #define KVM_PMU_CAP_DISABLE (1 << 0) 2093083a976eSAlexandru Elisei 20945968b5ffSAnup Patel /** 20955968b5ffSAnup Patel * struct kvm_stats_header - Header of per vm/vcpu binary statistics data. 20965968b5ffSAnup Patel * @flags: Some extra information for header, always 0 for now. 20975968b5ffSAnup Patel * @name_size: The size in bytes of the memory which contains statistics 20985968b5ffSAnup Patel * name string including trailing '\0'. The memory is allocated 20995968b5ffSAnup Patel * at the send of statistics descriptor. 21005968b5ffSAnup Patel * @num_desc: The number of statistics the vm or vcpu has. 21015968b5ffSAnup Patel * @id_offset: The offset of the vm/vcpu stats' id string in the file pointed 21025968b5ffSAnup Patel * by vm/vcpu stats fd. 21035968b5ffSAnup Patel * @desc_offset: The offset of the vm/vcpu stats' descriptor block in the file 21045968b5ffSAnup Patel * pointd by vm/vcpu stats fd. 21055968b5ffSAnup Patel * @data_offset: The offset of the vm/vcpu stats' data block in the file 21065968b5ffSAnup Patel * pointed by vm/vcpu stats fd. 21075968b5ffSAnup Patel * 21085968b5ffSAnup Patel * This is the header userspace needs to read from stats fd before any other 21095968b5ffSAnup Patel * readings. It is used by userspace to discover all the information about the 21105968b5ffSAnup Patel * vm/vcpu's binary statistics. 21115968b5ffSAnup Patel * Userspace reads this header from the start of the vm/vcpu's stats fd. 21125968b5ffSAnup Patel */ 21135968b5ffSAnup Patel struct kvm_stats_header { 21145968b5ffSAnup Patel __u32 flags; 21155968b5ffSAnup Patel __u32 name_size; 21165968b5ffSAnup Patel __u32 num_desc; 21175968b5ffSAnup Patel __u32 id_offset; 21185968b5ffSAnup Patel __u32 desc_offset; 21195968b5ffSAnup Patel __u32 data_offset; 21205968b5ffSAnup Patel }; 21215968b5ffSAnup Patel 21225968b5ffSAnup Patel #define KVM_STATS_TYPE_SHIFT 0 21235968b5ffSAnup Patel #define KVM_STATS_TYPE_MASK (0xF << KVM_STATS_TYPE_SHIFT) 21245968b5ffSAnup Patel #define KVM_STATS_TYPE_CUMULATIVE (0x0 << KVM_STATS_TYPE_SHIFT) 21255968b5ffSAnup Patel #define KVM_STATS_TYPE_INSTANT (0x1 << KVM_STATS_TYPE_SHIFT) 21265968b5ffSAnup Patel #define KVM_STATS_TYPE_PEAK (0x2 << KVM_STATS_TYPE_SHIFT) 21275968b5ffSAnup Patel #define KVM_STATS_TYPE_LINEAR_HIST (0x3 << KVM_STATS_TYPE_SHIFT) 21285968b5ffSAnup Patel #define KVM_STATS_TYPE_LOG_HIST (0x4 << KVM_STATS_TYPE_SHIFT) 21295968b5ffSAnup Patel #define KVM_STATS_TYPE_MAX KVM_STATS_TYPE_LOG_HIST 21305968b5ffSAnup Patel 21315968b5ffSAnup Patel #define KVM_STATS_UNIT_SHIFT 4 21325968b5ffSAnup Patel #define KVM_STATS_UNIT_MASK (0xF << KVM_STATS_UNIT_SHIFT) 21335968b5ffSAnup Patel #define KVM_STATS_UNIT_NONE (0x0 << KVM_STATS_UNIT_SHIFT) 21345968b5ffSAnup Patel #define KVM_STATS_UNIT_BYTES (0x1 << KVM_STATS_UNIT_SHIFT) 21355968b5ffSAnup Patel #define KVM_STATS_UNIT_SECONDS (0x2 << KVM_STATS_UNIT_SHIFT) 21365968b5ffSAnup Patel #define KVM_STATS_UNIT_CYCLES (0x3 << KVM_STATS_UNIT_SHIFT) 21378d0facecSAnup Patel #define KVM_STATS_UNIT_BOOLEAN (0x4 << KVM_STATS_UNIT_SHIFT) 21388d0facecSAnup Patel #define KVM_STATS_UNIT_MAX KVM_STATS_UNIT_BOOLEAN 21395968b5ffSAnup Patel 21405968b5ffSAnup Patel #define KVM_STATS_BASE_SHIFT 8 21415968b5ffSAnup Patel #define KVM_STATS_BASE_MASK (0xF << KVM_STATS_BASE_SHIFT) 21425968b5ffSAnup Patel #define KVM_STATS_BASE_POW10 (0x0 << KVM_STATS_BASE_SHIFT) 21435968b5ffSAnup Patel #define KVM_STATS_BASE_POW2 (0x1 << KVM_STATS_BASE_SHIFT) 21445968b5ffSAnup Patel #define KVM_STATS_BASE_MAX KVM_STATS_BASE_POW2 21455968b5ffSAnup Patel 21465968b5ffSAnup Patel /** 21475968b5ffSAnup Patel * struct kvm_stats_desc - Descriptor of a KVM statistics. 21485968b5ffSAnup Patel * @flags: Annotations of the stats, like type, unit, etc. 21495968b5ffSAnup Patel * @exponent: Used together with @flags to determine the unit. 21505968b5ffSAnup Patel * @size: The number of data items for this stats. 21515968b5ffSAnup Patel * Every data item is of type __u64. 21525968b5ffSAnup Patel * @offset: The offset of the stats to the start of stat structure in 21535968b5ffSAnup Patel * structure kvm or kvm_vcpu. 21545968b5ffSAnup Patel * @bucket_size: A parameter value used for histogram stats. It is only used 21555968b5ffSAnup Patel * for linear histogram stats, specifying the size of the bucket; 21565968b5ffSAnup Patel * @name: The name string for the stats. Its size is indicated by the 21575968b5ffSAnup Patel * &kvm_stats_header->name_size. 21585968b5ffSAnup Patel */ 21595968b5ffSAnup Patel struct kvm_stats_desc { 21605968b5ffSAnup Patel __u32 flags; 21615968b5ffSAnup Patel __s16 exponent; 21625968b5ffSAnup Patel __u16 size; 21635968b5ffSAnup Patel __u32 offset; 21645968b5ffSAnup Patel __u32 bucket_size; 21655968b5ffSAnup Patel char name[]; 21665968b5ffSAnup Patel }; 21675968b5ffSAnup Patel 21685968b5ffSAnup Patel #define KVM_GET_STATS_FD _IO(KVMIO, 0xce) 21695968b5ffSAnup Patel 2170af1b793cSAlexandru Elisei /* Available with KVM_CAP_XSAVE2 */ 2171af1b793cSAlexandru Elisei #define KVM_GET_XSAVE2 _IOR(KVMIO, 0xcf, struct kvm_xsave) 2172af1b793cSAlexandru Elisei 21738d0facecSAnup Patel /* Available with KVM_CAP_S390_PROTECTED_DUMP */ 21748d0facecSAnup Patel #define KVM_S390_PV_CPU_COMMAND _IOWR(KVMIO, 0xd0, struct kvm_pv_cmd) 21758d0facecSAnup Patel 21768d0facecSAnup Patel /* Available with KVM_CAP_X86_NOTIFY_VMEXIT */ 21778d0facecSAnup Patel #define KVM_X86_NOTIFY_VMEXIT_ENABLED (1ULL << 0) 21788d0facecSAnup Patel #define KVM_X86_NOTIFY_VMEXIT_USER (1ULL << 1) 21798d0facecSAnup Patel 21808d0facecSAnup Patel /* Available with KVM_CAP_S390_ZPCI_OP */ 21818d0facecSAnup Patel #define KVM_S390_ZPCI_OP _IOW(KVMIO, 0xd1, struct kvm_s390_zpci_op) 21828d0facecSAnup Patel 21838d0facecSAnup Patel struct kvm_s390_zpci_op { 21848d0facecSAnup Patel /* in */ 21858d0facecSAnup Patel __u32 fh; /* target device */ 21868d0facecSAnup Patel __u8 op; /* operation to perform */ 21878d0facecSAnup Patel __u8 pad[3]; 21888d0facecSAnup Patel union { 21898d0facecSAnup Patel /* for KVM_S390_ZPCIOP_REG_AEN */ 21908d0facecSAnup Patel struct { 21918d0facecSAnup Patel __u64 ibv; /* Guest addr of interrupt bit vector */ 21928d0facecSAnup Patel __u64 sb; /* Guest addr of summary bit */ 21938d0facecSAnup Patel __u32 flags; 21948d0facecSAnup Patel __u32 noi; /* Number of interrupts */ 21958d0facecSAnup Patel __u8 isc; /* Guest interrupt subclass */ 21968d0facecSAnup Patel __u8 sbo; /* Offset of guest summary bit vector */ 21978d0facecSAnup Patel __u16 pad; 21988d0facecSAnup Patel } reg_aen; 21998d0facecSAnup Patel __u64 reserved[8]; 22008d0facecSAnup Patel } u; 22018d0facecSAnup Patel }; 22028d0facecSAnup Patel 22038d0facecSAnup Patel /* types for kvm_s390_zpci_op->op */ 22048d0facecSAnup Patel #define KVM_S390_ZPCIOP_REG_AEN 0 22058d0facecSAnup Patel #define KVM_S390_ZPCIOP_DEREG_AEN 1 22068d0facecSAnup Patel 22078d0facecSAnup Patel /* flags for kvm_s390_zpci_op->u.reg_aen.flags */ 22088d0facecSAnup Patel #define KVM_S390_ZPCIOP_REGAEN_HOST (1 << 0) 22098d0facecSAnup Patel 2210*99684681SAnup Patel /* Available with KVM_CAP_MEMORY_ATTRIBUTES */ 2211*99684681SAnup Patel #define KVM_SET_MEMORY_ATTRIBUTES _IOW(KVMIO, 0xd2, struct kvm_memory_attributes) 2212*99684681SAnup Patel 2213*99684681SAnup Patel struct kvm_memory_attributes { 2214*99684681SAnup Patel __u64 address; 2215*99684681SAnup Patel __u64 size; 2216*99684681SAnup Patel __u64 attributes; 2217*99684681SAnup Patel __u64 flags; 2218*99684681SAnup Patel }; 2219*99684681SAnup Patel 2220*99684681SAnup Patel #define KVM_MEMORY_ATTRIBUTE_PRIVATE (1ULL << 3) 2221*99684681SAnup Patel 2222*99684681SAnup Patel #define KVM_CREATE_GUEST_MEMFD _IOWR(KVMIO, 0xd4, struct kvm_create_guest_memfd) 2223*99684681SAnup Patel 2224*99684681SAnup Patel struct kvm_create_guest_memfd { 2225*99684681SAnup Patel __u64 size; 2226*99684681SAnup Patel __u64 flags; 2227*99684681SAnup Patel __u64 reserved[6]; 2228*99684681SAnup Patel }; 2229*99684681SAnup Patel 2230304dcb64SAndre Przywara #endif /* __LINUX_KVM_H */ 2231