11bbe92f5SDave Martin /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2304dcb64SAndre Przywara #ifndef __LINUX_KVM_H 3304dcb64SAndre Przywara #define __LINUX_KVM_H 4304dcb64SAndre Przywara 5304dcb64SAndre Przywara /* 6304dcb64SAndre Przywara * Userspace interface for /dev/kvm - kernel based virtual machine 7304dcb64SAndre Przywara * 8304dcb64SAndre Przywara * Note: you must update KVM_API_VERSION if you change this interface. 9304dcb64SAndre Przywara */ 10304dcb64SAndre Przywara 115968b5ffSAnup Patel #include <linux/const.h> 12304dcb64SAndre Przywara #include <linux/types.h> 13304dcb64SAndre Przywara #include <linux/compiler.h> 14304dcb64SAndre Przywara #include <linux/ioctl.h> 15304dcb64SAndre Przywara #include <asm/kvm.h> 16304dcb64SAndre Przywara 17304dcb64SAndre Przywara #define KVM_API_VERSION 12 18304dcb64SAndre Przywara 19304dcb64SAndre Przywara /* *** Deprecated interfaces *** */ 20304dcb64SAndre Przywara 21304dcb64SAndre Przywara #define KVM_TRC_SHIFT 16 22304dcb64SAndre Przywara 23304dcb64SAndre Przywara #define KVM_TRC_ENTRYEXIT (1 << KVM_TRC_SHIFT) 24304dcb64SAndre Przywara #define KVM_TRC_HANDLER (1 << (KVM_TRC_SHIFT + 1)) 25304dcb64SAndre Przywara 26304dcb64SAndre Przywara #define KVM_TRC_VMENTRY (KVM_TRC_ENTRYEXIT + 0x01) 27304dcb64SAndre Przywara #define KVM_TRC_VMEXIT (KVM_TRC_ENTRYEXIT + 0x02) 28304dcb64SAndre Przywara #define KVM_TRC_PAGE_FAULT (KVM_TRC_HANDLER + 0x01) 29304dcb64SAndre Przywara 30304dcb64SAndre Przywara #define KVM_TRC_HEAD_SIZE 12 31304dcb64SAndre Przywara #define KVM_TRC_CYCLE_SIZE 8 32304dcb64SAndre Przywara #define KVM_TRC_EXTRA_MAX 7 33304dcb64SAndre Przywara 34304dcb64SAndre Przywara #define KVM_TRC_INJ_VIRQ (KVM_TRC_HANDLER + 0x02) 35304dcb64SAndre Przywara #define KVM_TRC_REDELIVER_EVT (KVM_TRC_HANDLER + 0x03) 36304dcb64SAndre Przywara #define KVM_TRC_PEND_INTR (KVM_TRC_HANDLER + 0x04) 37304dcb64SAndre Przywara #define KVM_TRC_IO_READ (KVM_TRC_HANDLER + 0x05) 38304dcb64SAndre Przywara #define KVM_TRC_IO_WRITE (KVM_TRC_HANDLER + 0x06) 39304dcb64SAndre Przywara #define KVM_TRC_CR_READ (KVM_TRC_HANDLER + 0x07) 40304dcb64SAndre Przywara #define KVM_TRC_CR_WRITE (KVM_TRC_HANDLER + 0x08) 41304dcb64SAndre Przywara #define KVM_TRC_DR_READ (KVM_TRC_HANDLER + 0x09) 42304dcb64SAndre Przywara #define KVM_TRC_DR_WRITE (KVM_TRC_HANDLER + 0x0A) 43304dcb64SAndre Przywara #define KVM_TRC_MSR_READ (KVM_TRC_HANDLER + 0x0B) 44304dcb64SAndre Przywara #define KVM_TRC_MSR_WRITE (KVM_TRC_HANDLER + 0x0C) 45304dcb64SAndre Przywara #define KVM_TRC_CPUID (KVM_TRC_HANDLER + 0x0D) 46304dcb64SAndre Przywara #define KVM_TRC_INTR (KVM_TRC_HANDLER + 0x0E) 47304dcb64SAndre Przywara #define KVM_TRC_NMI (KVM_TRC_HANDLER + 0x0F) 48304dcb64SAndre Przywara #define KVM_TRC_VMMCALL (KVM_TRC_HANDLER + 0x10) 49304dcb64SAndre Przywara #define KVM_TRC_HLT (KVM_TRC_HANDLER + 0x11) 50304dcb64SAndre Przywara #define KVM_TRC_CLTS (KVM_TRC_HANDLER + 0x12) 51304dcb64SAndre Przywara #define KVM_TRC_LMSW (KVM_TRC_HANDLER + 0x13) 52304dcb64SAndre Przywara #define KVM_TRC_APIC_ACCESS (KVM_TRC_HANDLER + 0x14) 53304dcb64SAndre Przywara #define KVM_TRC_TDP_FAULT (KVM_TRC_HANDLER + 0x15) 54304dcb64SAndre Przywara #define KVM_TRC_GTLB_WRITE (KVM_TRC_HANDLER + 0x16) 55304dcb64SAndre Przywara #define KVM_TRC_STLB_WRITE (KVM_TRC_HANDLER + 0x17) 56304dcb64SAndre Przywara #define KVM_TRC_STLB_INVAL (KVM_TRC_HANDLER + 0x18) 57304dcb64SAndre Przywara #define KVM_TRC_PPC_INSTR (KVM_TRC_HANDLER + 0x19) 58304dcb64SAndre Przywara 59304dcb64SAndre Przywara struct kvm_user_trace_setup { 60304dcb64SAndre Przywara __u32 buf_size; 61304dcb64SAndre Przywara __u32 buf_nr; 62304dcb64SAndre Przywara }; 63304dcb64SAndre Przywara 64304dcb64SAndre Przywara #define __KVM_DEPRECATED_MAIN_W_0x06 \ 65304dcb64SAndre Przywara _IOW(KVMIO, 0x06, struct kvm_user_trace_setup) 66304dcb64SAndre Przywara #define __KVM_DEPRECATED_MAIN_0x07 _IO(KVMIO, 0x07) 67304dcb64SAndre Przywara #define __KVM_DEPRECATED_MAIN_0x08 _IO(KVMIO, 0x08) 68304dcb64SAndre Przywara 69304dcb64SAndre Przywara #define __KVM_DEPRECATED_VM_R_0x70 _IOR(KVMIO, 0x70, struct kvm_assigned_irq) 70304dcb64SAndre Przywara 71304dcb64SAndre Przywara struct kvm_breakpoint { 72304dcb64SAndre Przywara __u32 enabled; 73304dcb64SAndre Przywara __u32 padding; 74304dcb64SAndre Przywara __u64 address; 75304dcb64SAndre Przywara }; 76304dcb64SAndre Przywara 77304dcb64SAndre Przywara struct kvm_debug_guest { 78304dcb64SAndre Przywara __u32 enabled; 79304dcb64SAndre Przywara __u32 pad; 80304dcb64SAndre Przywara struct kvm_breakpoint breakpoints[4]; 81304dcb64SAndre Przywara __u32 singlestep; 82304dcb64SAndre Przywara }; 83304dcb64SAndre Przywara 84304dcb64SAndre Przywara #define __KVM_DEPRECATED_VCPU_W_0x87 _IOW(KVMIO, 0x87, struct kvm_debug_guest) 85304dcb64SAndre Przywara 86304dcb64SAndre Przywara /* *** End of deprecated interfaces *** */ 87304dcb64SAndre Przywara 88304dcb64SAndre Przywara 89304dcb64SAndre Przywara /* for KVM_SET_USER_MEMORY_REGION */ 90304dcb64SAndre Przywara struct kvm_userspace_memory_region { 91304dcb64SAndre Przywara __u32 slot; 92304dcb64SAndre Przywara __u32 flags; 93304dcb64SAndre Przywara __u64 guest_phys_addr; 94304dcb64SAndre Przywara __u64 memory_size; /* bytes */ 95304dcb64SAndre Przywara __u64 userspace_addr; /* start of the userspace allocated memory */ 96304dcb64SAndre Przywara }; 97304dcb64SAndre Przywara 98304dcb64SAndre Przywara /* 99be986824SAnup Patel * The bit 0 ~ bit 15 of kvm_userspace_memory_region::flags are visible for 100be986824SAnup Patel * userspace, other bits are reserved for kvm internal use which are defined 101be986824SAnup Patel * in include/linux/kvm_host.h. 102304dcb64SAndre Przywara */ 103304dcb64SAndre Przywara #define KVM_MEM_LOG_DIRTY_PAGES (1UL << 0) 104304dcb64SAndre Przywara #define KVM_MEM_READONLY (1UL << 1) 105304dcb64SAndre Przywara 106304dcb64SAndre Przywara /* for KVM_IRQ_LINE */ 107304dcb64SAndre Przywara struct kvm_irq_level { 108304dcb64SAndre Przywara /* 109304dcb64SAndre Przywara * ACPI gsi notion of irq. 110304dcb64SAndre Przywara * For IA-64 (APIC model) IOAPIC0: irq 0-23; IOAPIC1: irq 24-47.. 111304dcb64SAndre Przywara * For X86 (standard AT mode) PIC0/1: irq 0-15. IOAPIC0: 0-23.. 1125968b5ffSAnup Patel * For ARM: See Documentation/virt/kvm/api.rst 113304dcb64SAndre Przywara */ 114304dcb64SAndre Przywara union { 115304dcb64SAndre Przywara __u32 irq; 116304dcb64SAndre Przywara __s32 status; 117304dcb64SAndre Przywara }; 118304dcb64SAndre Przywara __u32 level; 119304dcb64SAndre Przywara }; 120304dcb64SAndre Przywara 121304dcb64SAndre Przywara 122304dcb64SAndre Przywara struct kvm_irqchip { 123304dcb64SAndre Przywara __u32 chip_id; 124304dcb64SAndre Przywara __u32 pad; 125304dcb64SAndre Przywara union { 126304dcb64SAndre Przywara char dummy[512]; /* reserving space */ 127304dcb64SAndre Przywara #ifdef __KVM_HAVE_PIT 128304dcb64SAndre Przywara struct kvm_pic_state pic; 129304dcb64SAndre Przywara #endif 130304dcb64SAndre Przywara #ifdef __KVM_HAVE_IOAPIC 131304dcb64SAndre Przywara struct kvm_ioapic_state ioapic; 132304dcb64SAndre Przywara #endif 133304dcb64SAndre Przywara } chip; 134304dcb64SAndre Przywara }; 135304dcb64SAndre Przywara 136304dcb64SAndre Przywara /* for KVM_CREATE_PIT2 */ 137304dcb64SAndre Przywara struct kvm_pit_config { 138304dcb64SAndre Przywara __u32 flags; 139304dcb64SAndre Przywara __u32 pad[15]; 140304dcb64SAndre Przywara }; 141304dcb64SAndre Przywara 142304dcb64SAndre Przywara #define KVM_PIT_SPEAKER_DUMMY 1 143304dcb64SAndre Przywara 144304dcb64SAndre Przywara struct kvm_s390_skeys { 145304dcb64SAndre Przywara __u64 start_gfn; 146304dcb64SAndre Przywara __u64 count; 147304dcb64SAndre Przywara __u64 skeydata_addr; 148304dcb64SAndre Przywara __u32 flags; 149304dcb64SAndre Przywara __u32 reserved[9]; 150304dcb64SAndre Przywara }; 151b3f606e1SMarc Zyngier 1521bbe92f5SDave Martin #define KVM_S390_CMMA_PEEK (1 << 0) 1531bbe92f5SDave Martin 1541bbe92f5SDave Martin /** 1551bbe92f5SDave Martin * kvm_s390_cmma_log - Used for CMMA migration. 1561bbe92f5SDave Martin * 1571bbe92f5SDave Martin * Used both for input and output. 1581bbe92f5SDave Martin * 1591bbe92f5SDave Martin * @start_gfn: Guest page number to start from. 1601bbe92f5SDave Martin * @count: Size of the result buffer. 1611bbe92f5SDave Martin * @flags: Control operation mode via KVM_S390_CMMA_* flags 1621bbe92f5SDave Martin * @remaining: Used with KVM_S390_GET_CMMA_BITS. Indicates how many dirty 1631bbe92f5SDave Martin * pages are still remaining. 1641bbe92f5SDave Martin * @mask: Used with KVM_S390_SET_CMMA_BITS. Bitmap of bits to actually set 1651bbe92f5SDave Martin * in the PGSTE. 1661bbe92f5SDave Martin * @values: Pointer to the values buffer. 1671bbe92f5SDave Martin * 1681bbe92f5SDave Martin * Used in KVM_S390_{G,S}ET_CMMA_BITS ioctls. 1691bbe92f5SDave Martin */ 1701bbe92f5SDave Martin struct kvm_s390_cmma_log { 1711bbe92f5SDave Martin __u64 start_gfn; 1721bbe92f5SDave Martin __u32 count; 1731bbe92f5SDave Martin __u32 flags; 1741bbe92f5SDave Martin union { 1751bbe92f5SDave Martin __u64 remaining; 1761bbe92f5SDave Martin __u64 mask; 1771bbe92f5SDave Martin }; 1781bbe92f5SDave Martin __u64 values; 1791bbe92f5SDave Martin }; 1801bbe92f5SDave Martin 181b3f606e1SMarc Zyngier struct kvm_hyperv_exit { 182b3f606e1SMarc Zyngier #define KVM_EXIT_HYPERV_SYNIC 1 183b37ed70eSAndre Przywara #define KVM_EXIT_HYPERV_HCALL 2 1845968b5ffSAnup Patel #define KVM_EXIT_HYPERV_SYNDBG 3 185b3f606e1SMarc Zyngier __u32 type; 1865968b5ffSAnup Patel __u32 pad1; 187b3f606e1SMarc Zyngier union { 188b3f606e1SMarc Zyngier struct { 189b3f606e1SMarc Zyngier __u32 msr; 1905968b5ffSAnup Patel __u32 pad2; 191b3f606e1SMarc Zyngier __u64 control; 192b3f606e1SMarc Zyngier __u64 evt_page; 193b3f606e1SMarc Zyngier __u64 msg_page; 194b3f606e1SMarc Zyngier } synic; 195b37ed70eSAndre Przywara struct { 196b37ed70eSAndre Przywara __u64 input; 197b37ed70eSAndre Przywara __u64 result; 198b37ed70eSAndre Przywara __u64 params[2]; 199b37ed70eSAndre Przywara } hcall; 2005968b5ffSAnup Patel struct { 2015968b5ffSAnup Patel __u32 msr; 2025968b5ffSAnup Patel __u32 pad2; 2035968b5ffSAnup Patel __u64 control; 2045968b5ffSAnup Patel __u64 status; 2055968b5ffSAnup Patel __u64 send_page; 2065968b5ffSAnup Patel __u64 recv_page; 2075968b5ffSAnup Patel __u64 pending_page; 2085968b5ffSAnup Patel } syndbg; 2095968b5ffSAnup Patel } u; 2105968b5ffSAnup Patel }; 2115968b5ffSAnup Patel 2125968b5ffSAnup Patel struct kvm_xen_exit { 2135968b5ffSAnup Patel #define KVM_EXIT_XEN_HCALL 1 2145968b5ffSAnup Patel __u32 type; 2155968b5ffSAnup Patel union { 2165968b5ffSAnup Patel struct { 2175968b5ffSAnup Patel __u32 longmode; 2185968b5ffSAnup Patel __u32 cpl; 2195968b5ffSAnup Patel __u64 input; 2205968b5ffSAnup Patel __u64 result; 2215968b5ffSAnup Patel __u64 params[6]; 2225968b5ffSAnup Patel } hcall; 223b3f606e1SMarc Zyngier } u; 224b3f606e1SMarc Zyngier }; 225b3f606e1SMarc Zyngier 226304dcb64SAndre Przywara #define KVM_S390_GET_SKEYS_NONE 1 227304dcb64SAndre Przywara #define KVM_S390_SKEYS_MAX 1048576 228304dcb64SAndre Przywara 229304dcb64SAndre Przywara #define KVM_EXIT_UNKNOWN 0 230304dcb64SAndre Przywara #define KVM_EXIT_EXCEPTION 1 231304dcb64SAndre Przywara #define KVM_EXIT_IO 2 232304dcb64SAndre Przywara #define KVM_EXIT_HYPERCALL 3 233304dcb64SAndre Przywara #define KVM_EXIT_DEBUG 4 234304dcb64SAndre Przywara #define KVM_EXIT_HLT 5 235304dcb64SAndre Przywara #define KVM_EXIT_MMIO 6 236304dcb64SAndre Przywara #define KVM_EXIT_IRQ_WINDOW_OPEN 7 237304dcb64SAndre Przywara #define KVM_EXIT_SHUTDOWN 8 238304dcb64SAndre Przywara #define KVM_EXIT_FAIL_ENTRY 9 239304dcb64SAndre Przywara #define KVM_EXIT_INTR 10 240304dcb64SAndre Przywara #define KVM_EXIT_SET_TPR 11 241304dcb64SAndre Przywara #define KVM_EXIT_TPR_ACCESS 12 242304dcb64SAndre Przywara #define KVM_EXIT_S390_SIEIC 13 243304dcb64SAndre Przywara #define KVM_EXIT_S390_RESET 14 244304dcb64SAndre Przywara #define KVM_EXIT_DCR 15 /* deprecated */ 245304dcb64SAndre Przywara #define KVM_EXIT_NMI 16 246304dcb64SAndre Przywara #define KVM_EXIT_INTERNAL_ERROR 17 247304dcb64SAndre Przywara #define KVM_EXIT_OSI 18 248304dcb64SAndre Przywara #define KVM_EXIT_PAPR_HCALL 19 249304dcb64SAndre Przywara #define KVM_EXIT_S390_UCONTROL 20 250304dcb64SAndre Przywara #define KVM_EXIT_WATCHDOG 21 251304dcb64SAndre Przywara #define KVM_EXIT_S390_TSCH 22 252304dcb64SAndre Przywara #define KVM_EXIT_EPR 23 253304dcb64SAndre Przywara #define KVM_EXIT_SYSTEM_EVENT 24 254304dcb64SAndre Przywara #define KVM_EXIT_S390_STSI 25 255b3f606e1SMarc Zyngier #define KVM_EXIT_IOAPIC_EOI 26 256b3f606e1SMarc Zyngier #define KVM_EXIT_HYPERV 27 2575968b5ffSAnup Patel #define KVM_EXIT_ARM_NISV 28 2585968b5ffSAnup Patel #define KVM_EXIT_X86_RDMSR 29 2595968b5ffSAnup Patel #define KVM_EXIT_X86_WRMSR 30 2605968b5ffSAnup Patel #define KVM_EXIT_DIRTY_RING_FULL 31 2615968b5ffSAnup Patel #define KVM_EXIT_AP_RESET_HOLD 32 2625968b5ffSAnup Patel #define KVM_EXIT_X86_BUS_LOCK 33 2635968b5ffSAnup Patel #define KVM_EXIT_XEN 34 2645968b5ffSAnup Patel #define KVM_EXIT_RISCV_SBI 35 2658d0facecSAnup Patel #define KVM_EXIT_RISCV_CSR 36 2668d0facecSAnup Patel #define KVM_EXIT_NOTIFY 37 267*92ef2dcdSWill Deacon #define KVM_EXIT_LOONGARCH_IOCSR 38 268304dcb64SAndre Przywara 269304dcb64SAndre Przywara /* For KVM_EXIT_INTERNAL_ERROR */ 270304dcb64SAndre Przywara /* Emulate instruction failed. */ 271304dcb64SAndre Przywara #define KVM_INTERNAL_ERROR_EMULATION 1 272304dcb64SAndre Przywara /* Encounter unexpected simultaneous exceptions. */ 273304dcb64SAndre Przywara #define KVM_INTERNAL_ERROR_SIMUL_EX 2 274304dcb64SAndre Przywara /* Encounter unexpected vm-exit due to delivery event. */ 275304dcb64SAndre Przywara #define KVM_INTERNAL_ERROR_DELIVERY_EV 3 2765968b5ffSAnup Patel /* Encounter unexpected vm-exit reason */ 2775968b5ffSAnup Patel #define KVM_INTERNAL_ERROR_UNEXPECTED_EXIT_REASON 4 2785968b5ffSAnup Patel 2795968b5ffSAnup Patel /* Flags that describe what fields in emulation_failure hold valid data. */ 2805968b5ffSAnup Patel #define KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES (1ULL << 0) 281304dcb64SAndre Przywara 282304dcb64SAndre Przywara /* for KVM_RUN, returned by mmap(vcpu_fd, offset=0) */ 283304dcb64SAndre Przywara struct kvm_run { 284304dcb64SAndre Przywara /* in */ 285304dcb64SAndre Przywara __u8 request_interrupt_window; 286764dfba1SAndre Przywara __u8 immediate_exit; 287764dfba1SAndre Przywara __u8 padding1[6]; 288304dcb64SAndre Przywara 289304dcb64SAndre Przywara /* out */ 290304dcb64SAndre Przywara __u32 exit_reason; 291304dcb64SAndre Przywara __u8 ready_for_interrupt_injection; 292304dcb64SAndre Przywara __u8 if_flag; 293b3f606e1SMarc Zyngier __u16 flags; 294304dcb64SAndre Przywara 295304dcb64SAndre Przywara /* in (pre_kvm_run), out (post_kvm_run) */ 296304dcb64SAndre Przywara __u64 cr8; 297304dcb64SAndre Przywara __u64 apic_base; 298304dcb64SAndre Przywara 299304dcb64SAndre Przywara #ifdef __KVM_S390 300304dcb64SAndre Przywara /* the processor status word for s390 */ 301304dcb64SAndre Przywara __u64 psw_mask; /* psw upper half */ 302304dcb64SAndre Przywara __u64 psw_addr; /* psw lower half */ 303304dcb64SAndre Przywara #endif 304304dcb64SAndre Przywara union { 305304dcb64SAndre Przywara /* KVM_EXIT_UNKNOWN */ 306304dcb64SAndre Przywara struct { 307304dcb64SAndre Przywara __u64 hardware_exit_reason; 308304dcb64SAndre Przywara } hw; 309304dcb64SAndre Przywara /* KVM_EXIT_FAIL_ENTRY */ 310304dcb64SAndre Przywara struct { 311304dcb64SAndre Przywara __u64 hardware_entry_failure_reason; 3125968b5ffSAnup Patel __u32 cpu; 313304dcb64SAndre Przywara } fail_entry; 314304dcb64SAndre Przywara /* KVM_EXIT_EXCEPTION */ 315304dcb64SAndre Przywara struct { 316304dcb64SAndre Przywara __u32 exception; 317304dcb64SAndre Przywara __u32 error_code; 318304dcb64SAndre Przywara } ex; 319304dcb64SAndre Przywara /* KVM_EXIT_IO */ 320304dcb64SAndre Przywara struct { 321304dcb64SAndre Przywara #define KVM_EXIT_IO_IN 0 322304dcb64SAndre Przywara #define KVM_EXIT_IO_OUT 1 323304dcb64SAndre Przywara __u8 direction; 324304dcb64SAndre Przywara __u8 size; /* bytes */ 325304dcb64SAndre Przywara __u16 port; 326304dcb64SAndre Przywara __u32 count; 327304dcb64SAndre Przywara __u64 data_offset; /* relative to kvm_run start */ 328304dcb64SAndre Przywara } io; 329b3f606e1SMarc Zyngier /* KVM_EXIT_DEBUG */ 330304dcb64SAndre Przywara struct { 331304dcb64SAndre Przywara struct kvm_debug_exit_arch arch; 332304dcb64SAndre Przywara } debug; 333304dcb64SAndre Przywara /* KVM_EXIT_MMIO */ 334304dcb64SAndre Przywara struct { 335304dcb64SAndre Przywara __u64 phys_addr; 336304dcb64SAndre Przywara __u8 data[8]; 337304dcb64SAndre Przywara __u32 len; 338304dcb64SAndre Przywara __u8 is_write; 339304dcb64SAndre Przywara } mmio; 340*92ef2dcdSWill Deacon /* KVM_EXIT_LOONGARCH_IOCSR */ 341*92ef2dcdSWill Deacon struct { 342*92ef2dcdSWill Deacon __u64 phys_addr; 343*92ef2dcdSWill Deacon __u8 data[8]; 344*92ef2dcdSWill Deacon __u32 len; 345*92ef2dcdSWill Deacon __u8 is_write; 346*92ef2dcdSWill Deacon } iocsr_io; 347304dcb64SAndre Przywara /* KVM_EXIT_HYPERCALL */ 348304dcb64SAndre Przywara struct { 349304dcb64SAndre Przywara __u64 nr; 350304dcb64SAndre Przywara __u64 args[6]; 351304dcb64SAndre Przywara __u64 ret; 352be986824SAnup Patel 353be986824SAnup Patel union { 354be986824SAnup Patel #ifndef __KERNEL__ 355304dcb64SAndre Przywara __u32 longmode; 356be986824SAnup Patel #endif 357be986824SAnup Patel __u64 flags; 358be986824SAnup Patel }; 359304dcb64SAndre Przywara } hypercall; 360304dcb64SAndre Przywara /* KVM_EXIT_TPR_ACCESS */ 361304dcb64SAndre Przywara struct { 362304dcb64SAndre Przywara __u64 rip; 363304dcb64SAndre Przywara __u32 is_write; 364304dcb64SAndre Przywara __u32 pad; 365304dcb64SAndre Przywara } tpr_access; 366304dcb64SAndre Przywara /* KVM_EXIT_S390_SIEIC */ 367304dcb64SAndre Przywara struct { 368304dcb64SAndre Przywara __u8 icptcode; 369304dcb64SAndre Przywara __u16 ipa; 370304dcb64SAndre Przywara __u32 ipb; 371304dcb64SAndre Przywara } s390_sieic; 372304dcb64SAndre Przywara /* KVM_EXIT_S390_RESET */ 373304dcb64SAndre Przywara #define KVM_S390_RESET_POR 1 374304dcb64SAndre Przywara #define KVM_S390_RESET_CLEAR 2 375304dcb64SAndre Przywara #define KVM_S390_RESET_SUBSYSTEM 4 376304dcb64SAndre Przywara #define KVM_S390_RESET_CPU_INIT 8 377304dcb64SAndre Przywara #define KVM_S390_RESET_IPL 16 378304dcb64SAndre Przywara __u64 s390_reset_flags; 379304dcb64SAndre Przywara /* KVM_EXIT_S390_UCONTROL */ 380304dcb64SAndre Przywara struct { 381304dcb64SAndre Przywara __u64 trans_exc_code; 382304dcb64SAndre Przywara __u32 pgm_code; 383304dcb64SAndre Przywara } s390_ucontrol; 384304dcb64SAndre Przywara /* KVM_EXIT_DCR (deprecated) */ 385304dcb64SAndre Przywara struct { 386304dcb64SAndre Przywara __u32 dcrn; 387304dcb64SAndre Przywara __u32 data; 388304dcb64SAndre Przywara __u8 is_write; 389304dcb64SAndre Przywara } dcr; 390b3f606e1SMarc Zyngier /* KVM_EXIT_INTERNAL_ERROR */ 391304dcb64SAndre Przywara struct { 392304dcb64SAndre Przywara __u32 suberror; 393304dcb64SAndre Przywara /* Available with KVM_CAP_INTERNAL_ERROR_DATA: */ 394304dcb64SAndre Przywara __u32 ndata; 395304dcb64SAndre Przywara __u64 data[16]; 396304dcb64SAndre Przywara } internal; 3975968b5ffSAnup Patel /* 3985968b5ffSAnup Patel * KVM_INTERNAL_ERROR_EMULATION 3995968b5ffSAnup Patel * 4005968b5ffSAnup Patel * "struct emulation_failure" is an overlay of "struct internal" 4015968b5ffSAnup Patel * that is used for the KVM_INTERNAL_ERROR_EMULATION sub-type of 4025968b5ffSAnup Patel * KVM_EXIT_INTERNAL_ERROR. Note, unlike other internal error 4035968b5ffSAnup Patel * sub-types, this struct is ABI! It also needs to be backwards 4045968b5ffSAnup Patel * compatible with "struct internal". Take special care that 4055968b5ffSAnup Patel * "ndata" is correct, that new fields are enumerated in "flags", 4065968b5ffSAnup Patel * and that each flag enumerates fields that are 64-bit aligned 4075968b5ffSAnup Patel * and sized (so that ndata+internal.data[] is valid/accurate). 4085968b5ffSAnup Patel * 4095968b5ffSAnup Patel * Space beyond the defined fields may be used to store arbitrary 4105968b5ffSAnup Patel * debug information relating to the emulation failure. It is 4115968b5ffSAnup Patel * accounted for in "ndata" but the format is unspecified and is 4125968b5ffSAnup Patel * not represented in "flags". Any such information is *not* ABI! 4135968b5ffSAnup Patel */ 4145968b5ffSAnup Patel struct { 4155968b5ffSAnup Patel __u32 suberror; 4165968b5ffSAnup Patel __u32 ndata; 4175968b5ffSAnup Patel __u64 flags; 4185968b5ffSAnup Patel union { 4195968b5ffSAnup Patel struct { 4205968b5ffSAnup Patel __u8 insn_size; 4215968b5ffSAnup Patel __u8 insn_bytes[15]; 4225968b5ffSAnup Patel }; 4235968b5ffSAnup Patel }; 4245968b5ffSAnup Patel /* Arbitrary debug data may follow. */ 4255968b5ffSAnup Patel } emulation_failure; 426304dcb64SAndre Przywara /* KVM_EXIT_OSI */ 427304dcb64SAndre Przywara struct { 428304dcb64SAndre Przywara __u64 gprs[32]; 429304dcb64SAndre Przywara } osi; 430b3f606e1SMarc Zyngier /* KVM_EXIT_PAPR_HCALL */ 431304dcb64SAndre Przywara struct { 432304dcb64SAndre Przywara __u64 nr; 433304dcb64SAndre Przywara __u64 ret; 434304dcb64SAndre Przywara __u64 args[9]; 435304dcb64SAndre Przywara } papr_hcall; 436304dcb64SAndre Przywara /* KVM_EXIT_S390_TSCH */ 437304dcb64SAndre Przywara struct { 438304dcb64SAndre Przywara __u16 subchannel_id; 439304dcb64SAndre Przywara __u16 subchannel_nr; 440304dcb64SAndre Przywara __u32 io_int_parm; 441304dcb64SAndre Przywara __u32 io_int_word; 442304dcb64SAndre Przywara __u32 ipb; 443304dcb64SAndre Przywara __u8 dequeued; 444304dcb64SAndre Przywara } s390_tsch; 445304dcb64SAndre Przywara /* KVM_EXIT_EPR */ 446304dcb64SAndre Przywara struct { 447304dcb64SAndre Przywara __u32 epr; 448304dcb64SAndre Przywara } epr; 449304dcb64SAndre Przywara /* KVM_EXIT_SYSTEM_EVENT */ 450304dcb64SAndre Przywara struct { 451304dcb64SAndre Przywara #define KVM_SYSTEM_EVENT_SHUTDOWN 1 452304dcb64SAndre Przywara #define KVM_SYSTEM_EVENT_RESET 2 453b3f606e1SMarc Zyngier #define KVM_SYSTEM_EVENT_CRASH 3 4548d0facecSAnup Patel #define KVM_SYSTEM_EVENT_WAKEUP 4 4558d0facecSAnup Patel #define KVM_SYSTEM_EVENT_SUSPEND 5 4568d0facecSAnup Patel #define KVM_SYSTEM_EVENT_SEV_TERM 6 457304dcb64SAndre Przywara __u32 type; 4588d0facecSAnup Patel __u32 ndata; 4598d0facecSAnup Patel union { 4608d0facecSAnup Patel #ifndef __KERNEL__ 461304dcb64SAndre Przywara __u64 flags; 4628d0facecSAnup Patel #endif 4638d0facecSAnup Patel __u64 data[16]; 4648d0facecSAnup Patel }; 465304dcb64SAndre Przywara } system_event; 466304dcb64SAndre Przywara /* KVM_EXIT_S390_STSI */ 467304dcb64SAndre Przywara struct { 468304dcb64SAndre Przywara __u64 addr; 469304dcb64SAndre Przywara __u8 ar; 470304dcb64SAndre Przywara __u8 reserved; 471304dcb64SAndre Przywara __u8 fc; 472304dcb64SAndre Przywara __u8 sel1; 473304dcb64SAndre Przywara __u16 sel2; 474304dcb64SAndre Przywara } s390_stsi; 475b3f606e1SMarc Zyngier /* KVM_EXIT_IOAPIC_EOI */ 476b3f606e1SMarc Zyngier struct { 477b3f606e1SMarc Zyngier __u8 vector; 478b3f606e1SMarc Zyngier } eoi; 479b3f606e1SMarc Zyngier /* KVM_EXIT_HYPERV */ 480b3f606e1SMarc Zyngier struct kvm_hyperv_exit hyperv; 4815968b5ffSAnup Patel /* KVM_EXIT_ARM_NISV */ 4825968b5ffSAnup Patel struct { 4835968b5ffSAnup Patel __u64 esr_iss; 4845968b5ffSAnup Patel __u64 fault_ipa; 4855968b5ffSAnup Patel } arm_nisv; 4865968b5ffSAnup Patel /* KVM_EXIT_X86_RDMSR / KVM_EXIT_X86_WRMSR */ 4875968b5ffSAnup Patel struct { 4885968b5ffSAnup Patel __u8 error; /* user -> kernel */ 4895968b5ffSAnup Patel __u8 pad[7]; 4905968b5ffSAnup Patel #define KVM_MSR_EXIT_REASON_INVAL (1 << 0) 4915968b5ffSAnup Patel #define KVM_MSR_EXIT_REASON_UNKNOWN (1 << 1) 4925968b5ffSAnup Patel #define KVM_MSR_EXIT_REASON_FILTER (1 << 2) 493be986824SAnup Patel #define KVM_MSR_EXIT_REASON_VALID_MASK (KVM_MSR_EXIT_REASON_INVAL | \ 494be986824SAnup Patel KVM_MSR_EXIT_REASON_UNKNOWN | \ 495be986824SAnup Patel KVM_MSR_EXIT_REASON_FILTER) 4965968b5ffSAnup Patel __u32 reason; /* kernel -> user */ 4975968b5ffSAnup Patel __u32 index; /* kernel -> user */ 4985968b5ffSAnup Patel __u64 data; /* kernel <-> user */ 4995968b5ffSAnup Patel } msr; 5005968b5ffSAnup Patel /* KVM_EXIT_XEN */ 5015968b5ffSAnup Patel struct kvm_xen_exit xen; 5025968b5ffSAnup Patel /* KVM_EXIT_RISCV_SBI */ 5035968b5ffSAnup Patel struct { 5045968b5ffSAnup Patel unsigned long extension_id; 5055968b5ffSAnup Patel unsigned long function_id; 5065968b5ffSAnup Patel unsigned long args[6]; 5075968b5ffSAnup Patel unsigned long ret[2]; 5085968b5ffSAnup Patel } riscv_sbi; 5098d0facecSAnup Patel /* KVM_EXIT_RISCV_CSR */ 5108d0facecSAnup Patel struct { 5118d0facecSAnup Patel unsigned long csr_num; 5128d0facecSAnup Patel unsigned long new_value; 5138d0facecSAnup Patel unsigned long write_mask; 5148d0facecSAnup Patel unsigned long ret_value; 5158d0facecSAnup Patel } riscv_csr; 5168d0facecSAnup Patel /* KVM_EXIT_NOTIFY */ 5178d0facecSAnup Patel struct { 5188d0facecSAnup Patel #define KVM_NOTIFY_CONTEXT_INVALID (1 << 0) 5198d0facecSAnup Patel __u32 flags; 5208d0facecSAnup Patel } notify; 521304dcb64SAndre Przywara /* Fix the size of the union. */ 522304dcb64SAndre Przywara char padding[256]; 523304dcb64SAndre Przywara }; 524304dcb64SAndre Przywara 5251bbe92f5SDave Martin /* 2048 is the size of the char array used to bound/pad the size 5261bbe92f5SDave Martin * of the union that holds sync regs. 5271bbe92f5SDave Martin */ 5281bbe92f5SDave Martin #define SYNC_REGS_SIZE_BYTES 2048 529304dcb64SAndre Przywara /* 530304dcb64SAndre Przywara * shared registers between kvm and userspace. 531304dcb64SAndre Przywara * kvm_valid_regs specifies the register classes set by the host 532304dcb64SAndre Przywara * kvm_dirty_regs specified the register classes dirtied by userspace 533304dcb64SAndre Przywara * struct kvm_sync_regs is architecture specific, as well as the 534304dcb64SAndre Przywara * bits for kvm_valid_regs and kvm_dirty_regs 535304dcb64SAndre Przywara */ 536304dcb64SAndre Przywara __u64 kvm_valid_regs; 537304dcb64SAndre Przywara __u64 kvm_dirty_regs; 538304dcb64SAndre Przywara union { 539304dcb64SAndre Przywara struct kvm_sync_regs regs; 5401bbe92f5SDave Martin char padding[SYNC_REGS_SIZE_BYTES]; 541304dcb64SAndre Przywara } s; 542304dcb64SAndre Przywara }; 543304dcb64SAndre Przywara 544304dcb64SAndre Przywara /* for KVM_REGISTER_COALESCED_MMIO / KVM_UNREGISTER_COALESCED_MMIO */ 545304dcb64SAndre Przywara 546304dcb64SAndre Przywara struct kvm_coalesced_mmio_zone { 547304dcb64SAndre Przywara __u64 addr; 548304dcb64SAndre Przywara __u32 size; 5491bbe92f5SDave Martin union { 550304dcb64SAndre Przywara __u32 pad; 5511bbe92f5SDave Martin __u32 pio; 5521bbe92f5SDave Martin }; 553304dcb64SAndre Przywara }; 554304dcb64SAndre Przywara 555304dcb64SAndre Przywara struct kvm_coalesced_mmio { 556304dcb64SAndre Przywara __u64 phys_addr; 557304dcb64SAndre Przywara __u32 len; 5581bbe92f5SDave Martin union { 559304dcb64SAndre Przywara __u32 pad; 5601bbe92f5SDave Martin __u32 pio; 5611bbe92f5SDave Martin }; 562304dcb64SAndre Przywara __u8 data[8]; 563304dcb64SAndre Przywara }; 564304dcb64SAndre Przywara 565304dcb64SAndre Przywara struct kvm_coalesced_mmio_ring { 566304dcb64SAndre Przywara __u32 first, last; 5678d0facecSAnup Patel struct kvm_coalesced_mmio coalesced_mmio[]; 568304dcb64SAndre Przywara }; 569304dcb64SAndre Przywara 570304dcb64SAndre Przywara #define KVM_COALESCED_MMIO_MAX \ 571304dcb64SAndre Przywara ((PAGE_SIZE - sizeof(struct kvm_coalesced_mmio_ring)) / \ 572304dcb64SAndre Przywara sizeof(struct kvm_coalesced_mmio)) 573304dcb64SAndre Przywara 574304dcb64SAndre Przywara /* for KVM_TRANSLATE */ 575304dcb64SAndre Przywara struct kvm_translation { 576304dcb64SAndre Przywara /* in */ 577304dcb64SAndre Przywara __u64 linear_address; 578304dcb64SAndre Przywara 579304dcb64SAndre Przywara /* out */ 580304dcb64SAndre Przywara __u64 physical_address; 581304dcb64SAndre Przywara __u8 valid; 582304dcb64SAndre Przywara __u8 writeable; 583304dcb64SAndre Przywara __u8 usermode; 584304dcb64SAndre Przywara __u8 pad[5]; 585304dcb64SAndre Przywara }; 586304dcb64SAndre Przywara 587304dcb64SAndre Przywara /* for KVM_S390_MEM_OP */ 588304dcb64SAndre Przywara struct kvm_s390_mem_op { 589304dcb64SAndre Przywara /* in */ 590304dcb64SAndre Przywara __u64 gaddr; /* the guest address */ 591304dcb64SAndre Przywara __u64 flags; /* flags */ 592304dcb64SAndre Przywara __u32 size; /* amount of bytes */ 593304dcb64SAndre Przywara __u32 op; /* type of operation */ 594304dcb64SAndre Przywara __u64 buf; /* buffer in userspace */ 5955968b5ffSAnup Patel union { 596083a976eSAlexandru Elisei struct { 597304dcb64SAndre Przywara __u8 ar; /* the access register number */ 598083a976eSAlexandru Elisei __u8 key; /* access key, ignored if flag unset */ 599be986824SAnup Patel __u8 pad1[6]; /* ignored */ 600be986824SAnup Patel __u64 old_addr; /* ignored if cmpxchg flag unset */ 601083a976eSAlexandru Elisei }; 6025968b5ffSAnup Patel __u32 sida_offset; /* offset into the sida */ 603083a976eSAlexandru Elisei __u8 reserved[32]; /* ignored */ 6045968b5ffSAnup Patel }; 605304dcb64SAndre Przywara }; 606304dcb64SAndre Przywara /* types for kvm_s390_mem_op->op */ 607304dcb64SAndre Przywara #define KVM_S390_MEMOP_LOGICAL_READ 0 608304dcb64SAndre Przywara #define KVM_S390_MEMOP_LOGICAL_WRITE 1 6095968b5ffSAnup Patel #define KVM_S390_MEMOP_SIDA_READ 2 6105968b5ffSAnup Patel #define KVM_S390_MEMOP_SIDA_WRITE 3 611083a976eSAlexandru Elisei #define KVM_S390_MEMOP_ABSOLUTE_READ 4 612083a976eSAlexandru Elisei #define KVM_S390_MEMOP_ABSOLUTE_WRITE 5 613be986824SAnup Patel #define KVM_S390_MEMOP_ABSOLUTE_CMPXCHG 6 614be986824SAnup Patel 615304dcb64SAndre Przywara /* flags for kvm_s390_mem_op->flags */ 616304dcb64SAndre Przywara #define KVM_S390_MEMOP_F_CHECK_ONLY (1ULL << 0) 617304dcb64SAndre Przywara #define KVM_S390_MEMOP_F_INJECT_EXCEPTION (1ULL << 1) 618083a976eSAlexandru Elisei #define KVM_S390_MEMOP_F_SKEY_PROTECTION (1ULL << 2) 619304dcb64SAndre Przywara 620be986824SAnup Patel /* flags specifying extension support via KVM_CAP_S390_MEM_OP_EXTENSION */ 621be986824SAnup Patel #define KVM_S390_MEMOP_EXTENSION_CAP_BASE (1 << 0) 622be986824SAnup Patel #define KVM_S390_MEMOP_EXTENSION_CAP_CMPXCHG (1 << 1) 623be986824SAnup Patel 624304dcb64SAndre Przywara /* for KVM_INTERRUPT */ 625304dcb64SAndre Przywara struct kvm_interrupt { 626304dcb64SAndre Przywara /* in */ 627304dcb64SAndre Przywara __u32 irq; 628304dcb64SAndre Przywara }; 629304dcb64SAndre Przywara 630304dcb64SAndre Przywara /* for KVM_GET_DIRTY_LOG */ 631304dcb64SAndre Przywara struct kvm_dirty_log { 632304dcb64SAndre Przywara __u32 slot; 633304dcb64SAndre Przywara __u32 padding1; 634304dcb64SAndre Przywara union { 635304dcb64SAndre Przywara void __user *dirty_bitmap; /* one bit per page */ 636304dcb64SAndre Przywara __u64 padding2; 637304dcb64SAndre Przywara }; 638304dcb64SAndre Przywara }; 639304dcb64SAndre Przywara 6401bbe92f5SDave Martin /* for KVM_CLEAR_DIRTY_LOG */ 6411bbe92f5SDave Martin struct kvm_clear_dirty_log { 6421bbe92f5SDave Martin __u32 slot; 6431bbe92f5SDave Martin __u32 num_pages; 6441bbe92f5SDave Martin __u64 first_page; 6451bbe92f5SDave Martin union { 6461bbe92f5SDave Martin void __user *dirty_bitmap; /* one bit per page */ 6471bbe92f5SDave Martin __u64 padding2; 6481bbe92f5SDave Martin }; 6491bbe92f5SDave Martin }; 6501bbe92f5SDave Martin 651304dcb64SAndre Przywara /* for KVM_SET_SIGNAL_MASK */ 652304dcb64SAndre Przywara struct kvm_signal_mask { 653304dcb64SAndre Przywara __u32 len; 6548d0facecSAnup Patel __u8 sigset[]; 655304dcb64SAndre Przywara }; 656304dcb64SAndre Przywara 657304dcb64SAndre Przywara /* for KVM_TPR_ACCESS_REPORTING */ 658304dcb64SAndre Przywara struct kvm_tpr_access_ctl { 659304dcb64SAndre Przywara __u32 enabled; 660304dcb64SAndre Przywara __u32 flags; 661304dcb64SAndre Przywara __u32 reserved[8]; 662304dcb64SAndre Przywara }; 663304dcb64SAndre Przywara 664304dcb64SAndre Przywara /* for KVM_SET_VAPIC_ADDR */ 665304dcb64SAndre Przywara struct kvm_vapic_addr { 666304dcb64SAndre Przywara __u64 vapic_addr; 667304dcb64SAndre Przywara }; 668304dcb64SAndre Przywara 669304dcb64SAndre Przywara /* for KVM_SET_MP_STATE */ 670304dcb64SAndre Przywara 671304dcb64SAndre Przywara /* not all states are valid on all architectures */ 672304dcb64SAndre Przywara #define KVM_MP_STATE_RUNNABLE 0 673304dcb64SAndre Przywara #define KVM_MP_STATE_UNINITIALIZED 1 674304dcb64SAndre Przywara #define KVM_MP_STATE_INIT_RECEIVED 2 675304dcb64SAndre Przywara #define KVM_MP_STATE_HALTED 3 676304dcb64SAndre Przywara #define KVM_MP_STATE_SIPI_RECEIVED 4 677304dcb64SAndre Przywara #define KVM_MP_STATE_STOPPED 5 678304dcb64SAndre Przywara #define KVM_MP_STATE_CHECK_STOP 6 679304dcb64SAndre Przywara #define KVM_MP_STATE_OPERATING 7 680304dcb64SAndre Przywara #define KVM_MP_STATE_LOAD 8 6815968b5ffSAnup Patel #define KVM_MP_STATE_AP_RESET_HOLD 9 6828d0facecSAnup Patel #define KVM_MP_STATE_SUSPENDED 10 683304dcb64SAndre Przywara 684304dcb64SAndre Przywara struct kvm_mp_state { 685304dcb64SAndre Przywara __u32 mp_state; 686304dcb64SAndre Przywara }; 687304dcb64SAndre Przywara 688304dcb64SAndre Przywara struct kvm_s390_psw { 689304dcb64SAndre Przywara __u64 mask; 690304dcb64SAndre Przywara __u64 addr; 691304dcb64SAndre Przywara }; 692304dcb64SAndre Przywara 693304dcb64SAndre Przywara /* valid values for type in kvm_s390_interrupt */ 694304dcb64SAndre Przywara #define KVM_S390_SIGP_STOP 0xfffe0000u 695304dcb64SAndre Przywara #define KVM_S390_PROGRAM_INT 0xfffe0001u 696304dcb64SAndre Przywara #define KVM_S390_SIGP_SET_PREFIX 0xfffe0002u 697304dcb64SAndre Przywara #define KVM_S390_RESTART 0xfffe0003u 698304dcb64SAndre Przywara #define KVM_S390_INT_PFAULT_INIT 0xfffe0004u 699304dcb64SAndre Przywara #define KVM_S390_INT_PFAULT_DONE 0xfffe0005u 700304dcb64SAndre Przywara #define KVM_S390_MCHK 0xfffe1000u 701304dcb64SAndre Przywara #define KVM_S390_INT_CLOCK_COMP 0xffff1004u 702304dcb64SAndre Przywara #define KVM_S390_INT_CPU_TIMER 0xffff1005u 703304dcb64SAndre Przywara #define KVM_S390_INT_VIRTIO 0xffff2603u 704304dcb64SAndre Przywara #define KVM_S390_INT_SERVICE 0xffff2401u 705304dcb64SAndre Przywara #define KVM_S390_INT_EMERGENCY 0xffff1201u 706304dcb64SAndre Przywara #define KVM_S390_INT_EXTERNAL_CALL 0xffff1202u 707304dcb64SAndre Przywara /* Anything below 0xfffe0000u is taken by INT_IO */ 708304dcb64SAndre Przywara #define KVM_S390_INT_IO(ai,cssid,ssid,schid) \ 709304dcb64SAndre Przywara (((schid)) | \ 710304dcb64SAndre Przywara ((ssid) << 16) | \ 711304dcb64SAndre Przywara ((cssid) << 18) | \ 712304dcb64SAndre Przywara ((ai) << 26)) 713304dcb64SAndre Przywara #define KVM_S390_INT_IO_MIN 0x00000000u 714304dcb64SAndre Przywara #define KVM_S390_INT_IO_MAX 0xfffdffffu 715b3f606e1SMarc Zyngier #define KVM_S390_INT_IO_AI_MASK 0x04000000u 716304dcb64SAndre Przywara 717304dcb64SAndre Przywara 718304dcb64SAndre Przywara struct kvm_s390_interrupt { 719304dcb64SAndre Przywara __u32 type; 720304dcb64SAndre Przywara __u32 parm; 721304dcb64SAndre Przywara __u64 parm64; 722304dcb64SAndre Przywara }; 723304dcb64SAndre Przywara 724304dcb64SAndre Przywara struct kvm_s390_io_info { 725304dcb64SAndre Przywara __u16 subchannel_id; 726304dcb64SAndre Przywara __u16 subchannel_nr; 727304dcb64SAndre Przywara __u32 io_int_parm; 728304dcb64SAndre Przywara __u32 io_int_word; 729304dcb64SAndre Przywara }; 730304dcb64SAndre Przywara 731304dcb64SAndre Przywara struct kvm_s390_ext_info { 732304dcb64SAndre Przywara __u32 ext_params; 733304dcb64SAndre Przywara __u32 pad; 734304dcb64SAndre Przywara __u64 ext_params2; 735304dcb64SAndre Przywara }; 736304dcb64SAndre Przywara 737304dcb64SAndre Przywara struct kvm_s390_pgm_info { 738304dcb64SAndre Przywara __u64 trans_exc_code; 739304dcb64SAndre Przywara __u64 mon_code; 740304dcb64SAndre Przywara __u64 per_address; 741304dcb64SAndre Przywara __u32 data_exc_code; 742304dcb64SAndre Przywara __u16 code; 743304dcb64SAndre Przywara __u16 mon_class_nr; 744304dcb64SAndre Przywara __u8 per_code; 745304dcb64SAndre Przywara __u8 per_atmid; 746304dcb64SAndre Przywara __u8 exc_access_id; 747304dcb64SAndre Przywara __u8 per_access_id; 748304dcb64SAndre Przywara __u8 op_access_id; 749b37ed70eSAndre Przywara #define KVM_S390_PGM_FLAGS_ILC_VALID 0x01 750b37ed70eSAndre Przywara #define KVM_S390_PGM_FLAGS_ILC_0 0x02 751b37ed70eSAndre Przywara #define KVM_S390_PGM_FLAGS_ILC_1 0x04 752b37ed70eSAndre Przywara #define KVM_S390_PGM_FLAGS_ILC_MASK 0x06 753b37ed70eSAndre Przywara #define KVM_S390_PGM_FLAGS_NO_REWIND 0x08 754b37ed70eSAndre Przywara __u8 flags; 755b37ed70eSAndre Przywara __u8 pad[2]; 756304dcb64SAndre Przywara }; 757304dcb64SAndre Przywara 758304dcb64SAndre Przywara struct kvm_s390_prefix_info { 759304dcb64SAndre Przywara __u32 address; 760304dcb64SAndre Przywara }; 761304dcb64SAndre Przywara 762304dcb64SAndre Przywara struct kvm_s390_extcall_info { 763304dcb64SAndre Przywara __u16 code; 764304dcb64SAndre Przywara }; 765304dcb64SAndre Przywara 766304dcb64SAndre Przywara struct kvm_s390_emerg_info { 767304dcb64SAndre Przywara __u16 code; 768304dcb64SAndre Przywara }; 769304dcb64SAndre Przywara 770304dcb64SAndre Przywara #define KVM_S390_STOP_FLAG_STORE_STATUS 0x01 771304dcb64SAndre Przywara struct kvm_s390_stop_info { 772304dcb64SAndre Przywara __u32 flags; 773304dcb64SAndre Przywara }; 774304dcb64SAndre Przywara 775304dcb64SAndre Przywara struct kvm_s390_mchk_info { 776304dcb64SAndre Przywara __u64 cr14; 777304dcb64SAndre Przywara __u64 mcic; 778304dcb64SAndre Przywara __u64 failing_storage_address; 779304dcb64SAndre Przywara __u32 ext_damage_code; 780304dcb64SAndre Przywara __u32 pad; 781304dcb64SAndre Przywara __u8 fixed_logout[16]; 782304dcb64SAndre Przywara }; 783304dcb64SAndre Przywara 784304dcb64SAndre Przywara struct kvm_s390_irq { 785304dcb64SAndre Przywara __u64 type; 786304dcb64SAndre Przywara union { 787304dcb64SAndre Przywara struct kvm_s390_io_info io; 788304dcb64SAndre Przywara struct kvm_s390_ext_info ext; 789304dcb64SAndre Przywara struct kvm_s390_pgm_info pgm; 790304dcb64SAndre Przywara struct kvm_s390_emerg_info emerg; 791304dcb64SAndre Przywara struct kvm_s390_extcall_info extcall; 792304dcb64SAndre Przywara struct kvm_s390_prefix_info prefix; 793304dcb64SAndre Przywara struct kvm_s390_stop_info stop; 794304dcb64SAndre Przywara struct kvm_s390_mchk_info mchk; 795304dcb64SAndre Przywara char reserved[64]; 796304dcb64SAndre Przywara } u; 797304dcb64SAndre Przywara }; 798304dcb64SAndre Przywara 799304dcb64SAndre Przywara struct kvm_s390_irq_state { 800304dcb64SAndre Przywara __u64 buf; 8011bbe92f5SDave Martin __u32 flags; /* will stay unused for compatibility reasons */ 802304dcb64SAndre Przywara __u32 len; 8031bbe92f5SDave Martin __u32 reserved[4]; /* will stay unused for compatibility reasons */ 804304dcb64SAndre Przywara }; 805304dcb64SAndre Przywara 806304dcb64SAndre Przywara /* for KVM_SET_GUEST_DEBUG */ 807304dcb64SAndre Przywara 808304dcb64SAndre Przywara #define KVM_GUESTDBG_ENABLE 0x00000001 809304dcb64SAndre Przywara #define KVM_GUESTDBG_SINGLESTEP 0x00000002 810304dcb64SAndre Przywara 811304dcb64SAndre Przywara struct kvm_guest_debug { 812304dcb64SAndre Przywara __u32 control; 813304dcb64SAndre Przywara __u32 pad; 814304dcb64SAndre Przywara struct kvm_guest_debug_arch arch; 815304dcb64SAndre Przywara }; 816304dcb64SAndre Przywara 817304dcb64SAndre Przywara enum { 818304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_datamatch, 819304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_pio, 820304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_deassign, 821304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_virtio_ccw_notify, 822304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_fast_mmio, 823304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_max, 824304dcb64SAndre Przywara }; 825304dcb64SAndre Przywara 826304dcb64SAndre Przywara #define KVM_IOEVENTFD_FLAG_DATAMATCH (1 << kvm_ioeventfd_flag_nr_datamatch) 827304dcb64SAndre Przywara #define KVM_IOEVENTFD_FLAG_PIO (1 << kvm_ioeventfd_flag_nr_pio) 828304dcb64SAndre Przywara #define KVM_IOEVENTFD_FLAG_DEASSIGN (1 << kvm_ioeventfd_flag_nr_deassign) 829304dcb64SAndre Przywara #define KVM_IOEVENTFD_FLAG_VIRTIO_CCW_NOTIFY \ 830304dcb64SAndre Przywara (1 << kvm_ioeventfd_flag_nr_virtio_ccw_notify) 831304dcb64SAndre Przywara 832304dcb64SAndre Przywara #define KVM_IOEVENTFD_VALID_FLAG_MASK ((1 << kvm_ioeventfd_flag_nr_max) - 1) 833304dcb64SAndre Przywara 834304dcb64SAndre Przywara struct kvm_ioeventfd { 835304dcb64SAndre Przywara __u64 datamatch; 836304dcb64SAndre Przywara __u64 addr; /* legal pio/mmio address */ 837304dcb64SAndre Przywara __u32 len; /* 1, 2, 4, or 8 bytes; or 0 to ignore length */ 838304dcb64SAndre Przywara __s32 fd; 839304dcb64SAndre Przywara __u32 flags; 840304dcb64SAndre Przywara __u8 pad[36]; 841304dcb64SAndre Przywara }; 842304dcb64SAndre Przywara 8431bbe92f5SDave Martin #define KVM_X86_DISABLE_EXITS_MWAIT (1 << 0) 8441bbe92f5SDave Martin #define KVM_X86_DISABLE_EXITS_HLT (1 << 1) 8451bbe92f5SDave Martin #define KVM_X86_DISABLE_EXITS_PAUSE (1 << 2) 84666b24a33SWill Deacon #define KVM_X86_DISABLE_EXITS_CSTATE (1 << 3) 8471bbe92f5SDave Martin #define KVM_X86_DISABLE_VALID_EXITS (KVM_X86_DISABLE_EXITS_MWAIT | \ 8481bbe92f5SDave Martin KVM_X86_DISABLE_EXITS_HLT | \ 84966b24a33SWill Deacon KVM_X86_DISABLE_EXITS_PAUSE | \ 85066b24a33SWill Deacon KVM_X86_DISABLE_EXITS_CSTATE) 8511bbe92f5SDave Martin 852304dcb64SAndre Przywara /* for KVM_ENABLE_CAP */ 853304dcb64SAndre Przywara struct kvm_enable_cap { 854304dcb64SAndre Przywara /* in */ 855304dcb64SAndre Przywara __u32 cap; 856304dcb64SAndre Przywara __u32 flags; 857304dcb64SAndre Przywara __u64 args[4]; 858304dcb64SAndre Przywara __u8 pad[64]; 859304dcb64SAndre Przywara }; 860304dcb64SAndre Przywara 861304dcb64SAndre Przywara /* for KVM_PPC_GET_PVINFO */ 862764dfba1SAndre Przywara 863764dfba1SAndre Przywara #define KVM_PPC_PVINFO_FLAGS_EV_IDLE (1<<0) 864764dfba1SAndre Przywara 865304dcb64SAndre Przywara struct kvm_ppc_pvinfo { 866304dcb64SAndre Przywara /* out */ 867304dcb64SAndre Przywara __u32 flags; 868304dcb64SAndre Przywara __u32 hcall[4]; 869304dcb64SAndre Przywara __u8 pad[108]; 870304dcb64SAndre Przywara }; 871304dcb64SAndre Przywara 872304dcb64SAndre Przywara /* for KVM_PPC_GET_SMMU_INFO */ 873304dcb64SAndre Przywara #define KVM_PPC_PAGE_SIZES_MAX_SZ 8 874304dcb64SAndre Przywara 875304dcb64SAndre Przywara struct kvm_ppc_one_page_size { 876304dcb64SAndre Przywara __u32 page_shift; /* Page shift (or 0) */ 877304dcb64SAndre Przywara __u32 pte_enc; /* Encoding in the HPTE (>>12) */ 878304dcb64SAndre Przywara }; 879304dcb64SAndre Przywara 880304dcb64SAndre Przywara struct kvm_ppc_one_seg_page_size { 881304dcb64SAndre Przywara __u32 page_shift; /* Base page shift of segment (or 0) */ 882304dcb64SAndre Przywara __u32 slb_enc; /* SLB encoding for BookS */ 883304dcb64SAndre Przywara struct kvm_ppc_one_page_size enc[KVM_PPC_PAGE_SIZES_MAX_SZ]; 884304dcb64SAndre Przywara }; 885304dcb64SAndre Przywara 886304dcb64SAndre Przywara #define KVM_PPC_PAGE_SIZES_REAL 0x00000001 887304dcb64SAndre Przywara #define KVM_PPC_1T_SEGMENTS 0x00000002 8881bbe92f5SDave Martin #define KVM_PPC_NO_HASH 0x00000004 889304dcb64SAndre Przywara 890304dcb64SAndre Przywara struct kvm_ppc_smmu_info { 891304dcb64SAndre Przywara __u64 flags; 892304dcb64SAndre Przywara __u32 slb_size; 8931bbe92f5SDave Martin __u16 data_keys; /* # storage keys supported for data */ 8941bbe92f5SDave Martin __u16 instr_keys; /* # storage keys supported for instructions */ 895304dcb64SAndre Przywara struct kvm_ppc_one_seg_page_size sps[KVM_PPC_PAGE_SIZES_MAX_SZ]; 896304dcb64SAndre Przywara }; 897304dcb64SAndre Przywara 898764dfba1SAndre Przywara /* for KVM_PPC_RESIZE_HPT_{PREPARE,COMMIT} */ 899764dfba1SAndre Przywara struct kvm_ppc_resize_hpt { 900764dfba1SAndre Przywara __u64 flags; 901764dfba1SAndre Przywara __u32 shift; 902764dfba1SAndre Przywara __u32 pad; 903764dfba1SAndre Przywara }; 904304dcb64SAndre Przywara 905304dcb64SAndre Przywara #define KVMIO 0xAE 906304dcb64SAndre Przywara 907304dcb64SAndre Przywara /* machine type bits, to be used as argument to KVM_CREATE_VM */ 908304dcb64SAndre Przywara #define KVM_VM_S390_UCONTROL 1 909304dcb64SAndre Przywara 910304dcb64SAndre Przywara /* on ppc, 0 indicate default, 1 should force HV and 2 PR */ 911304dcb64SAndre Przywara #define KVM_VM_PPC_HV 1 912304dcb64SAndre Przywara #define KVM_VM_PPC_PR 2 913304dcb64SAndre Przywara 9145968b5ffSAnup Patel /* on MIPS, 0 indicates auto, 1 forces VZ ASE, 2 forces trap & emulate */ 9155968b5ffSAnup Patel #define KVM_VM_MIPS_AUTO 0 9161bbe92f5SDave Martin #define KVM_VM_MIPS_VZ 1 9175968b5ffSAnup Patel #define KVM_VM_MIPS_TE 2 9181bbe92f5SDave Martin 919304dcb64SAndre Przywara #define KVM_S390_SIE_PAGE_OFFSET 1 920304dcb64SAndre Przywara 921304dcb64SAndre Przywara /* 9221bbe92f5SDave Martin * On arm64, machine type can be used to request the physical 9231bbe92f5SDave Martin * address size for the VM. Bits[7-0] are reserved for the guest 9241bbe92f5SDave Martin * PA size shift (i.e, log2(PA_Size)). For backward compatibility, 9251bbe92f5SDave Martin * value 0 implies the default IPA size, 40bits. 9261bbe92f5SDave Martin */ 9271bbe92f5SDave Martin #define KVM_VM_TYPE_ARM_IPA_SIZE_MASK 0xffULL 9281bbe92f5SDave Martin #define KVM_VM_TYPE_ARM_IPA_SIZE(x) \ 9291bbe92f5SDave Martin ((x) & KVM_VM_TYPE_ARM_IPA_SIZE_MASK) 9301bbe92f5SDave Martin /* 931304dcb64SAndre Przywara * ioctls for /dev/kvm fds: 932304dcb64SAndre Przywara */ 933304dcb64SAndre Przywara #define KVM_GET_API_VERSION _IO(KVMIO, 0x00) 934304dcb64SAndre Przywara #define KVM_CREATE_VM _IO(KVMIO, 0x01) /* returns a VM fd */ 935304dcb64SAndre Przywara #define KVM_GET_MSR_INDEX_LIST _IOWR(KVMIO, 0x02, struct kvm_msr_list) 936304dcb64SAndre Przywara 937304dcb64SAndre Przywara #define KVM_S390_ENABLE_SIE _IO(KVMIO, 0x06) 938304dcb64SAndre Przywara /* 939304dcb64SAndre Przywara * Check if a kvm extension is available. Argument is extension number, 940304dcb64SAndre Przywara * return is 1 (yes) or 0 (no, sorry). 941304dcb64SAndre Przywara */ 942304dcb64SAndre Przywara #define KVM_CHECK_EXTENSION _IO(KVMIO, 0x03) 943304dcb64SAndre Przywara /* 944304dcb64SAndre Przywara * Get size for mmap(vcpu_fd) 945304dcb64SAndre Przywara */ 946304dcb64SAndre Przywara #define KVM_GET_VCPU_MMAP_SIZE _IO(KVMIO, 0x04) /* in bytes */ 947304dcb64SAndre Przywara #define KVM_GET_SUPPORTED_CPUID _IOWR(KVMIO, 0x05, struct kvm_cpuid2) 948304dcb64SAndre Przywara #define KVM_TRACE_ENABLE __KVM_DEPRECATED_MAIN_W_0x06 949304dcb64SAndre Przywara #define KVM_TRACE_PAUSE __KVM_DEPRECATED_MAIN_0x07 950304dcb64SAndre Przywara #define KVM_TRACE_DISABLE __KVM_DEPRECATED_MAIN_0x08 951304dcb64SAndre Przywara #define KVM_GET_EMULATED_CPUID _IOWR(KVMIO, 0x09, struct kvm_cpuid2) 9521bbe92f5SDave Martin #define KVM_GET_MSR_FEATURE_INDEX_LIST _IOWR(KVMIO, 0x0a, struct kvm_msr_list) 953304dcb64SAndre Przywara 954304dcb64SAndre Przywara /* 955304dcb64SAndre Przywara * Extension capability list. 956304dcb64SAndre Przywara */ 957304dcb64SAndre Przywara #define KVM_CAP_IRQCHIP 0 958304dcb64SAndre Przywara #define KVM_CAP_HLT 1 959304dcb64SAndre Przywara #define KVM_CAP_MMU_SHADOW_CACHE_CONTROL 2 960304dcb64SAndre Przywara #define KVM_CAP_USER_MEMORY 3 961304dcb64SAndre Przywara #define KVM_CAP_SET_TSS_ADDR 4 962304dcb64SAndre Przywara #define KVM_CAP_VAPIC 6 963304dcb64SAndre Przywara #define KVM_CAP_EXT_CPUID 7 964304dcb64SAndre Przywara #define KVM_CAP_CLOCKSOURCE 8 965304dcb64SAndre Przywara #define KVM_CAP_NR_VCPUS 9 /* returns recommended max vcpus per vm */ 966304dcb64SAndre Przywara #define KVM_CAP_NR_MEMSLOTS 10 /* returns max memory slots per vm */ 967304dcb64SAndre Przywara #define KVM_CAP_PIT 11 968304dcb64SAndre Przywara #define KVM_CAP_NOP_IO_DELAY 12 969304dcb64SAndre Przywara #define KVM_CAP_PV_MMU 13 970304dcb64SAndre Przywara #define KVM_CAP_MP_STATE 14 971304dcb64SAndre Przywara #define KVM_CAP_COALESCED_MMIO 15 972304dcb64SAndre Przywara #define KVM_CAP_SYNC_MMU 16 /* Changes to host mmap are reflected in guest */ 973304dcb64SAndre Przywara #define KVM_CAP_IOMMU 18 974304dcb64SAndre Przywara /* Bug in KVM_SET_USER_MEMORY_REGION fixed: */ 975304dcb64SAndre Przywara #define KVM_CAP_DESTROY_MEMORY_REGION_WORKS 21 976304dcb64SAndre Przywara #define KVM_CAP_USER_NMI 22 977304dcb64SAndre Przywara #ifdef __KVM_HAVE_GUEST_DEBUG 978304dcb64SAndre Przywara #define KVM_CAP_SET_GUEST_DEBUG 23 979304dcb64SAndre Przywara #endif 980304dcb64SAndre Przywara #ifdef __KVM_HAVE_PIT 981304dcb64SAndre Przywara #define KVM_CAP_REINJECT_CONTROL 24 982304dcb64SAndre Przywara #endif 983304dcb64SAndre Przywara #define KVM_CAP_IRQ_ROUTING 25 984304dcb64SAndre Przywara #define KVM_CAP_IRQ_INJECT_STATUS 26 985304dcb64SAndre Przywara #define KVM_CAP_ASSIGN_DEV_IRQ 29 986304dcb64SAndre Przywara /* Another bug in KVM_SET_USER_MEMORY_REGION fixed: */ 987304dcb64SAndre Przywara #define KVM_CAP_JOIN_MEMORY_REGIONS_WORKS 30 988304dcb64SAndre Przywara #ifdef __KVM_HAVE_MCE 989304dcb64SAndre Przywara #define KVM_CAP_MCE 31 990304dcb64SAndre Przywara #endif 991304dcb64SAndre Przywara #define KVM_CAP_IRQFD 32 992304dcb64SAndre Przywara #ifdef __KVM_HAVE_PIT 993304dcb64SAndre Przywara #define KVM_CAP_PIT2 33 994304dcb64SAndre Przywara #endif 995304dcb64SAndre Przywara #define KVM_CAP_SET_BOOT_CPU_ID 34 996304dcb64SAndre Przywara #ifdef __KVM_HAVE_PIT_STATE2 997304dcb64SAndre Przywara #define KVM_CAP_PIT_STATE2 35 998304dcb64SAndre Przywara #endif 999304dcb64SAndre Przywara #define KVM_CAP_IOEVENTFD 36 1000304dcb64SAndre Przywara #define KVM_CAP_SET_IDENTITY_MAP_ADDR 37 1001304dcb64SAndre Przywara #ifdef __KVM_HAVE_XEN_HVM 1002304dcb64SAndre Przywara #define KVM_CAP_XEN_HVM 38 1003304dcb64SAndre Przywara #endif 1004304dcb64SAndre Przywara #define KVM_CAP_ADJUST_CLOCK 39 1005304dcb64SAndre Przywara #define KVM_CAP_INTERNAL_ERROR_DATA 40 1006304dcb64SAndre Przywara #ifdef __KVM_HAVE_VCPU_EVENTS 1007304dcb64SAndre Przywara #define KVM_CAP_VCPU_EVENTS 41 1008304dcb64SAndre Przywara #endif 1009304dcb64SAndre Przywara #define KVM_CAP_S390_PSW 42 1010304dcb64SAndre Przywara #define KVM_CAP_PPC_SEGSTATE 43 1011304dcb64SAndre Przywara #define KVM_CAP_HYPERV 44 1012304dcb64SAndre Przywara #define KVM_CAP_HYPERV_VAPIC 45 1013304dcb64SAndre Przywara #define KVM_CAP_HYPERV_SPIN 46 1014304dcb64SAndre Przywara #define KVM_CAP_PCI_SEGMENT 47 1015304dcb64SAndre Przywara #define KVM_CAP_PPC_PAIRED_SINGLES 48 1016304dcb64SAndre Przywara #define KVM_CAP_INTR_SHADOW 49 1017304dcb64SAndre Przywara #ifdef __KVM_HAVE_DEBUGREGS 1018304dcb64SAndre Przywara #define KVM_CAP_DEBUGREGS 50 1019304dcb64SAndre Przywara #endif 1020304dcb64SAndre Przywara #define KVM_CAP_X86_ROBUST_SINGLESTEP 51 1021304dcb64SAndre Przywara #define KVM_CAP_PPC_OSI 52 1022304dcb64SAndre Przywara #define KVM_CAP_PPC_UNSET_IRQ 53 1023304dcb64SAndre Przywara #define KVM_CAP_ENABLE_CAP 54 1024304dcb64SAndre Przywara #ifdef __KVM_HAVE_XSAVE 1025304dcb64SAndre Przywara #define KVM_CAP_XSAVE 55 1026304dcb64SAndre Przywara #endif 1027304dcb64SAndre Przywara #ifdef __KVM_HAVE_XCRS 1028304dcb64SAndre Przywara #define KVM_CAP_XCRS 56 1029304dcb64SAndre Przywara #endif 1030304dcb64SAndre Przywara #define KVM_CAP_PPC_GET_PVINFO 57 1031304dcb64SAndre Przywara #define KVM_CAP_PPC_IRQ_LEVEL 58 1032304dcb64SAndre Przywara #define KVM_CAP_ASYNC_PF 59 1033304dcb64SAndre Przywara #define KVM_CAP_TSC_CONTROL 60 1034304dcb64SAndre Przywara #define KVM_CAP_GET_TSC_KHZ 61 1035304dcb64SAndre Przywara #define KVM_CAP_PPC_BOOKE_SREGS 62 1036304dcb64SAndre Przywara #define KVM_CAP_SPAPR_TCE 63 1037304dcb64SAndre Przywara #define KVM_CAP_PPC_SMT 64 1038304dcb64SAndre Przywara #define KVM_CAP_PPC_RMA 65 1039304dcb64SAndre Przywara #define KVM_CAP_MAX_VCPUS 66 /* returns max vcpus per vm */ 1040304dcb64SAndre Przywara #define KVM_CAP_PPC_HIOR 67 1041304dcb64SAndre Przywara #define KVM_CAP_PPC_PAPR 68 1042304dcb64SAndre Przywara #define KVM_CAP_SW_TLB 69 1043304dcb64SAndre Przywara #define KVM_CAP_ONE_REG 70 1044304dcb64SAndre Przywara #define KVM_CAP_S390_GMAP 71 1045304dcb64SAndre Przywara #define KVM_CAP_TSC_DEADLINE_TIMER 72 1046304dcb64SAndre Przywara #define KVM_CAP_S390_UCONTROL 73 1047304dcb64SAndre Przywara #define KVM_CAP_SYNC_REGS 74 1048304dcb64SAndre Przywara #define KVM_CAP_PCI_2_3 75 1049304dcb64SAndre Przywara #define KVM_CAP_KVMCLOCK_CTRL 76 1050304dcb64SAndre Przywara #define KVM_CAP_SIGNAL_MSI 77 1051304dcb64SAndre Przywara #define KVM_CAP_PPC_GET_SMMU_INFO 78 1052304dcb64SAndre Przywara #define KVM_CAP_S390_COW 79 1053304dcb64SAndre Przywara #define KVM_CAP_PPC_ALLOC_HTAB 80 1054304dcb64SAndre Przywara #define KVM_CAP_READONLY_MEM 81 1055304dcb64SAndre Przywara #define KVM_CAP_IRQFD_RESAMPLE 82 1056304dcb64SAndre Przywara #define KVM_CAP_PPC_BOOKE_WATCHDOG 83 1057304dcb64SAndre Przywara #define KVM_CAP_PPC_HTAB_FD 84 1058304dcb64SAndre Przywara #define KVM_CAP_S390_CSS_SUPPORT 85 1059304dcb64SAndre Przywara #define KVM_CAP_PPC_EPR 86 1060304dcb64SAndre Przywara #define KVM_CAP_ARM_PSCI 87 1061304dcb64SAndre Przywara #define KVM_CAP_ARM_SET_DEVICE_ADDR 88 1062304dcb64SAndre Przywara #define KVM_CAP_DEVICE_CTRL 89 1063304dcb64SAndre Przywara #define KVM_CAP_IRQ_MPIC 90 1064304dcb64SAndre Przywara #define KVM_CAP_PPC_RTAS 91 1065304dcb64SAndre Przywara #define KVM_CAP_IRQ_XICS 92 1066304dcb64SAndre Przywara #define KVM_CAP_ARM_EL1_32BIT 93 1067304dcb64SAndre Przywara #define KVM_CAP_SPAPR_MULTITCE 94 1068304dcb64SAndre Przywara #define KVM_CAP_EXT_EMUL_CPUID 95 1069304dcb64SAndre Przywara #define KVM_CAP_HYPERV_TIME 96 1070304dcb64SAndre Przywara #define KVM_CAP_IOAPIC_POLARITY_IGNORED 97 1071304dcb64SAndre Przywara #define KVM_CAP_ENABLE_CAP_VM 98 1072304dcb64SAndre Przywara #define KVM_CAP_S390_IRQCHIP 99 1073304dcb64SAndre Przywara #define KVM_CAP_IOEVENTFD_NO_LENGTH 100 1074304dcb64SAndre Przywara #define KVM_CAP_VM_ATTRIBUTES 101 1075304dcb64SAndre Przywara #define KVM_CAP_ARM_PSCI_0_2 102 1076304dcb64SAndre Przywara #define KVM_CAP_PPC_FIXUP_HCALL 103 1077304dcb64SAndre Przywara #define KVM_CAP_PPC_ENABLE_HCALL 104 1078304dcb64SAndre Przywara #define KVM_CAP_CHECK_EXTENSION_VM 105 1079304dcb64SAndre Przywara #define KVM_CAP_S390_USER_SIGP 106 1080304dcb64SAndre Przywara #define KVM_CAP_S390_VECTOR_REGISTERS 107 1081304dcb64SAndre Przywara #define KVM_CAP_S390_MEM_OP 108 1082304dcb64SAndre Przywara #define KVM_CAP_S390_USER_STSI 109 1083304dcb64SAndre Przywara #define KVM_CAP_S390_SKEYS 110 1084304dcb64SAndre Przywara #define KVM_CAP_MIPS_FPU 111 1085304dcb64SAndre Przywara #define KVM_CAP_MIPS_MSA 112 1086304dcb64SAndre Przywara #define KVM_CAP_S390_INJECT_IRQ 113 1087304dcb64SAndre Przywara #define KVM_CAP_S390_IRQ_STATE 114 1088304dcb64SAndre Przywara #define KVM_CAP_PPC_HWRNG 115 1089b3f606e1SMarc Zyngier #define KVM_CAP_DISABLE_QUIRKS 116 1090b3f606e1SMarc Zyngier #define KVM_CAP_X86_SMM 117 1091b3f606e1SMarc Zyngier #define KVM_CAP_MULTI_ADDRESS_SPACE 118 1092b3f606e1SMarc Zyngier #define KVM_CAP_GUEST_DEBUG_HW_BPS 119 1093b3f606e1SMarc Zyngier #define KVM_CAP_GUEST_DEBUG_HW_WPS 120 1094b3f606e1SMarc Zyngier #define KVM_CAP_SPLIT_IRQCHIP 121 1095b3f606e1SMarc Zyngier #define KVM_CAP_IOEVENTFD_ANY_LENGTH 122 1096b3f606e1SMarc Zyngier #define KVM_CAP_HYPERV_SYNIC 123 1097b3f606e1SMarc Zyngier #define KVM_CAP_S390_RI 124 1098b37ed70eSAndre Przywara #define KVM_CAP_SPAPR_TCE_64 125 1099b37ed70eSAndre Przywara #define KVM_CAP_ARM_PMU_V3 126 1100b37ed70eSAndre Przywara #define KVM_CAP_VCPU_ATTRIBUTES 127 1101764dfba1SAndre Przywara #define KVM_CAP_MAX_VCPU_ID 128 1102764dfba1SAndre Przywara #define KVM_CAP_X2APIC_API 129 1103764dfba1SAndre Przywara #define KVM_CAP_S390_USER_INSTR0 130 1104764dfba1SAndre Przywara #define KVM_CAP_MSI_DEVID 131 1105764dfba1SAndre Przywara #define KVM_CAP_PPC_HTM 132 1106764dfba1SAndre Przywara #define KVM_CAP_SPAPR_RESIZE_HPT 133 1107764dfba1SAndre Przywara #define KVM_CAP_PPC_MMU_RADIX 134 1108764dfba1SAndre Przywara #define KVM_CAP_PPC_MMU_HASH_V3 135 1109764dfba1SAndre Przywara #define KVM_CAP_IMMEDIATE_EXIT 136 11101bbe92f5SDave Martin #define KVM_CAP_MIPS_VZ 137 11111bbe92f5SDave Martin #define KVM_CAP_MIPS_TE 138 11121bbe92f5SDave Martin #define KVM_CAP_MIPS_64BIT 139 11131bbe92f5SDave Martin #define KVM_CAP_S390_GS 140 11141bbe92f5SDave Martin #define KVM_CAP_S390_AIS 141 11151bbe92f5SDave Martin #define KVM_CAP_SPAPR_TCE_VFIO 142 11161bbe92f5SDave Martin #define KVM_CAP_X86_DISABLE_EXITS 143 11171bbe92f5SDave Martin #define KVM_CAP_ARM_USER_IRQ 144 11181bbe92f5SDave Martin #define KVM_CAP_S390_CMMA_MIGRATION 145 11191bbe92f5SDave Martin #define KVM_CAP_PPC_FWNMI 146 11201bbe92f5SDave Martin #define KVM_CAP_PPC_SMT_POSSIBLE 147 11211bbe92f5SDave Martin #define KVM_CAP_HYPERV_SYNIC2 148 11221bbe92f5SDave Martin #define KVM_CAP_HYPERV_VP_INDEX 149 11231bbe92f5SDave Martin #define KVM_CAP_S390_AIS_MIGRATION 150 11241bbe92f5SDave Martin #define KVM_CAP_PPC_GET_CPU_CHAR 151 11251bbe92f5SDave Martin #define KVM_CAP_S390_BPB 152 11261bbe92f5SDave Martin #define KVM_CAP_GET_MSR_FEATURES 153 11271bbe92f5SDave Martin #define KVM_CAP_HYPERV_EVENTFD 154 11281bbe92f5SDave Martin #define KVM_CAP_HYPERV_TLBFLUSH 155 11291bbe92f5SDave Martin #define KVM_CAP_S390_HPAGE_1M 156 11301bbe92f5SDave Martin #define KVM_CAP_NESTED_STATE 157 11311bbe92f5SDave Martin #define KVM_CAP_ARM_INJECT_SERROR_ESR 158 11321bbe92f5SDave Martin #define KVM_CAP_MSR_PLATFORM_INFO 159 11331bbe92f5SDave Martin #define KVM_CAP_PPC_NESTED_HV 160 11341bbe92f5SDave Martin #define KVM_CAP_HYPERV_SEND_IPI 161 11351bbe92f5SDave Martin #define KVM_CAP_COALESCED_PIO 162 11361bbe92f5SDave Martin #define KVM_CAP_HYPERV_ENLIGHTENED_VMCS 163 11371bbe92f5SDave Martin #define KVM_CAP_EXCEPTION_PAYLOAD 164 11381bbe92f5SDave Martin #define KVM_CAP_ARM_VM_IPA_SIZE 165 113966b24a33SWill Deacon #define KVM_CAP_MANUAL_DIRTY_LOG_PROTECT 166 /* Obsolete */ 11401bbe92f5SDave Martin #define KVM_CAP_HYPERV_CPUID 167 114166b24a33SWill Deacon #define KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2 168 114266b24a33SWill Deacon #define KVM_CAP_PPC_IRQ_XIVE 169 114366b24a33SWill Deacon #define KVM_CAP_ARM_SVE 170 114466b24a33SWill Deacon #define KVM_CAP_ARM_PTRAUTH_ADDRESS 171 114566b24a33SWill Deacon #define KVM_CAP_ARM_PTRAUTH_GENERIC 172 114666b24a33SWill Deacon #define KVM_CAP_PMU_EVENT_FILTER 173 11475968b5ffSAnup Patel #define KVM_CAP_ARM_IRQ_LINE_LAYOUT_2 174 11485968b5ffSAnup Patel #define KVM_CAP_HYPERV_DIRECT_TLBFLUSH 175 11495968b5ffSAnup Patel #define KVM_CAP_PPC_GUEST_DEBUG_SSTEP 176 11505968b5ffSAnup Patel #define KVM_CAP_ARM_NISV_TO_USER 177 11515968b5ffSAnup Patel #define KVM_CAP_ARM_INJECT_EXT_DABT 178 11525968b5ffSAnup Patel #define KVM_CAP_S390_VCPU_RESETS 179 11535968b5ffSAnup Patel #define KVM_CAP_S390_PROTECTED 180 11545968b5ffSAnup Patel #define KVM_CAP_PPC_SECURE_GUEST 181 11555968b5ffSAnup Patel #define KVM_CAP_HALT_POLL 182 11565968b5ffSAnup Patel #define KVM_CAP_ASYNC_PF_INT 183 11575968b5ffSAnup Patel #define KVM_CAP_LAST_CPU 184 11585968b5ffSAnup Patel #define KVM_CAP_SMALLER_MAXPHYADDR 185 11595968b5ffSAnup Patel #define KVM_CAP_S390_DIAG318 186 11605968b5ffSAnup Patel #define KVM_CAP_STEAL_TIME 187 11615968b5ffSAnup Patel #define KVM_CAP_X86_USER_SPACE_MSR 188 11625968b5ffSAnup Patel #define KVM_CAP_X86_MSR_FILTER 189 11635968b5ffSAnup Patel #define KVM_CAP_ENFORCE_PV_FEATURE_CPUID 190 11645968b5ffSAnup Patel #define KVM_CAP_SYS_HYPERV_CPUID 191 11655968b5ffSAnup Patel #define KVM_CAP_DIRTY_LOG_RING 192 11665968b5ffSAnup Patel #define KVM_CAP_X86_BUS_LOCK_EXIT 193 11675968b5ffSAnup Patel #define KVM_CAP_PPC_DAWR1 194 11685968b5ffSAnup Patel #define KVM_CAP_SET_GUEST_DEBUG2 195 11695968b5ffSAnup Patel #define KVM_CAP_SGX_ATTRIBUTE 196 11705968b5ffSAnup Patel #define KVM_CAP_VM_COPY_ENC_CONTEXT_FROM 197 11715968b5ffSAnup Patel #define KVM_CAP_PTP_KVM 198 11725968b5ffSAnup Patel #define KVM_CAP_HYPERV_ENFORCE_CPUID 199 11735968b5ffSAnup Patel #define KVM_CAP_SREGS2 200 11745968b5ffSAnup Patel #define KVM_CAP_EXIT_HYPERCALL 201 11755968b5ffSAnup Patel #define KVM_CAP_PPC_RPT_INVALIDATE 202 11765968b5ffSAnup Patel #define KVM_CAP_BINARY_STATS_FD 203 11775968b5ffSAnup Patel #define KVM_CAP_EXIT_ON_EMULATION_FAILURE 204 11785968b5ffSAnup Patel #define KVM_CAP_ARM_MTE 205 11795968b5ffSAnup Patel #define KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM 206 1180af1b793cSAlexandru Elisei #define KVM_CAP_VM_GPA_BITS 207 1181af1b793cSAlexandru Elisei #define KVM_CAP_XSAVE2 208 1182af1b793cSAlexandru Elisei #define KVM_CAP_SYS_ATTRIBUTES 209 1183af1b793cSAlexandru Elisei #define KVM_CAP_PPC_AIL_MODE_3 210 1184083a976eSAlexandru Elisei #define KVM_CAP_S390_MEM_OP_EXTENSION 211 1185083a976eSAlexandru Elisei #define KVM_CAP_PMU_CAPABILITY 212 1186083a976eSAlexandru Elisei #define KVM_CAP_DISABLE_QUIRKS2 213 11878d0facecSAnup Patel #define KVM_CAP_VM_TSC_CONTROL 214 11888d0facecSAnup Patel #define KVM_CAP_SYSTEM_EVENT_DATA 215 11898d0facecSAnup Patel #define KVM_CAP_ARM_SYSTEM_SUSPEND 216 11908d0facecSAnup Patel #define KVM_CAP_S390_PROTECTED_DUMP 217 11918d0facecSAnup Patel #define KVM_CAP_X86_TRIPLE_FAULT_EVENT 218 11928d0facecSAnup Patel #define KVM_CAP_X86_NOTIFY_VMEXIT 219 11938d0facecSAnup Patel #define KVM_CAP_VM_DISABLE_NX_HUGE_PAGES 220 11948d0facecSAnup Patel #define KVM_CAP_S390_ZPCI_OP 221 11958d0facecSAnup Patel #define KVM_CAP_S390_CPU_TOPOLOGY 222 119676dfc0cfSAnup Patel #define KVM_CAP_DIRTY_LOG_RING_ACQ_REL 223 1197be986824SAnup Patel #define KVM_CAP_S390_PROTECTED_ASYNC_DISABLE 224 1198be986824SAnup Patel #define KVM_CAP_DIRTY_LOG_RING_WITH_BITMAP 225 1199be986824SAnup Patel #define KVM_CAP_PMU_EVENT_MASKED_EVENTS 226 1200be986824SAnup Patel #define KVM_CAP_COUNTER_OFFSET 227 120126c85896SAnup Patel #define KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE 228 120226c85896SAnup Patel #define KVM_CAP_ARM_SUPPORTED_BLOCK_SIZES 229 1203*92ef2dcdSWill Deacon #define KVM_CAP_ARM_SUPPORTED_REG_MASK_RANGES 230 1204304dcb64SAndre Przywara 1205304dcb64SAndre Przywara #ifdef KVM_CAP_IRQ_ROUTING 1206304dcb64SAndre Przywara 1207304dcb64SAndre Przywara struct kvm_irq_routing_irqchip { 1208304dcb64SAndre Przywara __u32 irqchip; 1209304dcb64SAndre Przywara __u32 pin; 1210304dcb64SAndre Przywara }; 1211304dcb64SAndre Przywara 1212304dcb64SAndre Przywara struct kvm_irq_routing_msi { 1213304dcb64SAndre Przywara __u32 address_lo; 1214304dcb64SAndre Przywara __u32 address_hi; 1215304dcb64SAndre Przywara __u32 data; 1216764dfba1SAndre Przywara union { 1217304dcb64SAndre Przywara __u32 pad; 1218764dfba1SAndre Przywara __u32 devid; 1219764dfba1SAndre Przywara }; 1220304dcb64SAndre Przywara }; 1221304dcb64SAndre Przywara 1222304dcb64SAndre Przywara struct kvm_irq_routing_s390_adapter { 1223304dcb64SAndre Przywara __u64 ind_addr; 1224304dcb64SAndre Przywara __u64 summary_addr; 1225304dcb64SAndre Przywara __u64 ind_offset; 1226304dcb64SAndre Przywara __u32 summary_offset; 1227304dcb64SAndre Przywara __u32 adapter_id; 1228304dcb64SAndre Przywara }; 1229304dcb64SAndre Przywara 1230b3f606e1SMarc Zyngier struct kvm_irq_routing_hv_sint { 1231b3f606e1SMarc Zyngier __u32 vcpu; 1232b3f606e1SMarc Zyngier __u32 sint; 1233b3f606e1SMarc Zyngier }; 1234b3f606e1SMarc Zyngier 1235af1b793cSAlexandru Elisei struct kvm_irq_routing_xen_evtchn { 1236af1b793cSAlexandru Elisei __u32 port; 1237af1b793cSAlexandru Elisei __u32 vcpu; 1238af1b793cSAlexandru Elisei __u32 priority; 1239af1b793cSAlexandru Elisei }; 1240af1b793cSAlexandru Elisei 1241af1b793cSAlexandru Elisei #define KVM_IRQ_ROUTING_XEN_EVTCHN_PRIO_2LEVEL ((__u32)(-1)) 1242af1b793cSAlexandru Elisei 1243304dcb64SAndre Przywara /* gsi routing entry types */ 1244304dcb64SAndre Przywara #define KVM_IRQ_ROUTING_IRQCHIP 1 1245304dcb64SAndre Przywara #define KVM_IRQ_ROUTING_MSI 2 1246304dcb64SAndre Przywara #define KVM_IRQ_ROUTING_S390_ADAPTER 3 1247b3f606e1SMarc Zyngier #define KVM_IRQ_ROUTING_HV_SINT 4 1248af1b793cSAlexandru Elisei #define KVM_IRQ_ROUTING_XEN_EVTCHN 5 1249304dcb64SAndre Przywara 1250304dcb64SAndre Przywara struct kvm_irq_routing_entry { 1251304dcb64SAndre Przywara __u32 gsi; 1252304dcb64SAndre Przywara __u32 type; 1253304dcb64SAndre Przywara __u32 flags; 1254304dcb64SAndre Przywara __u32 pad; 1255304dcb64SAndre Przywara union { 1256304dcb64SAndre Przywara struct kvm_irq_routing_irqchip irqchip; 1257304dcb64SAndre Przywara struct kvm_irq_routing_msi msi; 1258304dcb64SAndre Przywara struct kvm_irq_routing_s390_adapter adapter; 1259b3f606e1SMarc Zyngier struct kvm_irq_routing_hv_sint hv_sint; 1260af1b793cSAlexandru Elisei struct kvm_irq_routing_xen_evtchn xen_evtchn; 1261304dcb64SAndre Przywara __u32 pad[8]; 1262304dcb64SAndre Przywara } u; 1263304dcb64SAndre Przywara }; 1264304dcb64SAndre Przywara 1265304dcb64SAndre Przywara struct kvm_irq_routing { 1266304dcb64SAndre Przywara __u32 nr; 1267304dcb64SAndre Przywara __u32 flags; 12688d0facecSAnup Patel struct kvm_irq_routing_entry entries[]; 1269304dcb64SAndre Przywara }; 1270304dcb64SAndre Przywara 1271304dcb64SAndre Przywara #endif 1272304dcb64SAndre Przywara 1273304dcb64SAndre Przywara #ifdef KVM_CAP_MCE 1274304dcb64SAndre Przywara /* x86 MCE */ 1275304dcb64SAndre Przywara struct kvm_x86_mce { 1276304dcb64SAndre Przywara __u64 status; 1277304dcb64SAndre Przywara __u64 addr; 1278304dcb64SAndre Przywara __u64 misc; 1279304dcb64SAndre Przywara __u64 mcg_status; 1280304dcb64SAndre Przywara __u8 bank; 1281304dcb64SAndre Przywara __u8 pad1[7]; 1282304dcb64SAndre Przywara __u64 pad2[3]; 1283304dcb64SAndre Przywara }; 1284304dcb64SAndre Przywara #endif 1285304dcb64SAndre Przywara 1286304dcb64SAndre Przywara #ifdef KVM_CAP_XEN_HVM 12875968b5ffSAnup Patel #define KVM_XEN_HVM_CONFIG_HYPERCALL_MSR (1 << 0) 12885968b5ffSAnup Patel #define KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL (1 << 1) 12895968b5ffSAnup Patel #define KVM_XEN_HVM_CONFIG_SHARED_INFO (1 << 2) 12905968b5ffSAnup Patel #define KVM_XEN_HVM_CONFIG_RUNSTATE (1 << 3) 1291af1b793cSAlexandru Elisei #define KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL (1 << 4) 12928d0facecSAnup Patel #define KVM_XEN_HVM_CONFIG_EVTCHN_SEND (1 << 5) 1293be986824SAnup Patel #define KVM_XEN_HVM_CONFIG_RUNSTATE_UPDATE_FLAG (1 << 6) 12945968b5ffSAnup Patel 1295304dcb64SAndre Przywara struct kvm_xen_hvm_config { 1296304dcb64SAndre Przywara __u32 flags; 1297304dcb64SAndre Przywara __u32 msr; 1298304dcb64SAndre Przywara __u64 blob_addr_32; 1299304dcb64SAndre Przywara __u64 blob_addr_64; 1300304dcb64SAndre Przywara __u8 blob_size_32; 1301304dcb64SAndre Przywara __u8 blob_size_64; 1302304dcb64SAndre Przywara __u8 pad2[30]; 1303304dcb64SAndre Przywara }; 1304304dcb64SAndre Przywara #endif 1305304dcb64SAndre Przywara 1306304dcb64SAndre Przywara #define KVM_IRQFD_FLAG_DEASSIGN (1 << 0) 1307304dcb64SAndre Przywara /* 1308304dcb64SAndre Przywara * Available with KVM_CAP_IRQFD_RESAMPLE 1309304dcb64SAndre Przywara * 1310304dcb64SAndre Przywara * KVM_IRQFD_FLAG_RESAMPLE indicates resamplefd is valid and specifies 1311304dcb64SAndre Przywara * the irqfd to operate in resampling mode for level triggered interrupt 13125968b5ffSAnup Patel * emulation. See Documentation/virt/kvm/api.rst. 1313304dcb64SAndre Przywara */ 1314304dcb64SAndre Przywara #define KVM_IRQFD_FLAG_RESAMPLE (1 << 1) 1315304dcb64SAndre Przywara 1316304dcb64SAndre Przywara struct kvm_irqfd { 1317304dcb64SAndre Przywara __u32 fd; 1318304dcb64SAndre Przywara __u32 gsi; 1319304dcb64SAndre Przywara __u32 flags; 1320304dcb64SAndre Przywara __u32 resamplefd; 1321304dcb64SAndre Przywara __u8 pad[16]; 1322304dcb64SAndre Przywara }; 1323304dcb64SAndre Przywara 1324764dfba1SAndre Przywara /* For KVM_CAP_ADJUST_CLOCK */ 1325764dfba1SAndre Przywara 1326764dfba1SAndre Przywara /* Do not use 1, KVM_CHECK_EXTENSION returned it before we had flags. */ 1327764dfba1SAndre Przywara #define KVM_CLOCK_TSC_STABLE 2 13285968b5ffSAnup Patel #define KVM_CLOCK_REALTIME (1 << 2) 13295968b5ffSAnup Patel #define KVM_CLOCK_HOST_TSC (1 << 3) 1330764dfba1SAndre Przywara 1331304dcb64SAndre Przywara struct kvm_clock_data { 1332304dcb64SAndre Przywara __u64 clock; 1333304dcb64SAndre Przywara __u32 flags; 13345968b5ffSAnup Patel __u32 pad0; 13355968b5ffSAnup Patel __u64 realtime; 13365968b5ffSAnup Patel __u64 host_tsc; 13375968b5ffSAnup Patel __u32 pad[4]; 1338304dcb64SAndre Przywara }; 1339304dcb64SAndre Przywara 1340764dfba1SAndre Przywara /* For KVM_CAP_SW_TLB */ 1341764dfba1SAndre Przywara 1342304dcb64SAndre Przywara #define KVM_MMU_FSL_BOOKE_NOHV 0 1343304dcb64SAndre Przywara #define KVM_MMU_FSL_BOOKE_HV 1 1344304dcb64SAndre Przywara 1345304dcb64SAndre Przywara struct kvm_config_tlb { 1346304dcb64SAndre Przywara __u64 params; 1347304dcb64SAndre Przywara __u64 array; 1348304dcb64SAndre Przywara __u32 mmu_type; 1349304dcb64SAndre Przywara __u32 array_len; 1350304dcb64SAndre Przywara }; 1351304dcb64SAndre Przywara 1352304dcb64SAndre Przywara struct kvm_dirty_tlb { 1353304dcb64SAndre Przywara __u64 bitmap; 1354304dcb64SAndre Przywara __u32 num_dirty; 1355304dcb64SAndre Przywara }; 1356304dcb64SAndre Przywara 1357304dcb64SAndre Przywara /* Available with KVM_CAP_ONE_REG */ 1358304dcb64SAndre Przywara 1359304dcb64SAndre Przywara #define KVM_REG_ARCH_MASK 0xff00000000000000ULL 1360304dcb64SAndre Przywara #define KVM_REG_GENERIC 0x0000000000000000ULL 1361304dcb64SAndre Przywara 1362304dcb64SAndre Przywara /* 1363304dcb64SAndre Przywara * Architecture specific registers are to be defined in arch headers and 1364304dcb64SAndre Przywara * ORed with the arch identifier. 1365304dcb64SAndre Przywara */ 1366304dcb64SAndre Przywara #define KVM_REG_PPC 0x1000000000000000ULL 1367304dcb64SAndre Przywara #define KVM_REG_X86 0x2000000000000000ULL 1368304dcb64SAndre Przywara #define KVM_REG_IA64 0x3000000000000000ULL 1369304dcb64SAndre Przywara #define KVM_REG_ARM 0x4000000000000000ULL 1370304dcb64SAndre Przywara #define KVM_REG_S390 0x5000000000000000ULL 1371304dcb64SAndre Przywara #define KVM_REG_ARM64 0x6000000000000000ULL 1372304dcb64SAndre Przywara #define KVM_REG_MIPS 0x7000000000000000ULL 13735968b5ffSAnup Patel #define KVM_REG_RISCV 0x8000000000000000ULL 1374*92ef2dcdSWill Deacon #define KVM_REG_LOONGARCH 0x9000000000000000ULL 1375304dcb64SAndre Przywara 1376304dcb64SAndre Przywara #define KVM_REG_SIZE_SHIFT 52 1377304dcb64SAndre Przywara #define KVM_REG_SIZE_MASK 0x00f0000000000000ULL 1378304dcb64SAndre Przywara #define KVM_REG_SIZE_U8 0x0000000000000000ULL 1379304dcb64SAndre Przywara #define KVM_REG_SIZE_U16 0x0010000000000000ULL 1380304dcb64SAndre Przywara #define KVM_REG_SIZE_U32 0x0020000000000000ULL 1381304dcb64SAndre Przywara #define KVM_REG_SIZE_U64 0x0030000000000000ULL 1382304dcb64SAndre Przywara #define KVM_REG_SIZE_U128 0x0040000000000000ULL 1383304dcb64SAndre Przywara #define KVM_REG_SIZE_U256 0x0050000000000000ULL 1384304dcb64SAndre Przywara #define KVM_REG_SIZE_U512 0x0060000000000000ULL 1385304dcb64SAndre Przywara #define KVM_REG_SIZE_U1024 0x0070000000000000ULL 138666b24a33SWill Deacon #define KVM_REG_SIZE_U2048 0x0080000000000000ULL 1387304dcb64SAndre Przywara 1388304dcb64SAndre Przywara struct kvm_reg_list { 1389304dcb64SAndre Przywara __u64 n; /* number of regs */ 13908d0facecSAnup Patel __u64 reg[]; 1391304dcb64SAndre Przywara }; 1392304dcb64SAndre Przywara 1393304dcb64SAndre Przywara struct kvm_one_reg { 1394304dcb64SAndre Przywara __u64 id; 1395304dcb64SAndre Przywara __u64 addr; 1396304dcb64SAndre Przywara }; 1397304dcb64SAndre Przywara 1398764dfba1SAndre Przywara #define KVM_MSI_VALID_DEVID (1U << 0) 1399304dcb64SAndre Przywara struct kvm_msi { 1400304dcb64SAndre Przywara __u32 address_lo; 1401304dcb64SAndre Przywara __u32 address_hi; 1402304dcb64SAndre Przywara __u32 data; 1403304dcb64SAndre Przywara __u32 flags; 1404764dfba1SAndre Przywara __u32 devid; 1405764dfba1SAndre Przywara __u8 pad[12]; 1406304dcb64SAndre Przywara }; 1407304dcb64SAndre Przywara 1408304dcb64SAndre Przywara struct kvm_arm_device_addr { 1409304dcb64SAndre Przywara __u64 id; 1410304dcb64SAndre Przywara __u64 addr; 1411304dcb64SAndre Przywara }; 1412304dcb64SAndre Przywara 1413304dcb64SAndre Przywara /* 1414304dcb64SAndre Przywara * Device control API, available with KVM_CAP_DEVICE_CTRL 1415304dcb64SAndre Przywara */ 1416304dcb64SAndre Przywara #define KVM_CREATE_DEVICE_TEST 1 1417304dcb64SAndre Przywara 1418304dcb64SAndre Przywara struct kvm_create_device { 1419304dcb64SAndre Przywara __u32 type; /* in: KVM_DEV_TYPE_xxx */ 1420304dcb64SAndre Przywara __u32 fd; /* out: device handle */ 1421304dcb64SAndre Przywara __u32 flags; /* in: KVM_CREATE_DEVICE_xxx */ 1422304dcb64SAndre Przywara }; 1423304dcb64SAndre Przywara 1424304dcb64SAndre Przywara struct kvm_device_attr { 1425304dcb64SAndre Przywara __u32 flags; /* no flags currently defined */ 1426304dcb64SAndre Przywara __u32 group; /* device-defined */ 1427304dcb64SAndre Przywara __u64 attr; /* group-defined */ 1428304dcb64SAndre Przywara __u64 addr; /* userspace address of attr data */ 1429304dcb64SAndre Przywara }; 1430304dcb64SAndre Przywara 143126c85896SAnup Patel #define KVM_DEV_VFIO_FILE 1 143226c85896SAnup Patel 143326c85896SAnup Patel #define KVM_DEV_VFIO_FILE_ADD 1 143426c85896SAnup Patel #define KVM_DEV_VFIO_FILE_DEL 2 143526c85896SAnup Patel 143626c85896SAnup Patel /* KVM_DEV_VFIO_GROUP aliases are for compile time uapi compatibility */ 143726c85896SAnup Patel #define KVM_DEV_VFIO_GROUP KVM_DEV_VFIO_FILE 143826c85896SAnup Patel 143926c85896SAnup Patel #define KVM_DEV_VFIO_GROUP_ADD KVM_DEV_VFIO_FILE_ADD 144026c85896SAnup Patel #define KVM_DEV_VFIO_GROUP_DEL KVM_DEV_VFIO_FILE_DEL 14411bbe92f5SDave Martin #define KVM_DEV_VFIO_GROUP_SET_SPAPR_TCE 3 1442304dcb64SAndre Przywara 1443304dcb64SAndre Przywara enum kvm_device_type { 1444304dcb64SAndre Przywara KVM_DEV_TYPE_FSL_MPIC_20 = 1, 1445304dcb64SAndre Przywara #define KVM_DEV_TYPE_FSL_MPIC_20 KVM_DEV_TYPE_FSL_MPIC_20 1446304dcb64SAndre Przywara KVM_DEV_TYPE_FSL_MPIC_42, 1447304dcb64SAndre Przywara #define KVM_DEV_TYPE_FSL_MPIC_42 KVM_DEV_TYPE_FSL_MPIC_42 1448304dcb64SAndre Przywara KVM_DEV_TYPE_XICS, 1449304dcb64SAndre Przywara #define KVM_DEV_TYPE_XICS KVM_DEV_TYPE_XICS 1450304dcb64SAndre Przywara KVM_DEV_TYPE_VFIO, 1451304dcb64SAndre Przywara #define KVM_DEV_TYPE_VFIO KVM_DEV_TYPE_VFIO 1452304dcb64SAndre Przywara KVM_DEV_TYPE_ARM_VGIC_V2, 1453304dcb64SAndre Przywara #define KVM_DEV_TYPE_ARM_VGIC_V2 KVM_DEV_TYPE_ARM_VGIC_V2 1454304dcb64SAndre Przywara KVM_DEV_TYPE_FLIC, 1455304dcb64SAndre Przywara #define KVM_DEV_TYPE_FLIC KVM_DEV_TYPE_FLIC 1456304dcb64SAndre Przywara KVM_DEV_TYPE_ARM_VGIC_V3, 1457304dcb64SAndre Przywara #define KVM_DEV_TYPE_ARM_VGIC_V3 KVM_DEV_TYPE_ARM_VGIC_V3 1458764dfba1SAndre Przywara KVM_DEV_TYPE_ARM_VGIC_ITS, 1459764dfba1SAndre Przywara #define KVM_DEV_TYPE_ARM_VGIC_ITS KVM_DEV_TYPE_ARM_VGIC_ITS 146066b24a33SWill Deacon KVM_DEV_TYPE_XIVE, 146166b24a33SWill Deacon #define KVM_DEV_TYPE_XIVE KVM_DEV_TYPE_XIVE 14625968b5ffSAnup Patel KVM_DEV_TYPE_ARM_PV_TIME, 14635968b5ffSAnup Patel #define KVM_DEV_TYPE_ARM_PV_TIME KVM_DEV_TYPE_ARM_PV_TIME 146426c85896SAnup Patel KVM_DEV_TYPE_RISCV_AIA, 146526c85896SAnup Patel #define KVM_DEV_TYPE_RISCV_AIA KVM_DEV_TYPE_RISCV_AIA 1466304dcb64SAndre Przywara KVM_DEV_TYPE_MAX, 1467304dcb64SAndre Przywara }; 1468304dcb64SAndre Przywara 14691bbe92f5SDave Martin struct kvm_vfio_spapr_tce { 14701bbe92f5SDave Martin __s32 groupfd; 14711bbe92f5SDave Martin __s32 tablefd; 14721bbe92f5SDave Martin }; 14731bbe92f5SDave Martin 1474304dcb64SAndre Przywara /* 1475304dcb64SAndre Przywara * KVM_CREATE_VCPU receives as a parameter the vcpu slot, and returns 1476304dcb64SAndre Przywara * a vcpu fd. 1477304dcb64SAndre Przywara */ 1478304dcb64SAndre Przywara #define KVM_CREATE_VCPU _IO(KVMIO, 0x41) 1479304dcb64SAndre Przywara #define KVM_GET_DIRTY_LOG _IOW(KVMIO, 0x42, struct kvm_dirty_log) 1480304dcb64SAndre Przywara #define KVM_SET_NR_MMU_PAGES _IO(KVMIO, 0x44) 1481be986824SAnup Patel #define KVM_GET_NR_MMU_PAGES _IO(KVMIO, 0x45) /* deprecated */ 1482304dcb64SAndre Przywara #define KVM_SET_USER_MEMORY_REGION _IOW(KVMIO, 0x46, \ 1483304dcb64SAndre Przywara struct kvm_userspace_memory_region) 1484304dcb64SAndre Przywara #define KVM_SET_TSS_ADDR _IO(KVMIO, 0x47) 1485304dcb64SAndre Przywara #define KVM_SET_IDENTITY_MAP_ADDR _IOW(KVMIO, 0x48, __u64) 1486304dcb64SAndre Przywara 1487304dcb64SAndre Przywara /* enable ucontrol for s390 */ 1488304dcb64SAndre Przywara struct kvm_s390_ucas_mapping { 1489304dcb64SAndre Przywara __u64 user_addr; 1490304dcb64SAndre Przywara __u64 vcpu_addr; 1491304dcb64SAndre Przywara __u64 length; 1492304dcb64SAndre Przywara }; 1493304dcb64SAndre Przywara #define KVM_S390_UCAS_MAP _IOW(KVMIO, 0x50, struct kvm_s390_ucas_mapping) 1494304dcb64SAndre Przywara #define KVM_S390_UCAS_UNMAP _IOW(KVMIO, 0x51, struct kvm_s390_ucas_mapping) 1495304dcb64SAndre Przywara #define KVM_S390_VCPU_FAULT _IOW(KVMIO, 0x52, unsigned long) 1496304dcb64SAndre Przywara 1497304dcb64SAndre Przywara /* Device model IOC */ 1498304dcb64SAndre Przywara #define KVM_CREATE_IRQCHIP _IO(KVMIO, 0x60) 1499304dcb64SAndre Przywara #define KVM_IRQ_LINE _IOW(KVMIO, 0x61, struct kvm_irq_level) 1500304dcb64SAndre Przywara #define KVM_GET_IRQCHIP _IOWR(KVMIO, 0x62, struct kvm_irqchip) 1501304dcb64SAndre Przywara #define KVM_SET_IRQCHIP _IOR(KVMIO, 0x63, struct kvm_irqchip) 1502304dcb64SAndre Przywara #define KVM_CREATE_PIT _IO(KVMIO, 0x64) 1503304dcb64SAndre Przywara #define KVM_GET_PIT _IOWR(KVMIO, 0x65, struct kvm_pit_state) 1504304dcb64SAndre Przywara #define KVM_SET_PIT _IOR(KVMIO, 0x66, struct kvm_pit_state) 1505304dcb64SAndre Przywara #define KVM_IRQ_LINE_STATUS _IOWR(KVMIO, 0x67, struct kvm_irq_level) 1506304dcb64SAndre Przywara #define KVM_REGISTER_COALESCED_MMIO \ 1507304dcb64SAndre Przywara _IOW(KVMIO, 0x67, struct kvm_coalesced_mmio_zone) 1508304dcb64SAndre Przywara #define KVM_UNREGISTER_COALESCED_MMIO \ 1509304dcb64SAndre Przywara _IOW(KVMIO, 0x68, struct kvm_coalesced_mmio_zone) 1510304dcb64SAndre Przywara #define KVM_ASSIGN_PCI_DEVICE _IOR(KVMIO, 0x69, \ 1511304dcb64SAndre Przywara struct kvm_assigned_pci_dev) 1512304dcb64SAndre Przywara #define KVM_SET_GSI_ROUTING _IOW(KVMIO, 0x6a, struct kvm_irq_routing) 1513304dcb64SAndre Przywara /* deprecated, replaced by KVM_ASSIGN_DEV_IRQ */ 1514304dcb64SAndre Przywara #define KVM_ASSIGN_IRQ __KVM_DEPRECATED_VM_R_0x70 1515304dcb64SAndre Przywara #define KVM_ASSIGN_DEV_IRQ _IOW(KVMIO, 0x70, struct kvm_assigned_irq) 1516304dcb64SAndre Przywara #define KVM_REINJECT_CONTROL _IO(KVMIO, 0x71) 1517304dcb64SAndre Przywara #define KVM_DEASSIGN_PCI_DEVICE _IOW(KVMIO, 0x72, \ 1518304dcb64SAndre Przywara struct kvm_assigned_pci_dev) 1519304dcb64SAndre Przywara #define KVM_ASSIGN_SET_MSIX_NR _IOW(KVMIO, 0x73, \ 1520304dcb64SAndre Przywara struct kvm_assigned_msix_nr) 1521304dcb64SAndre Przywara #define KVM_ASSIGN_SET_MSIX_ENTRY _IOW(KVMIO, 0x74, \ 1522304dcb64SAndre Przywara struct kvm_assigned_msix_entry) 1523304dcb64SAndre Przywara #define KVM_DEASSIGN_DEV_IRQ _IOW(KVMIO, 0x75, struct kvm_assigned_irq) 1524304dcb64SAndre Przywara #define KVM_IRQFD _IOW(KVMIO, 0x76, struct kvm_irqfd) 1525304dcb64SAndre Przywara #define KVM_CREATE_PIT2 _IOW(KVMIO, 0x77, struct kvm_pit_config) 1526304dcb64SAndre Przywara #define KVM_SET_BOOT_CPU_ID _IO(KVMIO, 0x78) 1527304dcb64SAndre Przywara #define KVM_IOEVENTFD _IOW(KVMIO, 0x79, struct kvm_ioeventfd) 1528304dcb64SAndre Przywara #define KVM_XEN_HVM_CONFIG _IOW(KVMIO, 0x7a, struct kvm_xen_hvm_config) 1529304dcb64SAndre Przywara #define KVM_SET_CLOCK _IOW(KVMIO, 0x7b, struct kvm_clock_data) 1530304dcb64SAndre Przywara #define KVM_GET_CLOCK _IOR(KVMIO, 0x7c, struct kvm_clock_data) 1531304dcb64SAndre Przywara /* Available with KVM_CAP_PIT_STATE2 */ 1532304dcb64SAndre Przywara #define KVM_GET_PIT2 _IOR(KVMIO, 0x9f, struct kvm_pit_state2) 1533304dcb64SAndre Przywara #define KVM_SET_PIT2 _IOW(KVMIO, 0xa0, struct kvm_pit_state2) 1534304dcb64SAndre Przywara /* Available with KVM_CAP_PPC_GET_PVINFO */ 1535304dcb64SAndre Przywara #define KVM_PPC_GET_PVINFO _IOW(KVMIO, 0xa1, struct kvm_ppc_pvinfo) 15368d0facecSAnup Patel /* Available with KVM_CAP_TSC_CONTROL for a vCPU, or with 15378d0facecSAnup Patel * KVM_CAP_VM_TSC_CONTROL to set defaults for a VM */ 1538304dcb64SAndre Przywara #define KVM_SET_TSC_KHZ _IO(KVMIO, 0xa2) 1539304dcb64SAndre Przywara #define KVM_GET_TSC_KHZ _IO(KVMIO, 0xa3) 1540304dcb64SAndre Przywara /* Available with KVM_CAP_PCI_2_3 */ 1541304dcb64SAndre Przywara #define KVM_ASSIGN_SET_INTX_MASK _IOW(KVMIO, 0xa4, \ 1542304dcb64SAndre Przywara struct kvm_assigned_pci_dev) 1543304dcb64SAndre Przywara /* Available with KVM_CAP_SIGNAL_MSI */ 1544304dcb64SAndre Przywara #define KVM_SIGNAL_MSI _IOW(KVMIO, 0xa5, struct kvm_msi) 1545304dcb64SAndre Przywara /* Available with KVM_CAP_PPC_GET_SMMU_INFO */ 1546304dcb64SAndre Przywara #define KVM_PPC_GET_SMMU_INFO _IOR(KVMIO, 0xa6, struct kvm_ppc_smmu_info) 1547304dcb64SAndre Przywara /* Available with KVM_CAP_PPC_ALLOC_HTAB */ 1548304dcb64SAndre Przywara #define KVM_PPC_ALLOCATE_HTAB _IOWR(KVMIO, 0xa7, __u32) 1549304dcb64SAndre Przywara #define KVM_CREATE_SPAPR_TCE _IOW(KVMIO, 0xa8, struct kvm_create_spapr_tce) 1550b37ed70eSAndre Przywara #define KVM_CREATE_SPAPR_TCE_64 _IOW(KVMIO, 0xa8, \ 1551b37ed70eSAndre Przywara struct kvm_create_spapr_tce_64) 1552304dcb64SAndre Przywara /* Available with KVM_CAP_RMA */ 1553304dcb64SAndre Przywara #define KVM_ALLOCATE_RMA _IOR(KVMIO, 0xa9, struct kvm_allocate_rma) 1554304dcb64SAndre Przywara /* Available with KVM_CAP_PPC_HTAB_FD */ 1555304dcb64SAndre Przywara #define KVM_PPC_GET_HTAB_FD _IOW(KVMIO, 0xaa, struct kvm_get_htab_fd) 1556304dcb64SAndre Przywara /* Available with KVM_CAP_ARM_SET_DEVICE_ADDR */ 1557304dcb64SAndre Przywara #define KVM_ARM_SET_DEVICE_ADDR _IOW(KVMIO, 0xab, struct kvm_arm_device_addr) 1558304dcb64SAndre Przywara /* Available with KVM_CAP_PPC_RTAS */ 1559304dcb64SAndre Przywara #define KVM_PPC_RTAS_DEFINE_TOKEN _IOW(KVMIO, 0xac, struct kvm_rtas_token_args) 1560764dfba1SAndre Przywara /* Available with KVM_CAP_SPAPR_RESIZE_HPT */ 1561764dfba1SAndre Przywara #define KVM_PPC_RESIZE_HPT_PREPARE _IOR(KVMIO, 0xad, struct kvm_ppc_resize_hpt) 1562764dfba1SAndre Przywara #define KVM_PPC_RESIZE_HPT_COMMIT _IOR(KVMIO, 0xae, struct kvm_ppc_resize_hpt) 1563764dfba1SAndre Przywara /* Available with KVM_CAP_PPC_RADIX_MMU or KVM_CAP_PPC_HASH_MMU_V3 */ 1564764dfba1SAndre Przywara #define KVM_PPC_CONFIGURE_V3_MMU _IOW(KVMIO, 0xaf, struct kvm_ppc_mmuv3_cfg) 1565764dfba1SAndre Przywara /* Available with KVM_CAP_PPC_RADIX_MMU */ 1566764dfba1SAndre Przywara #define KVM_PPC_GET_RMMU_INFO _IOW(KVMIO, 0xb0, struct kvm_ppc_rmmu_info) 15671bbe92f5SDave Martin /* Available with KVM_CAP_PPC_GET_CPU_CHAR */ 15681bbe92f5SDave Martin #define KVM_PPC_GET_CPU_CHAR _IOR(KVMIO, 0xb1, struct kvm_ppc_cpu_char) 156966b24a33SWill Deacon /* Available with KVM_CAP_PMU_EVENT_FILTER */ 157066b24a33SWill Deacon #define KVM_SET_PMU_EVENT_FILTER _IOW(KVMIO, 0xb2, struct kvm_pmu_event_filter) 15715968b5ffSAnup Patel #define KVM_PPC_SVM_OFF _IO(KVMIO, 0xb3) 15725968b5ffSAnup Patel #define KVM_ARM_MTE_COPY_TAGS _IOR(KVMIO, 0xb4, struct kvm_arm_copy_mte_tags) 1573be986824SAnup Patel /* Available with KVM_CAP_COUNTER_OFFSET */ 1574be986824SAnup Patel #define KVM_ARM_SET_COUNTER_OFFSET _IOW(KVMIO, 0xb5, struct kvm_arm_counter_offset) 1575*92ef2dcdSWill Deacon #define KVM_ARM_GET_REG_WRITABLE_MASKS _IOR(KVMIO, 0xb6, struct reg_mask_range) 1576304dcb64SAndre Przywara 1577304dcb64SAndre Przywara /* ioctl for vm fd */ 1578304dcb64SAndre Przywara #define KVM_CREATE_DEVICE _IOWR(KVMIO, 0xe0, struct kvm_create_device) 1579304dcb64SAndre Przywara 1580304dcb64SAndre Przywara /* ioctls for fds returned by KVM_CREATE_DEVICE */ 1581304dcb64SAndre Przywara #define KVM_SET_DEVICE_ATTR _IOW(KVMIO, 0xe1, struct kvm_device_attr) 1582304dcb64SAndre Przywara #define KVM_GET_DEVICE_ATTR _IOW(KVMIO, 0xe2, struct kvm_device_attr) 1583304dcb64SAndre Przywara #define KVM_HAS_DEVICE_ATTR _IOW(KVMIO, 0xe3, struct kvm_device_attr) 1584304dcb64SAndre Przywara 1585304dcb64SAndre Przywara /* 1586304dcb64SAndre Przywara * ioctls for vcpu fds 1587304dcb64SAndre Przywara */ 1588304dcb64SAndre Przywara #define KVM_RUN _IO(KVMIO, 0x80) 1589304dcb64SAndre Przywara #define KVM_GET_REGS _IOR(KVMIO, 0x81, struct kvm_regs) 1590304dcb64SAndre Przywara #define KVM_SET_REGS _IOW(KVMIO, 0x82, struct kvm_regs) 1591304dcb64SAndre Przywara #define KVM_GET_SREGS _IOR(KVMIO, 0x83, struct kvm_sregs) 1592304dcb64SAndre Przywara #define KVM_SET_SREGS _IOW(KVMIO, 0x84, struct kvm_sregs) 1593304dcb64SAndre Przywara #define KVM_TRANSLATE _IOWR(KVMIO, 0x85, struct kvm_translation) 1594304dcb64SAndre Przywara #define KVM_INTERRUPT _IOW(KVMIO, 0x86, struct kvm_interrupt) 1595304dcb64SAndre Przywara /* KVM_DEBUG_GUEST is no longer supported, use KVM_SET_GUEST_DEBUG instead */ 1596304dcb64SAndre Przywara #define KVM_DEBUG_GUEST __KVM_DEPRECATED_VCPU_W_0x87 1597304dcb64SAndre Przywara #define KVM_GET_MSRS _IOWR(KVMIO, 0x88, struct kvm_msrs) 1598304dcb64SAndre Przywara #define KVM_SET_MSRS _IOW(KVMIO, 0x89, struct kvm_msrs) 1599304dcb64SAndre Przywara #define KVM_SET_CPUID _IOW(KVMIO, 0x8a, struct kvm_cpuid) 1600304dcb64SAndre Przywara #define KVM_SET_SIGNAL_MASK _IOW(KVMIO, 0x8b, struct kvm_signal_mask) 1601304dcb64SAndre Przywara #define KVM_GET_FPU _IOR(KVMIO, 0x8c, struct kvm_fpu) 1602304dcb64SAndre Przywara #define KVM_SET_FPU _IOW(KVMIO, 0x8d, struct kvm_fpu) 1603304dcb64SAndre Przywara #define KVM_GET_LAPIC _IOR(KVMIO, 0x8e, struct kvm_lapic_state) 1604304dcb64SAndre Przywara #define KVM_SET_LAPIC _IOW(KVMIO, 0x8f, struct kvm_lapic_state) 1605304dcb64SAndre Przywara #define KVM_SET_CPUID2 _IOW(KVMIO, 0x90, struct kvm_cpuid2) 1606304dcb64SAndre Przywara #define KVM_GET_CPUID2 _IOWR(KVMIO, 0x91, struct kvm_cpuid2) 1607304dcb64SAndre Przywara /* Available with KVM_CAP_VAPIC */ 1608304dcb64SAndre Przywara #define KVM_TPR_ACCESS_REPORTING _IOWR(KVMIO, 0x92, struct kvm_tpr_access_ctl) 1609304dcb64SAndre Przywara /* Available with KVM_CAP_VAPIC */ 1610304dcb64SAndre Przywara #define KVM_SET_VAPIC_ADDR _IOW(KVMIO, 0x93, struct kvm_vapic_addr) 1611304dcb64SAndre Przywara /* valid for virtual machine (for floating interrupt)_and_ vcpu */ 1612304dcb64SAndre Przywara #define KVM_S390_INTERRUPT _IOW(KVMIO, 0x94, struct kvm_s390_interrupt) 1613304dcb64SAndre Przywara /* store status for s390 */ 1614304dcb64SAndre Przywara #define KVM_S390_STORE_STATUS_NOADDR (-1ul) 1615304dcb64SAndre Przywara #define KVM_S390_STORE_STATUS_PREFIXED (-2ul) 1616304dcb64SAndre Przywara #define KVM_S390_STORE_STATUS _IOW(KVMIO, 0x95, unsigned long) 1617304dcb64SAndre Przywara /* initial ipl psw for s390 */ 1618304dcb64SAndre Przywara #define KVM_S390_SET_INITIAL_PSW _IOW(KVMIO, 0x96, struct kvm_s390_psw) 1619304dcb64SAndre Przywara /* initial reset for s390 */ 1620304dcb64SAndre Przywara #define KVM_S390_INITIAL_RESET _IO(KVMIO, 0x97) 1621304dcb64SAndre Przywara #define KVM_GET_MP_STATE _IOR(KVMIO, 0x98, struct kvm_mp_state) 1622304dcb64SAndre Przywara #define KVM_SET_MP_STATE _IOW(KVMIO, 0x99, struct kvm_mp_state) 1623304dcb64SAndre Przywara /* Available with KVM_CAP_USER_NMI */ 1624304dcb64SAndre Przywara #define KVM_NMI _IO(KVMIO, 0x9a) 1625304dcb64SAndre Przywara /* Available with KVM_CAP_SET_GUEST_DEBUG */ 1626304dcb64SAndre Przywara #define KVM_SET_GUEST_DEBUG _IOW(KVMIO, 0x9b, struct kvm_guest_debug) 1627304dcb64SAndre Przywara /* MCE for x86 */ 1628304dcb64SAndre Przywara #define KVM_X86_SETUP_MCE _IOW(KVMIO, 0x9c, __u64) 1629304dcb64SAndre Przywara #define KVM_X86_GET_MCE_CAP_SUPPORTED _IOR(KVMIO, 0x9d, __u64) 1630304dcb64SAndre Przywara #define KVM_X86_SET_MCE _IOW(KVMIO, 0x9e, struct kvm_x86_mce) 1631304dcb64SAndre Przywara /* Available with KVM_CAP_VCPU_EVENTS */ 1632304dcb64SAndre Przywara #define KVM_GET_VCPU_EVENTS _IOR(KVMIO, 0x9f, struct kvm_vcpu_events) 1633304dcb64SAndre Przywara #define KVM_SET_VCPU_EVENTS _IOW(KVMIO, 0xa0, struct kvm_vcpu_events) 1634304dcb64SAndre Przywara /* Available with KVM_CAP_DEBUGREGS */ 1635304dcb64SAndre Przywara #define KVM_GET_DEBUGREGS _IOR(KVMIO, 0xa1, struct kvm_debugregs) 1636304dcb64SAndre Przywara #define KVM_SET_DEBUGREGS _IOW(KVMIO, 0xa2, struct kvm_debugregs) 1637304dcb64SAndre Przywara /* 163826c85896SAnup Patel * vcpu version available with KVM_CAP_ENABLE_CAP 1639304dcb64SAndre Przywara * vm version available with KVM_CAP_ENABLE_CAP_VM 1640304dcb64SAndre Przywara */ 1641304dcb64SAndre Przywara #define KVM_ENABLE_CAP _IOW(KVMIO, 0xa3, struct kvm_enable_cap) 1642304dcb64SAndre Przywara /* Available with KVM_CAP_XSAVE */ 1643304dcb64SAndre Przywara #define KVM_GET_XSAVE _IOR(KVMIO, 0xa4, struct kvm_xsave) 1644304dcb64SAndre Przywara #define KVM_SET_XSAVE _IOW(KVMIO, 0xa5, struct kvm_xsave) 1645304dcb64SAndre Przywara /* Available with KVM_CAP_XCRS */ 1646304dcb64SAndre Przywara #define KVM_GET_XCRS _IOR(KVMIO, 0xa6, struct kvm_xcrs) 1647304dcb64SAndre Przywara #define KVM_SET_XCRS _IOW(KVMIO, 0xa7, struct kvm_xcrs) 1648304dcb64SAndre Przywara /* Available with KVM_CAP_SW_TLB */ 1649304dcb64SAndre Przywara #define KVM_DIRTY_TLB _IOW(KVMIO, 0xaa, struct kvm_dirty_tlb) 1650304dcb64SAndre Przywara /* Available with KVM_CAP_ONE_REG */ 1651304dcb64SAndre Przywara #define KVM_GET_ONE_REG _IOW(KVMIO, 0xab, struct kvm_one_reg) 1652304dcb64SAndre Przywara #define KVM_SET_ONE_REG _IOW(KVMIO, 0xac, struct kvm_one_reg) 1653304dcb64SAndre Przywara /* VM is being stopped by host */ 1654304dcb64SAndre Przywara #define KVM_KVMCLOCK_CTRL _IO(KVMIO, 0xad) 1655304dcb64SAndre Przywara #define KVM_ARM_VCPU_INIT _IOW(KVMIO, 0xae, struct kvm_vcpu_init) 1656304dcb64SAndre Przywara #define KVM_ARM_PREFERRED_TARGET _IOR(KVMIO, 0xaf, struct kvm_vcpu_init) 1657304dcb64SAndre Przywara #define KVM_GET_REG_LIST _IOWR(KVMIO, 0xb0, struct kvm_reg_list) 1658304dcb64SAndre Przywara /* Available with KVM_CAP_S390_MEM_OP */ 1659304dcb64SAndre Przywara #define KVM_S390_MEM_OP _IOW(KVMIO, 0xb1, struct kvm_s390_mem_op) 1660304dcb64SAndre Przywara /* Available with KVM_CAP_S390_SKEYS */ 1661304dcb64SAndre Przywara #define KVM_S390_GET_SKEYS _IOW(KVMIO, 0xb2, struct kvm_s390_skeys) 1662304dcb64SAndre Przywara #define KVM_S390_SET_SKEYS _IOW(KVMIO, 0xb3, struct kvm_s390_skeys) 1663304dcb64SAndre Przywara /* Available with KVM_CAP_S390_INJECT_IRQ */ 1664304dcb64SAndre Przywara #define KVM_S390_IRQ _IOW(KVMIO, 0xb4, struct kvm_s390_irq) 1665304dcb64SAndre Przywara /* Available with KVM_CAP_S390_IRQ_STATE */ 1666304dcb64SAndre Przywara #define KVM_S390_SET_IRQ_STATE _IOW(KVMIO, 0xb5, struct kvm_s390_irq_state) 1667304dcb64SAndre Przywara #define KVM_S390_GET_IRQ_STATE _IOW(KVMIO, 0xb6, struct kvm_s390_irq_state) 1668b3f606e1SMarc Zyngier /* Available with KVM_CAP_X86_SMM */ 1669b3f606e1SMarc Zyngier #define KVM_SMI _IO(KVMIO, 0xb7) 16701bbe92f5SDave Martin /* Available with KVM_CAP_S390_CMMA_MIGRATION */ 16711bbe92f5SDave Martin #define KVM_S390_GET_CMMA_BITS _IOWR(KVMIO, 0xb8, struct kvm_s390_cmma_log) 16721bbe92f5SDave Martin #define KVM_S390_SET_CMMA_BITS _IOW(KVMIO, 0xb9, struct kvm_s390_cmma_log) 16731bbe92f5SDave Martin /* Memory Encryption Commands */ 16741bbe92f5SDave Martin #define KVM_MEMORY_ENCRYPT_OP _IOWR(KVMIO, 0xba, unsigned long) 16751bbe92f5SDave Martin 16761bbe92f5SDave Martin struct kvm_enc_region { 16771bbe92f5SDave Martin __u64 addr; 16781bbe92f5SDave Martin __u64 size; 16791bbe92f5SDave Martin }; 16801bbe92f5SDave Martin 16811bbe92f5SDave Martin #define KVM_MEMORY_ENCRYPT_REG_REGION _IOR(KVMIO, 0xbb, struct kvm_enc_region) 16821bbe92f5SDave Martin #define KVM_MEMORY_ENCRYPT_UNREG_REGION _IOR(KVMIO, 0xbc, struct kvm_enc_region) 16831bbe92f5SDave Martin 16841bbe92f5SDave Martin /* Available with KVM_CAP_HYPERV_EVENTFD */ 16851bbe92f5SDave Martin #define KVM_HYPERV_EVENTFD _IOW(KVMIO, 0xbd, struct kvm_hyperv_eventfd) 16861bbe92f5SDave Martin 16871bbe92f5SDave Martin /* Available with KVM_CAP_NESTED_STATE */ 16881bbe92f5SDave Martin #define KVM_GET_NESTED_STATE _IOWR(KVMIO, 0xbe, struct kvm_nested_state) 16891bbe92f5SDave Martin #define KVM_SET_NESTED_STATE _IOW(KVMIO, 0xbf, struct kvm_nested_state) 16901bbe92f5SDave Martin 169166b24a33SWill Deacon /* Available with KVM_CAP_MANUAL_DIRTY_LOG_PROTECT_2 */ 16921bbe92f5SDave Martin #define KVM_CLEAR_DIRTY_LOG _IOWR(KVMIO, 0xc0, struct kvm_clear_dirty_log) 16931bbe92f5SDave Martin 16945968b5ffSAnup Patel /* Available with KVM_CAP_HYPERV_CPUID (vcpu) / KVM_CAP_SYS_HYPERV_CPUID (system) */ 16951bbe92f5SDave Martin #define KVM_GET_SUPPORTED_HV_CPUID _IOWR(KVMIO, 0xc1, struct kvm_cpuid2) 16961bbe92f5SDave Martin 169766b24a33SWill Deacon /* Available with KVM_CAP_ARM_SVE */ 169866b24a33SWill Deacon #define KVM_ARM_VCPU_FINALIZE _IOW(KVMIO, 0xc2, int) 169966b24a33SWill Deacon 17005968b5ffSAnup Patel /* Available with KVM_CAP_S390_VCPU_RESETS */ 17015968b5ffSAnup Patel #define KVM_S390_NORMAL_RESET _IO(KVMIO, 0xc3) 17025968b5ffSAnup Patel #define KVM_S390_CLEAR_RESET _IO(KVMIO, 0xc4) 17035968b5ffSAnup Patel 17045968b5ffSAnup Patel struct kvm_s390_pv_sec_parm { 17055968b5ffSAnup Patel __u64 origin; 17065968b5ffSAnup Patel __u64 length; 17075968b5ffSAnup Patel }; 17085968b5ffSAnup Patel 17095968b5ffSAnup Patel struct kvm_s390_pv_unp { 17105968b5ffSAnup Patel __u64 addr; 17115968b5ffSAnup Patel __u64 size; 17125968b5ffSAnup Patel __u64 tweak; 17135968b5ffSAnup Patel }; 17145968b5ffSAnup Patel 17158d0facecSAnup Patel enum pv_cmd_dmp_id { 17168d0facecSAnup Patel KVM_PV_DUMP_INIT, 17178d0facecSAnup Patel KVM_PV_DUMP_CONFIG_STOR_STATE, 17188d0facecSAnup Patel KVM_PV_DUMP_COMPLETE, 17198d0facecSAnup Patel KVM_PV_DUMP_CPU, 17208d0facecSAnup Patel }; 17218d0facecSAnup Patel 17228d0facecSAnup Patel struct kvm_s390_pv_dmp { 17238d0facecSAnup Patel __u64 subcmd; 17248d0facecSAnup Patel __u64 buff_addr; 17258d0facecSAnup Patel __u64 buff_len; 17268d0facecSAnup Patel __u64 gaddr; /* For dump storage state */ 17278d0facecSAnup Patel __u64 reserved[4]; 17288d0facecSAnup Patel }; 17298d0facecSAnup Patel 17308d0facecSAnup Patel enum pv_cmd_info_id { 17318d0facecSAnup Patel KVM_PV_INFO_VM, 17328d0facecSAnup Patel KVM_PV_INFO_DUMP, 17338d0facecSAnup Patel }; 17348d0facecSAnup Patel 17358d0facecSAnup Patel struct kvm_s390_pv_info_dump { 17368d0facecSAnup Patel __u64 dump_cpu_buffer_len; 17378d0facecSAnup Patel __u64 dump_config_mem_buffer_per_1m; 17388d0facecSAnup Patel __u64 dump_config_finalize_len; 17398d0facecSAnup Patel }; 17408d0facecSAnup Patel 17418d0facecSAnup Patel struct kvm_s390_pv_info_vm { 17428d0facecSAnup Patel __u64 inst_calls_list[4]; 17438d0facecSAnup Patel __u64 max_cpus; 17448d0facecSAnup Patel __u64 max_guests; 17458d0facecSAnup Patel __u64 max_guest_addr; 17468d0facecSAnup Patel __u64 feature_indication; 17478d0facecSAnup Patel }; 17488d0facecSAnup Patel 17498d0facecSAnup Patel struct kvm_s390_pv_info_header { 17508d0facecSAnup Patel __u32 id; 17518d0facecSAnup Patel __u32 len_max; 17528d0facecSAnup Patel __u32 len_written; 17538d0facecSAnup Patel __u32 reserved; 17548d0facecSAnup Patel }; 17558d0facecSAnup Patel 17568d0facecSAnup Patel struct kvm_s390_pv_info { 17578d0facecSAnup Patel struct kvm_s390_pv_info_header header; 17588d0facecSAnup Patel union { 17598d0facecSAnup Patel struct kvm_s390_pv_info_dump dump; 17608d0facecSAnup Patel struct kvm_s390_pv_info_vm vm; 17618d0facecSAnup Patel }; 17628d0facecSAnup Patel }; 17638d0facecSAnup Patel 17645968b5ffSAnup Patel enum pv_cmd_id { 17655968b5ffSAnup Patel KVM_PV_ENABLE, 17665968b5ffSAnup Patel KVM_PV_DISABLE, 17675968b5ffSAnup Patel KVM_PV_SET_SEC_PARMS, 17685968b5ffSAnup Patel KVM_PV_UNPACK, 17695968b5ffSAnup Patel KVM_PV_VERIFY, 17705968b5ffSAnup Patel KVM_PV_PREP_RESET, 17715968b5ffSAnup Patel KVM_PV_UNSHARE_ALL, 17728d0facecSAnup Patel KVM_PV_INFO, 17738d0facecSAnup Patel KVM_PV_DUMP, 1774be986824SAnup Patel KVM_PV_ASYNC_CLEANUP_PREPARE, 1775be986824SAnup Patel KVM_PV_ASYNC_CLEANUP_PERFORM, 17765968b5ffSAnup Patel }; 17775968b5ffSAnup Patel 17785968b5ffSAnup Patel struct kvm_pv_cmd { 17795968b5ffSAnup Patel __u32 cmd; /* Command to be executed */ 17805968b5ffSAnup Patel __u16 rc; /* Ultravisor return code */ 17815968b5ffSAnup Patel __u16 rrc; /* Ultravisor return reason code */ 17825968b5ffSAnup Patel __u64 data; /* Data or address */ 17835968b5ffSAnup Patel __u32 flags; /* flags for future extensions. Must be 0 for now */ 17845968b5ffSAnup Patel __u32 reserved[3]; 17855968b5ffSAnup Patel }; 17865968b5ffSAnup Patel 17875968b5ffSAnup Patel /* Available with KVM_CAP_S390_PROTECTED */ 17885968b5ffSAnup Patel #define KVM_S390_PV_COMMAND _IOWR(KVMIO, 0xc5, struct kvm_pv_cmd) 17895968b5ffSAnup Patel 17905968b5ffSAnup Patel /* Available with KVM_CAP_X86_MSR_FILTER */ 17915968b5ffSAnup Patel #define KVM_X86_SET_MSR_FILTER _IOW(KVMIO, 0xc6, struct kvm_msr_filter) 17925968b5ffSAnup Patel 17935968b5ffSAnup Patel /* Available with KVM_CAP_DIRTY_LOG_RING */ 17945968b5ffSAnup Patel #define KVM_RESET_DIRTY_RINGS _IO(KVMIO, 0xc7) 17955968b5ffSAnup Patel 17965968b5ffSAnup Patel /* Per-VM Xen attributes */ 17975968b5ffSAnup Patel #define KVM_XEN_HVM_GET_ATTR _IOWR(KVMIO, 0xc8, struct kvm_xen_hvm_attr) 17985968b5ffSAnup Patel #define KVM_XEN_HVM_SET_ATTR _IOW(KVMIO, 0xc9, struct kvm_xen_hvm_attr) 17995968b5ffSAnup Patel 18005968b5ffSAnup Patel struct kvm_xen_hvm_attr { 18015968b5ffSAnup Patel __u16 type; 18025968b5ffSAnup Patel __u16 pad[3]; 18035968b5ffSAnup Patel union { 18045968b5ffSAnup Patel __u8 long_mode; 18055968b5ffSAnup Patel __u8 vector; 1806be986824SAnup Patel __u8 runstate_update_flag; 18075968b5ffSAnup Patel struct { 18085968b5ffSAnup Patel __u64 gfn; 1809be986824SAnup Patel #define KVM_XEN_INVALID_GFN ((__u64)-1) 18105968b5ffSAnup Patel } shared_info; 18118d0facecSAnup Patel struct { 18128d0facecSAnup Patel __u32 send_port; 18138d0facecSAnup Patel __u32 type; /* EVTCHNSTAT_ipi / EVTCHNSTAT_interdomain */ 18148d0facecSAnup Patel __u32 flags; 18158d0facecSAnup Patel #define KVM_XEN_EVTCHN_DEASSIGN (1 << 0) 18168d0facecSAnup Patel #define KVM_XEN_EVTCHN_UPDATE (1 << 1) 18178d0facecSAnup Patel #define KVM_XEN_EVTCHN_RESET (1 << 2) 18188d0facecSAnup Patel /* 18198d0facecSAnup Patel * Events sent by the guest are either looped back to 18208d0facecSAnup Patel * the guest itself (potentially on a different port#) 18218d0facecSAnup Patel * or signalled via an eventfd. 18228d0facecSAnup Patel */ 18238d0facecSAnup Patel union { 18248d0facecSAnup Patel struct { 18258d0facecSAnup Patel __u32 port; 18268d0facecSAnup Patel __u32 vcpu; 18278d0facecSAnup Patel __u32 priority; 18288d0facecSAnup Patel } port; 18298d0facecSAnup Patel struct { 18308d0facecSAnup Patel __u32 port; /* Zero for eventfd */ 18318d0facecSAnup Patel __s32 fd; 18328d0facecSAnup Patel } eventfd; 18338d0facecSAnup Patel __u32 padding[4]; 18348d0facecSAnup Patel } deliver; 18358d0facecSAnup Patel } evtchn; 18368d0facecSAnup Patel __u32 xen_version; 18375968b5ffSAnup Patel __u64 pad[8]; 18385968b5ffSAnup Patel } u; 18395968b5ffSAnup Patel }; 18405968b5ffSAnup Patel 1841be986824SAnup Patel 18425968b5ffSAnup Patel /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_SHARED_INFO */ 18435968b5ffSAnup Patel #define KVM_XEN_ATTR_TYPE_LONG_MODE 0x0 18445968b5ffSAnup Patel #define KVM_XEN_ATTR_TYPE_SHARED_INFO 0x1 18455968b5ffSAnup Patel #define KVM_XEN_ATTR_TYPE_UPCALL_VECTOR 0x2 18468d0facecSAnup Patel /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */ 18478d0facecSAnup Patel #define KVM_XEN_ATTR_TYPE_EVTCHN 0x3 18488d0facecSAnup Patel #define KVM_XEN_ATTR_TYPE_XEN_VERSION 0x4 1849be986824SAnup Patel /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_RUNSTATE_UPDATE_FLAG */ 1850be986824SAnup Patel #define KVM_XEN_ATTR_TYPE_RUNSTATE_UPDATE_FLAG 0x5 18515968b5ffSAnup Patel 18525968b5ffSAnup Patel /* Per-vCPU Xen attributes */ 18535968b5ffSAnup Patel #define KVM_XEN_VCPU_GET_ATTR _IOWR(KVMIO, 0xca, struct kvm_xen_vcpu_attr) 18545968b5ffSAnup Patel #define KVM_XEN_VCPU_SET_ATTR _IOW(KVMIO, 0xcb, struct kvm_xen_vcpu_attr) 18555968b5ffSAnup Patel 18568d0facecSAnup Patel /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */ 18578d0facecSAnup Patel #define KVM_XEN_HVM_EVTCHN_SEND _IOW(KVMIO, 0xd0, struct kvm_irq_routing_xen_evtchn) 18588d0facecSAnup Patel 18595968b5ffSAnup Patel #define KVM_GET_SREGS2 _IOR(KVMIO, 0xcc, struct kvm_sregs2) 18605968b5ffSAnup Patel #define KVM_SET_SREGS2 _IOW(KVMIO, 0xcd, struct kvm_sregs2) 18615968b5ffSAnup Patel 18625968b5ffSAnup Patel struct kvm_xen_vcpu_attr { 18635968b5ffSAnup Patel __u16 type; 18645968b5ffSAnup Patel __u16 pad[3]; 18655968b5ffSAnup Patel union { 18665968b5ffSAnup Patel __u64 gpa; 1867be986824SAnup Patel #define KVM_XEN_INVALID_GPA ((__u64)-1) 18685968b5ffSAnup Patel __u64 pad[8]; 18695968b5ffSAnup Patel struct { 18705968b5ffSAnup Patel __u64 state; 18715968b5ffSAnup Patel __u64 state_entry_time; 18725968b5ffSAnup Patel __u64 time_running; 18735968b5ffSAnup Patel __u64 time_runnable; 18745968b5ffSAnup Patel __u64 time_blocked; 18755968b5ffSAnup Patel __u64 time_offline; 18765968b5ffSAnup Patel } runstate; 18778d0facecSAnup Patel __u32 vcpu_id; 18788d0facecSAnup Patel struct { 18798d0facecSAnup Patel __u32 port; 18808d0facecSAnup Patel __u32 priority; 18818d0facecSAnup Patel __u64 expires_ns; 18828d0facecSAnup Patel } timer; 18838d0facecSAnup Patel __u8 vector; 18845968b5ffSAnup Patel } u; 18855968b5ffSAnup Patel }; 18865968b5ffSAnup Patel 18875968b5ffSAnup Patel /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_SHARED_INFO */ 18885968b5ffSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_VCPU_INFO 0x0 18895968b5ffSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_VCPU_TIME_INFO 0x1 18905968b5ffSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADDR 0x2 18915968b5ffSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_CURRENT 0x3 18925968b5ffSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_DATA 0x4 18935968b5ffSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADJUST 0x5 18948d0facecSAnup Patel /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */ 18958d0facecSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_VCPU_ID 0x6 18968d0facecSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_TIMER 0x7 18978d0facecSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_UPCALL_VECTOR 0x8 18985968b5ffSAnup Patel 18991bbe92f5SDave Martin /* Secure Encrypted Virtualization command */ 19001bbe92f5SDave Martin enum sev_cmd_id { 19011bbe92f5SDave Martin /* Guest initialization commands */ 19021bbe92f5SDave Martin KVM_SEV_INIT = 0, 19031bbe92f5SDave Martin KVM_SEV_ES_INIT, 19041bbe92f5SDave Martin /* Guest launch commands */ 19051bbe92f5SDave Martin KVM_SEV_LAUNCH_START, 19061bbe92f5SDave Martin KVM_SEV_LAUNCH_UPDATE_DATA, 19071bbe92f5SDave Martin KVM_SEV_LAUNCH_UPDATE_VMSA, 19081bbe92f5SDave Martin KVM_SEV_LAUNCH_SECRET, 19091bbe92f5SDave Martin KVM_SEV_LAUNCH_MEASURE, 19101bbe92f5SDave Martin KVM_SEV_LAUNCH_FINISH, 19111bbe92f5SDave Martin /* Guest migration commands (outgoing) */ 19121bbe92f5SDave Martin KVM_SEV_SEND_START, 19131bbe92f5SDave Martin KVM_SEV_SEND_UPDATE_DATA, 19141bbe92f5SDave Martin KVM_SEV_SEND_UPDATE_VMSA, 19151bbe92f5SDave Martin KVM_SEV_SEND_FINISH, 19161bbe92f5SDave Martin /* Guest migration commands (incoming) */ 19171bbe92f5SDave Martin KVM_SEV_RECEIVE_START, 19181bbe92f5SDave Martin KVM_SEV_RECEIVE_UPDATE_DATA, 19191bbe92f5SDave Martin KVM_SEV_RECEIVE_UPDATE_VMSA, 19201bbe92f5SDave Martin KVM_SEV_RECEIVE_FINISH, 19211bbe92f5SDave Martin /* Guest status and debug commands */ 19221bbe92f5SDave Martin KVM_SEV_GUEST_STATUS, 19231bbe92f5SDave Martin KVM_SEV_DBG_DECRYPT, 19241bbe92f5SDave Martin KVM_SEV_DBG_ENCRYPT, 19251bbe92f5SDave Martin /* Guest certificates commands */ 19261bbe92f5SDave Martin KVM_SEV_CERT_EXPORT, 19275968b5ffSAnup Patel /* Attestation report */ 19285968b5ffSAnup Patel KVM_SEV_GET_ATTESTATION_REPORT, 19295968b5ffSAnup Patel /* Guest Migration Extension */ 19305968b5ffSAnup Patel KVM_SEV_SEND_CANCEL, 19311bbe92f5SDave Martin 19321bbe92f5SDave Martin KVM_SEV_NR_MAX, 19331bbe92f5SDave Martin }; 19341bbe92f5SDave Martin 19351bbe92f5SDave Martin struct kvm_sev_cmd { 19361bbe92f5SDave Martin __u32 id; 19371bbe92f5SDave Martin __u64 data; 19381bbe92f5SDave Martin __u32 error; 19391bbe92f5SDave Martin __u32 sev_fd; 19401bbe92f5SDave Martin }; 19411bbe92f5SDave Martin 19421bbe92f5SDave Martin struct kvm_sev_launch_start { 19431bbe92f5SDave Martin __u32 handle; 19441bbe92f5SDave Martin __u32 policy; 19451bbe92f5SDave Martin __u64 dh_uaddr; 19461bbe92f5SDave Martin __u32 dh_len; 19471bbe92f5SDave Martin __u64 session_uaddr; 19481bbe92f5SDave Martin __u32 session_len; 19491bbe92f5SDave Martin }; 19501bbe92f5SDave Martin 19511bbe92f5SDave Martin struct kvm_sev_launch_update_data { 19521bbe92f5SDave Martin __u64 uaddr; 19531bbe92f5SDave Martin __u32 len; 19541bbe92f5SDave Martin }; 19551bbe92f5SDave Martin 19561bbe92f5SDave Martin 19571bbe92f5SDave Martin struct kvm_sev_launch_secret { 19581bbe92f5SDave Martin __u64 hdr_uaddr; 19591bbe92f5SDave Martin __u32 hdr_len; 19601bbe92f5SDave Martin __u64 guest_uaddr; 19611bbe92f5SDave Martin __u32 guest_len; 19621bbe92f5SDave Martin __u64 trans_uaddr; 19631bbe92f5SDave Martin __u32 trans_len; 19641bbe92f5SDave Martin }; 19651bbe92f5SDave Martin 19661bbe92f5SDave Martin struct kvm_sev_launch_measure { 19671bbe92f5SDave Martin __u64 uaddr; 19681bbe92f5SDave Martin __u32 len; 19691bbe92f5SDave Martin }; 19701bbe92f5SDave Martin 19711bbe92f5SDave Martin struct kvm_sev_guest_status { 19721bbe92f5SDave Martin __u32 handle; 19731bbe92f5SDave Martin __u32 policy; 19741bbe92f5SDave Martin __u32 state; 19751bbe92f5SDave Martin }; 19761bbe92f5SDave Martin 19771bbe92f5SDave Martin struct kvm_sev_dbg { 19781bbe92f5SDave Martin __u64 src_uaddr; 19791bbe92f5SDave Martin __u64 dst_uaddr; 19801bbe92f5SDave Martin __u32 len; 19811bbe92f5SDave Martin }; 1982304dcb64SAndre Przywara 19835968b5ffSAnup Patel struct kvm_sev_attestation_report { 19845968b5ffSAnup Patel __u8 mnonce[16]; 19855968b5ffSAnup Patel __u64 uaddr; 19865968b5ffSAnup Patel __u32 len; 19875968b5ffSAnup Patel }; 19885968b5ffSAnup Patel 19895968b5ffSAnup Patel struct kvm_sev_send_start { 19905968b5ffSAnup Patel __u32 policy; 19915968b5ffSAnup Patel __u64 pdh_cert_uaddr; 19925968b5ffSAnup Patel __u32 pdh_cert_len; 19935968b5ffSAnup Patel __u64 plat_certs_uaddr; 19945968b5ffSAnup Patel __u32 plat_certs_len; 19955968b5ffSAnup Patel __u64 amd_certs_uaddr; 19965968b5ffSAnup Patel __u32 amd_certs_len; 19975968b5ffSAnup Patel __u64 session_uaddr; 19985968b5ffSAnup Patel __u32 session_len; 19995968b5ffSAnup Patel }; 20005968b5ffSAnup Patel 20015968b5ffSAnup Patel struct kvm_sev_send_update_data { 20025968b5ffSAnup Patel __u64 hdr_uaddr; 20035968b5ffSAnup Patel __u32 hdr_len; 20045968b5ffSAnup Patel __u64 guest_uaddr; 20055968b5ffSAnup Patel __u32 guest_len; 20065968b5ffSAnup Patel __u64 trans_uaddr; 20075968b5ffSAnup Patel __u32 trans_len; 20085968b5ffSAnup Patel }; 20095968b5ffSAnup Patel 20105968b5ffSAnup Patel struct kvm_sev_receive_start { 20115968b5ffSAnup Patel __u32 handle; 20125968b5ffSAnup Patel __u32 policy; 20135968b5ffSAnup Patel __u64 pdh_uaddr; 20145968b5ffSAnup Patel __u32 pdh_len; 20155968b5ffSAnup Patel __u64 session_uaddr; 20165968b5ffSAnup Patel __u32 session_len; 20175968b5ffSAnup Patel }; 20185968b5ffSAnup Patel 20195968b5ffSAnup Patel struct kvm_sev_receive_update_data { 20205968b5ffSAnup Patel __u64 hdr_uaddr; 20215968b5ffSAnup Patel __u32 hdr_len; 20225968b5ffSAnup Patel __u64 guest_uaddr; 20235968b5ffSAnup Patel __u32 guest_len; 20245968b5ffSAnup Patel __u64 trans_uaddr; 20255968b5ffSAnup Patel __u32 trans_len; 20265968b5ffSAnup Patel }; 20275968b5ffSAnup Patel 2028304dcb64SAndre Przywara #define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0) 2029304dcb64SAndre Przywara #define KVM_DEV_ASSIGN_PCI_2_3 (1 << 1) 2030304dcb64SAndre Przywara #define KVM_DEV_ASSIGN_MASK_INTX (1 << 2) 2031304dcb64SAndre Przywara 2032304dcb64SAndre Przywara struct kvm_assigned_pci_dev { 2033304dcb64SAndre Przywara __u32 assigned_dev_id; 2034304dcb64SAndre Przywara __u32 busnr; 2035304dcb64SAndre Przywara __u32 devfn; 2036304dcb64SAndre Przywara __u32 flags; 2037304dcb64SAndre Przywara __u32 segnr; 2038304dcb64SAndre Przywara union { 2039304dcb64SAndre Przywara __u32 reserved[11]; 2040304dcb64SAndre Przywara }; 2041304dcb64SAndre Przywara }; 2042304dcb64SAndre Przywara 2043304dcb64SAndre Przywara #define KVM_DEV_IRQ_HOST_INTX (1 << 0) 2044304dcb64SAndre Przywara #define KVM_DEV_IRQ_HOST_MSI (1 << 1) 2045304dcb64SAndre Przywara #define KVM_DEV_IRQ_HOST_MSIX (1 << 2) 2046304dcb64SAndre Przywara 2047304dcb64SAndre Przywara #define KVM_DEV_IRQ_GUEST_INTX (1 << 8) 2048304dcb64SAndre Przywara #define KVM_DEV_IRQ_GUEST_MSI (1 << 9) 2049304dcb64SAndre Przywara #define KVM_DEV_IRQ_GUEST_MSIX (1 << 10) 2050304dcb64SAndre Przywara 2051304dcb64SAndre Przywara #define KVM_DEV_IRQ_HOST_MASK 0x00ff 2052304dcb64SAndre Przywara #define KVM_DEV_IRQ_GUEST_MASK 0xff00 2053304dcb64SAndre Przywara 2054304dcb64SAndre Przywara struct kvm_assigned_irq { 2055304dcb64SAndre Przywara __u32 assigned_dev_id; 2056304dcb64SAndre Przywara __u32 host_irq; /* ignored (legacy field) */ 2057304dcb64SAndre Przywara __u32 guest_irq; 2058304dcb64SAndre Przywara __u32 flags; 2059304dcb64SAndre Przywara union { 2060304dcb64SAndre Przywara __u32 reserved[12]; 2061304dcb64SAndre Przywara }; 2062304dcb64SAndre Przywara }; 2063304dcb64SAndre Przywara 2064304dcb64SAndre Przywara struct kvm_assigned_msix_nr { 2065304dcb64SAndre Przywara __u32 assigned_dev_id; 2066304dcb64SAndre Przywara __u16 entry_nr; 2067304dcb64SAndre Przywara __u16 padding; 2068304dcb64SAndre Przywara }; 2069304dcb64SAndre Przywara 2070304dcb64SAndre Przywara #define KVM_MAX_MSIX_PER_DEV 256 2071304dcb64SAndre Przywara struct kvm_assigned_msix_entry { 2072304dcb64SAndre Przywara __u32 assigned_dev_id; 2073304dcb64SAndre Przywara __u32 gsi; 2074304dcb64SAndre Przywara __u16 entry; /* The index of entry in the MSI-X table */ 2075304dcb64SAndre Przywara __u16 padding[3]; 2076304dcb64SAndre Przywara }; 2077304dcb64SAndre Przywara 2078764dfba1SAndre Przywara #define KVM_X2APIC_API_USE_32BIT_IDS (1ULL << 0) 2079764dfba1SAndre Przywara #define KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK (1ULL << 1) 2080764dfba1SAndre Przywara 20811bbe92f5SDave Martin /* Available with KVM_CAP_ARM_USER_IRQ */ 20821bbe92f5SDave Martin 20831bbe92f5SDave Martin /* Bits for run->s.regs.device_irq_level */ 20841bbe92f5SDave Martin #define KVM_ARM_DEV_EL1_VTIMER (1 << 0) 20851bbe92f5SDave Martin #define KVM_ARM_DEV_EL1_PTIMER (1 << 1) 20861bbe92f5SDave Martin #define KVM_ARM_DEV_PMU (1 << 2) 20871bbe92f5SDave Martin 20881bbe92f5SDave Martin struct kvm_hyperv_eventfd { 20891bbe92f5SDave Martin __u32 conn_id; 20901bbe92f5SDave Martin __s32 fd; 20911bbe92f5SDave Martin __u32 flags; 20921bbe92f5SDave Martin __u32 padding[3]; 20931bbe92f5SDave Martin }; 20941bbe92f5SDave Martin 20951bbe92f5SDave Martin #define KVM_HYPERV_CONN_ID_MASK 0x00ffffff 20961bbe92f5SDave Martin #define KVM_HYPERV_EVENTFD_DEASSIGN (1 << 0) 20971bbe92f5SDave Martin 20985968b5ffSAnup Patel #define KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE (1 << 0) 20995968b5ffSAnup Patel #define KVM_DIRTY_LOG_INITIALLY_SET (1 << 1) 21005968b5ffSAnup Patel 21015968b5ffSAnup Patel /* 21025968b5ffSAnup Patel * Arch needs to define the macro after implementing the dirty ring 21035968b5ffSAnup Patel * feature. KVM_DIRTY_LOG_PAGE_OFFSET should be defined as the 21045968b5ffSAnup Patel * starting page offset of the dirty ring structures. 21055968b5ffSAnup Patel */ 21065968b5ffSAnup Patel #ifndef KVM_DIRTY_LOG_PAGE_OFFSET 21075968b5ffSAnup Patel #define KVM_DIRTY_LOG_PAGE_OFFSET 0 21085968b5ffSAnup Patel #endif 21095968b5ffSAnup Patel 21105968b5ffSAnup Patel /* 21115968b5ffSAnup Patel * KVM dirty GFN flags, defined as: 21125968b5ffSAnup Patel * 21135968b5ffSAnup Patel * |---------------+---------------+--------------| 21145968b5ffSAnup Patel * | bit 1 (reset) | bit 0 (dirty) | Status | 21155968b5ffSAnup Patel * |---------------+---------------+--------------| 21165968b5ffSAnup Patel * | 0 | 0 | Invalid GFN | 21175968b5ffSAnup Patel * | 0 | 1 | Dirty GFN | 21185968b5ffSAnup Patel * | 1 | X | GFN to reset | 21195968b5ffSAnup Patel * |---------------+---------------+--------------| 21205968b5ffSAnup Patel * 21215968b5ffSAnup Patel * Lifecycle of a dirty GFN goes like: 21225968b5ffSAnup Patel * 21235968b5ffSAnup Patel * dirtied harvested reset 21245968b5ffSAnup Patel * 00 -----------> 01 -------------> 1X -------+ 21255968b5ffSAnup Patel * ^ | 21265968b5ffSAnup Patel * | | 21275968b5ffSAnup Patel * +------------------------------------------+ 21285968b5ffSAnup Patel * 21295968b5ffSAnup Patel * The userspace program is only responsible for the 01->1X state 21305968b5ffSAnup Patel * conversion after harvesting an entry. Also, it must not skip any 21315968b5ffSAnup Patel * dirty bits, so that dirty bits are always harvested in sequence. 21325968b5ffSAnup Patel */ 21335968b5ffSAnup Patel #define KVM_DIRTY_GFN_F_DIRTY _BITUL(0) 21345968b5ffSAnup Patel #define KVM_DIRTY_GFN_F_RESET _BITUL(1) 21355968b5ffSAnup Patel #define KVM_DIRTY_GFN_F_MASK 0x3 21365968b5ffSAnup Patel 21375968b5ffSAnup Patel /* 21385968b5ffSAnup Patel * KVM dirty rings should be mapped at KVM_DIRTY_LOG_PAGE_OFFSET of 21395968b5ffSAnup Patel * per-vcpu mmaped regions as an array of struct kvm_dirty_gfn. The 21405968b5ffSAnup Patel * size of the gfn buffer is decided by the first argument when 21415968b5ffSAnup Patel * enabling KVM_CAP_DIRTY_LOG_RING. 21425968b5ffSAnup Patel */ 21435968b5ffSAnup Patel struct kvm_dirty_gfn { 21445968b5ffSAnup Patel __u32 flags; 21455968b5ffSAnup Patel __u32 slot; 21465968b5ffSAnup Patel __u64 offset; 21475968b5ffSAnup Patel }; 21485968b5ffSAnup Patel 21495968b5ffSAnup Patel #define KVM_BUS_LOCK_DETECTION_OFF (1 << 0) 21505968b5ffSAnup Patel #define KVM_BUS_LOCK_DETECTION_EXIT (1 << 1) 21515968b5ffSAnup Patel 2152083a976eSAlexandru Elisei #define KVM_PMU_CAP_DISABLE (1 << 0) 2153083a976eSAlexandru Elisei 21545968b5ffSAnup Patel /** 21555968b5ffSAnup Patel * struct kvm_stats_header - Header of per vm/vcpu binary statistics data. 21565968b5ffSAnup Patel * @flags: Some extra information for header, always 0 for now. 21575968b5ffSAnup Patel * @name_size: The size in bytes of the memory which contains statistics 21585968b5ffSAnup Patel * name string including trailing '\0'. The memory is allocated 21595968b5ffSAnup Patel * at the send of statistics descriptor. 21605968b5ffSAnup Patel * @num_desc: The number of statistics the vm or vcpu has. 21615968b5ffSAnup Patel * @id_offset: The offset of the vm/vcpu stats' id string in the file pointed 21625968b5ffSAnup Patel * by vm/vcpu stats fd. 21635968b5ffSAnup Patel * @desc_offset: The offset of the vm/vcpu stats' descriptor block in the file 21645968b5ffSAnup Patel * pointd by vm/vcpu stats fd. 21655968b5ffSAnup Patel * @data_offset: The offset of the vm/vcpu stats' data block in the file 21665968b5ffSAnup Patel * pointed by vm/vcpu stats fd. 21675968b5ffSAnup Patel * 21685968b5ffSAnup Patel * This is the header userspace needs to read from stats fd before any other 21695968b5ffSAnup Patel * readings. It is used by userspace to discover all the information about the 21705968b5ffSAnup Patel * vm/vcpu's binary statistics. 21715968b5ffSAnup Patel * Userspace reads this header from the start of the vm/vcpu's stats fd. 21725968b5ffSAnup Patel */ 21735968b5ffSAnup Patel struct kvm_stats_header { 21745968b5ffSAnup Patel __u32 flags; 21755968b5ffSAnup Patel __u32 name_size; 21765968b5ffSAnup Patel __u32 num_desc; 21775968b5ffSAnup Patel __u32 id_offset; 21785968b5ffSAnup Patel __u32 desc_offset; 21795968b5ffSAnup Patel __u32 data_offset; 21805968b5ffSAnup Patel }; 21815968b5ffSAnup Patel 21825968b5ffSAnup Patel #define KVM_STATS_TYPE_SHIFT 0 21835968b5ffSAnup Patel #define KVM_STATS_TYPE_MASK (0xF << KVM_STATS_TYPE_SHIFT) 21845968b5ffSAnup Patel #define KVM_STATS_TYPE_CUMULATIVE (0x0 << KVM_STATS_TYPE_SHIFT) 21855968b5ffSAnup Patel #define KVM_STATS_TYPE_INSTANT (0x1 << KVM_STATS_TYPE_SHIFT) 21865968b5ffSAnup Patel #define KVM_STATS_TYPE_PEAK (0x2 << KVM_STATS_TYPE_SHIFT) 21875968b5ffSAnup Patel #define KVM_STATS_TYPE_LINEAR_HIST (0x3 << KVM_STATS_TYPE_SHIFT) 21885968b5ffSAnup Patel #define KVM_STATS_TYPE_LOG_HIST (0x4 << KVM_STATS_TYPE_SHIFT) 21895968b5ffSAnup Patel #define KVM_STATS_TYPE_MAX KVM_STATS_TYPE_LOG_HIST 21905968b5ffSAnup Patel 21915968b5ffSAnup Patel #define KVM_STATS_UNIT_SHIFT 4 21925968b5ffSAnup Patel #define KVM_STATS_UNIT_MASK (0xF << KVM_STATS_UNIT_SHIFT) 21935968b5ffSAnup Patel #define KVM_STATS_UNIT_NONE (0x0 << KVM_STATS_UNIT_SHIFT) 21945968b5ffSAnup Patel #define KVM_STATS_UNIT_BYTES (0x1 << KVM_STATS_UNIT_SHIFT) 21955968b5ffSAnup Patel #define KVM_STATS_UNIT_SECONDS (0x2 << KVM_STATS_UNIT_SHIFT) 21965968b5ffSAnup Patel #define KVM_STATS_UNIT_CYCLES (0x3 << KVM_STATS_UNIT_SHIFT) 21978d0facecSAnup Patel #define KVM_STATS_UNIT_BOOLEAN (0x4 << KVM_STATS_UNIT_SHIFT) 21988d0facecSAnup Patel #define KVM_STATS_UNIT_MAX KVM_STATS_UNIT_BOOLEAN 21995968b5ffSAnup Patel 22005968b5ffSAnup Patel #define KVM_STATS_BASE_SHIFT 8 22015968b5ffSAnup Patel #define KVM_STATS_BASE_MASK (0xF << KVM_STATS_BASE_SHIFT) 22025968b5ffSAnup Patel #define KVM_STATS_BASE_POW10 (0x0 << KVM_STATS_BASE_SHIFT) 22035968b5ffSAnup Patel #define KVM_STATS_BASE_POW2 (0x1 << KVM_STATS_BASE_SHIFT) 22045968b5ffSAnup Patel #define KVM_STATS_BASE_MAX KVM_STATS_BASE_POW2 22055968b5ffSAnup Patel 22065968b5ffSAnup Patel /** 22075968b5ffSAnup Patel * struct kvm_stats_desc - Descriptor of a KVM statistics. 22085968b5ffSAnup Patel * @flags: Annotations of the stats, like type, unit, etc. 22095968b5ffSAnup Patel * @exponent: Used together with @flags to determine the unit. 22105968b5ffSAnup Patel * @size: The number of data items for this stats. 22115968b5ffSAnup Patel * Every data item is of type __u64. 22125968b5ffSAnup Patel * @offset: The offset of the stats to the start of stat structure in 22135968b5ffSAnup Patel * structure kvm or kvm_vcpu. 22145968b5ffSAnup Patel * @bucket_size: A parameter value used for histogram stats. It is only used 22155968b5ffSAnup Patel * for linear histogram stats, specifying the size of the bucket; 22165968b5ffSAnup Patel * @name: The name string for the stats. Its size is indicated by the 22175968b5ffSAnup Patel * &kvm_stats_header->name_size. 22185968b5ffSAnup Patel */ 22195968b5ffSAnup Patel struct kvm_stats_desc { 22205968b5ffSAnup Patel __u32 flags; 22215968b5ffSAnup Patel __s16 exponent; 22225968b5ffSAnup Patel __u16 size; 22235968b5ffSAnup Patel __u32 offset; 22245968b5ffSAnup Patel __u32 bucket_size; 22255968b5ffSAnup Patel char name[]; 22265968b5ffSAnup Patel }; 22275968b5ffSAnup Patel 22285968b5ffSAnup Patel #define KVM_GET_STATS_FD _IO(KVMIO, 0xce) 22295968b5ffSAnup Patel 2230af1b793cSAlexandru Elisei /* Available with KVM_CAP_XSAVE2 */ 2231af1b793cSAlexandru Elisei #define KVM_GET_XSAVE2 _IOR(KVMIO, 0xcf, struct kvm_xsave) 2232af1b793cSAlexandru Elisei 22338d0facecSAnup Patel /* Available with KVM_CAP_S390_PROTECTED_DUMP */ 22348d0facecSAnup Patel #define KVM_S390_PV_CPU_COMMAND _IOWR(KVMIO, 0xd0, struct kvm_pv_cmd) 22358d0facecSAnup Patel 22368d0facecSAnup Patel /* Available with KVM_CAP_X86_NOTIFY_VMEXIT */ 22378d0facecSAnup Patel #define KVM_X86_NOTIFY_VMEXIT_ENABLED (1ULL << 0) 22388d0facecSAnup Patel #define KVM_X86_NOTIFY_VMEXIT_USER (1ULL << 1) 22398d0facecSAnup Patel 22408d0facecSAnup Patel /* Available with KVM_CAP_S390_ZPCI_OP */ 22418d0facecSAnup Patel #define KVM_S390_ZPCI_OP _IOW(KVMIO, 0xd1, struct kvm_s390_zpci_op) 22428d0facecSAnup Patel 22438d0facecSAnup Patel struct kvm_s390_zpci_op { 22448d0facecSAnup Patel /* in */ 22458d0facecSAnup Patel __u32 fh; /* target device */ 22468d0facecSAnup Patel __u8 op; /* operation to perform */ 22478d0facecSAnup Patel __u8 pad[3]; 22488d0facecSAnup Patel union { 22498d0facecSAnup Patel /* for KVM_S390_ZPCIOP_REG_AEN */ 22508d0facecSAnup Patel struct { 22518d0facecSAnup Patel __u64 ibv; /* Guest addr of interrupt bit vector */ 22528d0facecSAnup Patel __u64 sb; /* Guest addr of summary bit */ 22538d0facecSAnup Patel __u32 flags; 22548d0facecSAnup Patel __u32 noi; /* Number of interrupts */ 22558d0facecSAnup Patel __u8 isc; /* Guest interrupt subclass */ 22568d0facecSAnup Patel __u8 sbo; /* Offset of guest summary bit vector */ 22578d0facecSAnup Patel __u16 pad; 22588d0facecSAnup Patel } reg_aen; 22598d0facecSAnup Patel __u64 reserved[8]; 22608d0facecSAnup Patel } u; 22618d0facecSAnup Patel }; 22628d0facecSAnup Patel 22638d0facecSAnup Patel /* types for kvm_s390_zpci_op->op */ 22648d0facecSAnup Patel #define KVM_S390_ZPCIOP_REG_AEN 0 22658d0facecSAnup Patel #define KVM_S390_ZPCIOP_DEREG_AEN 1 22668d0facecSAnup Patel 22678d0facecSAnup Patel /* flags for kvm_s390_zpci_op->u.reg_aen.flags */ 22688d0facecSAnup Patel #define KVM_S390_ZPCIOP_REGAEN_HOST (1 << 0) 22698d0facecSAnup Patel 2270304dcb64SAndre Przywara #endif /* __LINUX_KVM_H */ 2271