11bbe92f5SDave Martin /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2304dcb64SAndre Przywara #ifndef __LINUX_KVM_H 3304dcb64SAndre Przywara #define __LINUX_KVM_H 4304dcb64SAndre Przywara 5304dcb64SAndre Przywara /* 6304dcb64SAndre Przywara * Userspace interface for /dev/kvm - kernel based virtual machine 7304dcb64SAndre Przywara * 8304dcb64SAndre Przywara * Note: you must update KVM_API_VERSION if you change this interface. 9304dcb64SAndre Przywara */ 10304dcb64SAndre Przywara 115968b5ffSAnup Patel #include <linux/const.h> 12304dcb64SAndre Przywara #include <linux/types.h> 13304dcb64SAndre Przywara #include <linux/compiler.h> 14304dcb64SAndre Przywara #include <linux/ioctl.h> 15304dcb64SAndre Przywara #include <asm/kvm.h> 16304dcb64SAndre Przywara 17304dcb64SAndre Przywara #define KVM_API_VERSION 12 18304dcb64SAndre Przywara 19304dcb64SAndre Przywara /* *** Deprecated interfaces *** */ 20304dcb64SAndre Przywara 21304dcb64SAndre Przywara #define KVM_TRC_SHIFT 16 22304dcb64SAndre Przywara 23304dcb64SAndre Przywara #define KVM_TRC_ENTRYEXIT (1 << KVM_TRC_SHIFT) 24304dcb64SAndre Przywara #define KVM_TRC_HANDLER (1 << (KVM_TRC_SHIFT + 1)) 25304dcb64SAndre Przywara 26304dcb64SAndre Przywara #define KVM_TRC_VMENTRY (KVM_TRC_ENTRYEXIT + 0x01) 27304dcb64SAndre Przywara #define KVM_TRC_VMEXIT (KVM_TRC_ENTRYEXIT + 0x02) 28304dcb64SAndre Przywara #define KVM_TRC_PAGE_FAULT (KVM_TRC_HANDLER + 0x01) 29304dcb64SAndre Przywara 30304dcb64SAndre Przywara #define KVM_TRC_HEAD_SIZE 12 31304dcb64SAndre Przywara #define KVM_TRC_CYCLE_SIZE 8 32304dcb64SAndre Przywara #define KVM_TRC_EXTRA_MAX 7 33304dcb64SAndre Przywara 34304dcb64SAndre Przywara #define KVM_TRC_INJ_VIRQ (KVM_TRC_HANDLER + 0x02) 35304dcb64SAndre Przywara #define KVM_TRC_REDELIVER_EVT (KVM_TRC_HANDLER + 0x03) 36304dcb64SAndre Przywara #define KVM_TRC_PEND_INTR (KVM_TRC_HANDLER + 0x04) 37304dcb64SAndre Przywara #define KVM_TRC_IO_READ (KVM_TRC_HANDLER + 0x05) 38304dcb64SAndre Przywara #define KVM_TRC_IO_WRITE (KVM_TRC_HANDLER + 0x06) 39304dcb64SAndre Przywara #define KVM_TRC_CR_READ (KVM_TRC_HANDLER + 0x07) 40304dcb64SAndre Przywara #define KVM_TRC_CR_WRITE (KVM_TRC_HANDLER + 0x08) 41304dcb64SAndre Przywara #define KVM_TRC_DR_READ (KVM_TRC_HANDLER + 0x09) 42304dcb64SAndre Przywara #define KVM_TRC_DR_WRITE (KVM_TRC_HANDLER + 0x0A) 43304dcb64SAndre Przywara #define KVM_TRC_MSR_READ (KVM_TRC_HANDLER + 0x0B) 44304dcb64SAndre Przywara #define KVM_TRC_MSR_WRITE (KVM_TRC_HANDLER + 0x0C) 45304dcb64SAndre Przywara #define KVM_TRC_CPUID (KVM_TRC_HANDLER + 0x0D) 46304dcb64SAndre Przywara #define KVM_TRC_INTR (KVM_TRC_HANDLER + 0x0E) 47304dcb64SAndre Przywara #define KVM_TRC_NMI (KVM_TRC_HANDLER + 0x0F) 48304dcb64SAndre Przywara #define KVM_TRC_VMMCALL (KVM_TRC_HANDLER + 0x10) 49304dcb64SAndre Przywara #define KVM_TRC_HLT (KVM_TRC_HANDLER + 0x11) 50304dcb64SAndre Przywara #define KVM_TRC_CLTS (KVM_TRC_HANDLER + 0x12) 51304dcb64SAndre Przywara #define KVM_TRC_LMSW (KVM_TRC_HANDLER + 0x13) 52304dcb64SAndre Przywara #define KVM_TRC_APIC_ACCESS (KVM_TRC_HANDLER + 0x14) 53304dcb64SAndre Przywara #define KVM_TRC_TDP_FAULT (KVM_TRC_HANDLER + 0x15) 54304dcb64SAndre Przywara #define KVM_TRC_GTLB_WRITE (KVM_TRC_HANDLER + 0x16) 55304dcb64SAndre Przywara #define KVM_TRC_STLB_WRITE (KVM_TRC_HANDLER + 0x17) 56304dcb64SAndre Przywara #define KVM_TRC_STLB_INVAL (KVM_TRC_HANDLER + 0x18) 57304dcb64SAndre Przywara #define KVM_TRC_PPC_INSTR (KVM_TRC_HANDLER + 0x19) 58304dcb64SAndre Przywara 59304dcb64SAndre Przywara struct kvm_user_trace_setup { 60304dcb64SAndre Przywara __u32 buf_size; 61304dcb64SAndre Przywara __u32 buf_nr; 62304dcb64SAndre Przywara }; 63304dcb64SAndre Przywara 64304dcb64SAndre Przywara #define __KVM_DEPRECATED_MAIN_W_0x06 \ 65304dcb64SAndre Przywara _IOW(KVMIO, 0x06, struct kvm_user_trace_setup) 66304dcb64SAndre Przywara #define __KVM_DEPRECATED_MAIN_0x07 _IO(KVMIO, 0x07) 67304dcb64SAndre Przywara #define __KVM_DEPRECATED_MAIN_0x08 _IO(KVMIO, 0x08) 68304dcb64SAndre Przywara 69304dcb64SAndre Przywara #define __KVM_DEPRECATED_VM_R_0x70 _IOR(KVMIO, 0x70, struct kvm_assigned_irq) 70304dcb64SAndre Przywara 71304dcb64SAndre Przywara struct kvm_breakpoint { 72304dcb64SAndre Przywara __u32 enabled; 73304dcb64SAndre Przywara __u32 padding; 74304dcb64SAndre Przywara __u64 address; 75304dcb64SAndre Przywara }; 76304dcb64SAndre Przywara 77304dcb64SAndre Przywara struct kvm_debug_guest { 78304dcb64SAndre Przywara __u32 enabled; 79304dcb64SAndre Przywara __u32 pad; 80304dcb64SAndre Przywara struct kvm_breakpoint breakpoints[4]; 81304dcb64SAndre Przywara __u32 singlestep; 82304dcb64SAndre Przywara }; 83304dcb64SAndre Przywara 84304dcb64SAndre Przywara #define __KVM_DEPRECATED_VCPU_W_0x87 _IOW(KVMIO, 0x87, struct kvm_debug_guest) 85304dcb64SAndre Przywara 86304dcb64SAndre Przywara /* *** End of deprecated interfaces *** */ 87304dcb64SAndre Przywara 88304dcb64SAndre Przywara 89304dcb64SAndre Przywara /* for KVM_SET_USER_MEMORY_REGION */ 90304dcb64SAndre Przywara struct kvm_userspace_memory_region { 91304dcb64SAndre Przywara __u32 slot; 92304dcb64SAndre Przywara __u32 flags; 93304dcb64SAndre Przywara __u64 guest_phys_addr; 94304dcb64SAndre Przywara __u64 memory_size; /* bytes */ 95304dcb64SAndre Przywara __u64 userspace_addr; /* start of the userspace allocated memory */ 96304dcb64SAndre Przywara }; 97304dcb64SAndre Przywara 98304dcb64SAndre Przywara /* 99be986824SAnup Patel * The bit 0 ~ bit 15 of kvm_userspace_memory_region::flags are visible for 100be986824SAnup Patel * userspace, other bits are reserved for kvm internal use which are defined 101be986824SAnup Patel * in include/linux/kvm_host.h. 102304dcb64SAndre Przywara */ 103304dcb64SAndre Przywara #define KVM_MEM_LOG_DIRTY_PAGES (1UL << 0) 104304dcb64SAndre Przywara #define KVM_MEM_READONLY (1UL << 1) 105304dcb64SAndre Przywara 106304dcb64SAndre Przywara /* for KVM_IRQ_LINE */ 107304dcb64SAndre Przywara struct kvm_irq_level { 108304dcb64SAndre Przywara /* 109304dcb64SAndre Przywara * ACPI gsi notion of irq. 110304dcb64SAndre Przywara * For IA-64 (APIC model) IOAPIC0: irq 0-23; IOAPIC1: irq 24-47.. 111304dcb64SAndre Przywara * For X86 (standard AT mode) PIC0/1: irq 0-15. IOAPIC0: 0-23.. 1125968b5ffSAnup Patel * For ARM: See Documentation/virt/kvm/api.rst 113304dcb64SAndre Przywara */ 114304dcb64SAndre Przywara union { 115304dcb64SAndre Przywara __u32 irq; 116304dcb64SAndre Przywara __s32 status; 117304dcb64SAndre Przywara }; 118304dcb64SAndre Przywara __u32 level; 119304dcb64SAndre Przywara }; 120304dcb64SAndre Przywara 121304dcb64SAndre Przywara 122304dcb64SAndre Przywara struct kvm_irqchip { 123304dcb64SAndre Przywara __u32 chip_id; 124304dcb64SAndre Przywara __u32 pad; 125304dcb64SAndre Przywara union { 126304dcb64SAndre Przywara char dummy[512]; /* reserving space */ 127304dcb64SAndre Przywara #ifdef __KVM_HAVE_PIT 128304dcb64SAndre Przywara struct kvm_pic_state pic; 129304dcb64SAndre Przywara #endif 130304dcb64SAndre Przywara #ifdef __KVM_HAVE_IOAPIC 131304dcb64SAndre Przywara struct kvm_ioapic_state ioapic; 132304dcb64SAndre Przywara #endif 133304dcb64SAndre Przywara } chip; 134304dcb64SAndre Przywara }; 135304dcb64SAndre Przywara 136304dcb64SAndre Przywara /* for KVM_CREATE_PIT2 */ 137304dcb64SAndre Przywara struct kvm_pit_config { 138304dcb64SAndre Przywara __u32 flags; 139304dcb64SAndre Przywara __u32 pad[15]; 140304dcb64SAndre Przywara }; 141304dcb64SAndre Przywara 142304dcb64SAndre Przywara #define KVM_PIT_SPEAKER_DUMMY 1 143304dcb64SAndre Przywara 144304dcb64SAndre Przywara struct kvm_s390_skeys { 145304dcb64SAndre Przywara __u64 start_gfn; 146304dcb64SAndre Przywara __u64 count; 147304dcb64SAndre Przywara __u64 skeydata_addr; 148304dcb64SAndre Przywara __u32 flags; 149304dcb64SAndre Przywara __u32 reserved[9]; 150304dcb64SAndre Przywara }; 151b3f606e1SMarc Zyngier 1521bbe92f5SDave Martin #define KVM_S390_CMMA_PEEK (1 << 0) 1531bbe92f5SDave Martin 1541bbe92f5SDave Martin /** 1551bbe92f5SDave Martin * kvm_s390_cmma_log - Used for CMMA migration. 1561bbe92f5SDave Martin * 1571bbe92f5SDave Martin * Used both for input and output. 1581bbe92f5SDave Martin * 1591bbe92f5SDave Martin * @start_gfn: Guest page number to start from. 1601bbe92f5SDave Martin * @count: Size of the result buffer. 1611bbe92f5SDave Martin * @flags: Control operation mode via KVM_S390_CMMA_* flags 1621bbe92f5SDave Martin * @remaining: Used with KVM_S390_GET_CMMA_BITS. Indicates how many dirty 1631bbe92f5SDave Martin * pages are still remaining. 1641bbe92f5SDave Martin * @mask: Used with KVM_S390_SET_CMMA_BITS. Bitmap of bits to actually set 1651bbe92f5SDave Martin * in the PGSTE. 1661bbe92f5SDave Martin * @values: Pointer to the values buffer. 1671bbe92f5SDave Martin * 1681bbe92f5SDave Martin * Used in KVM_S390_{G,S}ET_CMMA_BITS ioctls. 1691bbe92f5SDave Martin */ 1701bbe92f5SDave Martin struct kvm_s390_cmma_log { 1711bbe92f5SDave Martin __u64 start_gfn; 1721bbe92f5SDave Martin __u32 count; 1731bbe92f5SDave Martin __u32 flags; 1741bbe92f5SDave Martin union { 1751bbe92f5SDave Martin __u64 remaining; 1761bbe92f5SDave Martin __u64 mask; 1771bbe92f5SDave Martin }; 1781bbe92f5SDave Martin __u64 values; 1791bbe92f5SDave Martin }; 1801bbe92f5SDave Martin 181b3f606e1SMarc Zyngier struct kvm_hyperv_exit { 182b3f606e1SMarc Zyngier #define KVM_EXIT_HYPERV_SYNIC 1 183b37ed70eSAndre Przywara #define KVM_EXIT_HYPERV_HCALL 2 1845968b5ffSAnup Patel #define KVM_EXIT_HYPERV_SYNDBG 3 185b3f606e1SMarc Zyngier __u32 type; 1865968b5ffSAnup Patel __u32 pad1; 187b3f606e1SMarc Zyngier union { 188b3f606e1SMarc Zyngier struct { 189b3f606e1SMarc Zyngier __u32 msr; 1905968b5ffSAnup Patel __u32 pad2; 191b3f606e1SMarc Zyngier __u64 control; 192b3f606e1SMarc Zyngier __u64 evt_page; 193b3f606e1SMarc Zyngier __u64 msg_page; 194b3f606e1SMarc Zyngier } synic; 195b37ed70eSAndre Przywara struct { 196b37ed70eSAndre Przywara __u64 input; 197b37ed70eSAndre Przywara __u64 result; 198b37ed70eSAndre Przywara __u64 params[2]; 199b37ed70eSAndre Przywara } hcall; 2005968b5ffSAnup Patel struct { 2015968b5ffSAnup Patel __u32 msr; 2025968b5ffSAnup Patel __u32 pad2; 2035968b5ffSAnup Patel __u64 control; 2045968b5ffSAnup Patel __u64 status; 2055968b5ffSAnup Patel __u64 send_page; 2065968b5ffSAnup Patel __u64 recv_page; 2075968b5ffSAnup Patel __u64 pending_page; 2085968b5ffSAnup Patel } syndbg; 2095968b5ffSAnup Patel } u; 2105968b5ffSAnup Patel }; 2115968b5ffSAnup Patel 2125968b5ffSAnup Patel struct kvm_xen_exit { 2135968b5ffSAnup Patel #define KVM_EXIT_XEN_HCALL 1 2145968b5ffSAnup Patel __u32 type; 2155968b5ffSAnup Patel union { 2165968b5ffSAnup Patel struct { 2175968b5ffSAnup Patel __u32 longmode; 2185968b5ffSAnup Patel __u32 cpl; 2195968b5ffSAnup Patel __u64 input; 2205968b5ffSAnup Patel __u64 result; 2215968b5ffSAnup Patel __u64 params[6]; 2225968b5ffSAnup Patel } hcall; 223b3f606e1SMarc Zyngier } u; 224b3f606e1SMarc Zyngier }; 225b3f606e1SMarc Zyngier 226304dcb64SAndre Przywara #define KVM_S390_GET_SKEYS_NONE 1 227304dcb64SAndre Przywara #define KVM_S390_SKEYS_MAX 1048576 228304dcb64SAndre Przywara 229304dcb64SAndre Przywara #define KVM_EXIT_UNKNOWN 0 230304dcb64SAndre Przywara #define KVM_EXIT_EXCEPTION 1 231304dcb64SAndre Przywara #define KVM_EXIT_IO 2 232304dcb64SAndre Przywara #define KVM_EXIT_HYPERCALL 3 233304dcb64SAndre Przywara #define KVM_EXIT_DEBUG 4 234304dcb64SAndre Przywara #define KVM_EXIT_HLT 5 235304dcb64SAndre Przywara #define KVM_EXIT_MMIO 6 236304dcb64SAndre Przywara #define KVM_EXIT_IRQ_WINDOW_OPEN 7 237304dcb64SAndre Przywara #define KVM_EXIT_SHUTDOWN 8 238304dcb64SAndre Przywara #define KVM_EXIT_FAIL_ENTRY 9 239304dcb64SAndre Przywara #define KVM_EXIT_INTR 10 240304dcb64SAndre Przywara #define KVM_EXIT_SET_TPR 11 241304dcb64SAndre Przywara #define KVM_EXIT_TPR_ACCESS 12 242304dcb64SAndre Przywara #define KVM_EXIT_S390_SIEIC 13 243304dcb64SAndre Przywara #define KVM_EXIT_S390_RESET 14 244304dcb64SAndre Przywara #define KVM_EXIT_DCR 15 /* deprecated */ 245304dcb64SAndre Przywara #define KVM_EXIT_NMI 16 246304dcb64SAndre Przywara #define KVM_EXIT_INTERNAL_ERROR 17 247304dcb64SAndre Przywara #define KVM_EXIT_OSI 18 248304dcb64SAndre Przywara #define KVM_EXIT_PAPR_HCALL 19 249304dcb64SAndre Przywara #define KVM_EXIT_S390_UCONTROL 20 250304dcb64SAndre Przywara #define KVM_EXIT_WATCHDOG 21 251304dcb64SAndre Przywara #define KVM_EXIT_S390_TSCH 22 252304dcb64SAndre Przywara #define KVM_EXIT_EPR 23 253304dcb64SAndre Przywara #define KVM_EXIT_SYSTEM_EVENT 24 254304dcb64SAndre Przywara #define KVM_EXIT_S390_STSI 25 255b3f606e1SMarc Zyngier #define KVM_EXIT_IOAPIC_EOI 26 256b3f606e1SMarc Zyngier #define KVM_EXIT_HYPERV 27 2575968b5ffSAnup Patel #define KVM_EXIT_ARM_NISV 28 2585968b5ffSAnup Patel #define KVM_EXIT_X86_RDMSR 29 2595968b5ffSAnup Patel #define KVM_EXIT_X86_WRMSR 30 2605968b5ffSAnup Patel #define KVM_EXIT_DIRTY_RING_FULL 31 2615968b5ffSAnup Patel #define KVM_EXIT_AP_RESET_HOLD 32 2625968b5ffSAnup Patel #define KVM_EXIT_X86_BUS_LOCK 33 2635968b5ffSAnup Patel #define KVM_EXIT_XEN 34 2645968b5ffSAnup Patel #define KVM_EXIT_RISCV_SBI 35 2658d0facecSAnup Patel #define KVM_EXIT_RISCV_CSR 36 2668d0facecSAnup Patel #define KVM_EXIT_NOTIFY 37 267304dcb64SAndre Przywara 268304dcb64SAndre Przywara /* For KVM_EXIT_INTERNAL_ERROR */ 269304dcb64SAndre Przywara /* Emulate instruction failed. */ 270304dcb64SAndre Przywara #define KVM_INTERNAL_ERROR_EMULATION 1 271304dcb64SAndre Przywara /* Encounter unexpected simultaneous exceptions. */ 272304dcb64SAndre Przywara #define KVM_INTERNAL_ERROR_SIMUL_EX 2 273304dcb64SAndre Przywara /* Encounter unexpected vm-exit due to delivery event. */ 274304dcb64SAndre Przywara #define KVM_INTERNAL_ERROR_DELIVERY_EV 3 2755968b5ffSAnup Patel /* Encounter unexpected vm-exit reason */ 2765968b5ffSAnup Patel #define KVM_INTERNAL_ERROR_UNEXPECTED_EXIT_REASON 4 2775968b5ffSAnup Patel 2785968b5ffSAnup Patel /* Flags that describe what fields in emulation_failure hold valid data. */ 2795968b5ffSAnup Patel #define KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES (1ULL << 0) 280304dcb64SAndre Przywara 281304dcb64SAndre Przywara /* for KVM_RUN, returned by mmap(vcpu_fd, offset=0) */ 282304dcb64SAndre Przywara struct kvm_run { 283304dcb64SAndre Przywara /* in */ 284304dcb64SAndre Przywara __u8 request_interrupt_window; 285764dfba1SAndre Przywara __u8 immediate_exit; 286764dfba1SAndre Przywara __u8 padding1[6]; 287304dcb64SAndre Przywara 288304dcb64SAndre Przywara /* out */ 289304dcb64SAndre Przywara __u32 exit_reason; 290304dcb64SAndre Przywara __u8 ready_for_interrupt_injection; 291304dcb64SAndre Przywara __u8 if_flag; 292b3f606e1SMarc Zyngier __u16 flags; 293304dcb64SAndre Przywara 294304dcb64SAndre Przywara /* in (pre_kvm_run), out (post_kvm_run) */ 295304dcb64SAndre Przywara __u64 cr8; 296304dcb64SAndre Przywara __u64 apic_base; 297304dcb64SAndre Przywara 298304dcb64SAndre Przywara #ifdef __KVM_S390 299304dcb64SAndre Przywara /* the processor status word for s390 */ 300304dcb64SAndre Przywara __u64 psw_mask; /* psw upper half */ 301304dcb64SAndre Przywara __u64 psw_addr; /* psw lower half */ 302304dcb64SAndre Przywara #endif 303304dcb64SAndre Przywara union { 304304dcb64SAndre Przywara /* KVM_EXIT_UNKNOWN */ 305304dcb64SAndre Przywara struct { 306304dcb64SAndre Przywara __u64 hardware_exit_reason; 307304dcb64SAndre Przywara } hw; 308304dcb64SAndre Przywara /* KVM_EXIT_FAIL_ENTRY */ 309304dcb64SAndre Przywara struct { 310304dcb64SAndre Przywara __u64 hardware_entry_failure_reason; 3115968b5ffSAnup Patel __u32 cpu; 312304dcb64SAndre Przywara } fail_entry; 313304dcb64SAndre Przywara /* KVM_EXIT_EXCEPTION */ 314304dcb64SAndre Przywara struct { 315304dcb64SAndre Przywara __u32 exception; 316304dcb64SAndre Przywara __u32 error_code; 317304dcb64SAndre Przywara } ex; 318304dcb64SAndre Przywara /* KVM_EXIT_IO */ 319304dcb64SAndre Przywara struct { 320304dcb64SAndre Przywara #define KVM_EXIT_IO_IN 0 321304dcb64SAndre Przywara #define KVM_EXIT_IO_OUT 1 322304dcb64SAndre Przywara __u8 direction; 323304dcb64SAndre Przywara __u8 size; /* bytes */ 324304dcb64SAndre Przywara __u16 port; 325304dcb64SAndre Przywara __u32 count; 326304dcb64SAndre Przywara __u64 data_offset; /* relative to kvm_run start */ 327304dcb64SAndre Przywara } io; 328b3f606e1SMarc Zyngier /* KVM_EXIT_DEBUG */ 329304dcb64SAndre Przywara struct { 330304dcb64SAndre Przywara struct kvm_debug_exit_arch arch; 331304dcb64SAndre Przywara } debug; 332304dcb64SAndre Przywara /* KVM_EXIT_MMIO */ 333304dcb64SAndre Przywara struct { 334304dcb64SAndre Przywara __u64 phys_addr; 335304dcb64SAndre Przywara __u8 data[8]; 336304dcb64SAndre Przywara __u32 len; 337304dcb64SAndre Przywara __u8 is_write; 338304dcb64SAndre Przywara } mmio; 339304dcb64SAndre Przywara /* KVM_EXIT_HYPERCALL */ 340304dcb64SAndre Przywara struct { 341304dcb64SAndre Przywara __u64 nr; 342304dcb64SAndre Przywara __u64 args[6]; 343304dcb64SAndre Przywara __u64 ret; 344be986824SAnup Patel 345be986824SAnup Patel union { 346be986824SAnup Patel #ifndef __KERNEL__ 347304dcb64SAndre Przywara __u32 longmode; 348be986824SAnup Patel #endif 349be986824SAnup Patel __u64 flags; 350be986824SAnup Patel }; 351304dcb64SAndre Przywara } hypercall; 352304dcb64SAndre Przywara /* KVM_EXIT_TPR_ACCESS */ 353304dcb64SAndre Przywara struct { 354304dcb64SAndre Przywara __u64 rip; 355304dcb64SAndre Przywara __u32 is_write; 356304dcb64SAndre Przywara __u32 pad; 357304dcb64SAndre Przywara } tpr_access; 358304dcb64SAndre Przywara /* KVM_EXIT_S390_SIEIC */ 359304dcb64SAndre Przywara struct { 360304dcb64SAndre Przywara __u8 icptcode; 361304dcb64SAndre Przywara __u16 ipa; 362304dcb64SAndre Przywara __u32 ipb; 363304dcb64SAndre Przywara } s390_sieic; 364304dcb64SAndre Przywara /* KVM_EXIT_S390_RESET */ 365304dcb64SAndre Przywara #define KVM_S390_RESET_POR 1 366304dcb64SAndre Przywara #define KVM_S390_RESET_CLEAR 2 367304dcb64SAndre Przywara #define KVM_S390_RESET_SUBSYSTEM 4 368304dcb64SAndre Przywara #define KVM_S390_RESET_CPU_INIT 8 369304dcb64SAndre Przywara #define KVM_S390_RESET_IPL 16 370304dcb64SAndre Przywara __u64 s390_reset_flags; 371304dcb64SAndre Przywara /* KVM_EXIT_S390_UCONTROL */ 372304dcb64SAndre Przywara struct { 373304dcb64SAndre Przywara __u64 trans_exc_code; 374304dcb64SAndre Przywara __u32 pgm_code; 375304dcb64SAndre Przywara } s390_ucontrol; 376304dcb64SAndre Przywara /* KVM_EXIT_DCR (deprecated) */ 377304dcb64SAndre Przywara struct { 378304dcb64SAndre Przywara __u32 dcrn; 379304dcb64SAndre Przywara __u32 data; 380304dcb64SAndre Przywara __u8 is_write; 381304dcb64SAndre Przywara } dcr; 382b3f606e1SMarc Zyngier /* KVM_EXIT_INTERNAL_ERROR */ 383304dcb64SAndre Przywara struct { 384304dcb64SAndre Przywara __u32 suberror; 385304dcb64SAndre Przywara /* Available with KVM_CAP_INTERNAL_ERROR_DATA: */ 386304dcb64SAndre Przywara __u32 ndata; 387304dcb64SAndre Przywara __u64 data[16]; 388304dcb64SAndre Przywara } internal; 3895968b5ffSAnup Patel /* 3905968b5ffSAnup Patel * KVM_INTERNAL_ERROR_EMULATION 3915968b5ffSAnup Patel * 3925968b5ffSAnup Patel * "struct emulation_failure" is an overlay of "struct internal" 3935968b5ffSAnup Patel * that is used for the KVM_INTERNAL_ERROR_EMULATION sub-type of 3945968b5ffSAnup Patel * KVM_EXIT_INTERNAL_ERROR. Note, unlike other internal error 3955968b5ffSAnup Patel * sub-types, this struct is ABI! It also needs to be backwards 3965968b5ffSAnup Patel * compatible with "struct internal". Take special care that 3975968b5ffSAnup Patel * "ndata" is correct, that new fields are enumerated in "flags", 3985968b5ffSAnup Patel * and that each flag enumerates fields that are 64-bit aligned 3995968b5ffSAnup Patel * and sized (so that ndata+internal.data[] is valid/accurate). 4005968b5ffSAnup Patel * 4015968b5ffSAnup Patel * Space beyond the defined fields may be used to store arbitrary 4025968b5ffSAnup Patel * debug information relating to the emulation failure. It is 4035968b5ffSAnup Patel * accounted for in "ndata" but the format is unspecified and is 4045968b5ffSAnup Patel * not represented in "flags". Any such information is *not* ABI! 4055968b5ffSAnup Patel */ 4065968b5ffSAnup Patel struct { 4075968b5ffSAnup Patel __u32 suberror; 4085968b5ffSAnup Patel __u32 ndata; 4095968b5ffSAnup Patel __u64 flags; 4105968b5ffSAnup Patel union { 4115968b5ffSAnup Patel struct { 4125968b5ffSAnup Patel __u8 insn_size; 4135968b5ffSAnup Patel __u8 insn_bytes[15]; 4145968b5ffSAnup Patel }; 4155968b5ffSAnup Patel }; 4165968b5ffSAnup Patel /* Arbitrary debug data may follow. */ 4175968b5ffSAnup Patel } emulation_failure; 418304dcb64SAndre Przywara /* KVM_EXIT_OSI */ 419304dcb64SAndre Przywara struct { 420304dcb64SAndre Przywara __u64 gprs[32]; 421304dcb64SAndre Przywara } osi; 422b3f606e1SMarc Zyngier /* KVM_EXIT_PAPR_HCALL */ 423304dcb64SAndre Przywara struct { 424304dcb64SAndre Przywara __u64 nr; 425304dcb64SAndre Przywara __u64 ret; 426304dcb64SAndre Przywara __u64 args[9]; 427304dcb64SAndre Przywara } papr_hcall; 428304dcb64SAndre Przywara /* KVM_EXIT_S390_TSCH */ 429304dcb64SAndre Przywara struct { 430304dcb64SAndre Przywara __u16 subchannel_id; 431304dcb64SAndre Przywara __u16 subchannel_nr; 432304dcb64SAndre Przywara __u32 io_int_parm; 433304dcb64SAndre Przywara __u32 io_int_word; 434304dcb64SAndre Przywara __u32 ipb; 435304dcb64SAndre Przywara __u8 dequeued; 436304dcb64SAndre Przywara } s390_tsch; 437304dcb64SAndre Przywara /* KVM_EXIT_EPR */ 438304dcb64SAndre Przywara struct { 439304dcb64SAndre Przywara __u32 epr; 440304dcb64SAndre Przywara } epr; 441304dcb64SAndre Przywara /* KVM_EXIT_SYSTEM_EVENT */ 442304dcb64SAndre Przywara struct { 443304dcb64SAndre Przywara #define KVM_SYSTEM_EVENT_SHUTDOWN 1 444304dcb64SAndre Przywara #define KVM_SYSTEM_EVENT_RESET 2 445b3f606e1SMarc Zyngier #define KVM_SYSTEM_EVENT_CRASH 3 4468d0facecSAnup Patel #define KVM_SYSTEM_EVENT_WAKEUP 4 4478d0facecSAnup Patel #define KVM_SYSTEM_EVENT_SUSPEND 5 4488d0facecSAnup Patel #define KVM_SYSTEM_EVENT_SEV_TERM 6 449304dcb64SAndre Przywara __u32 type; 4508d0facecSAnup Patel __u32 ndata; 4518d0facecSAnup Patel union { 4528d0facecSAnup Patel #ifndef __KERNEL__ 453304dcb64SAndre Przywara __u64 flags; 4548d0facecSAnup Patel #endif 4558d0facecSAnup Patel __u64 data[16]; 4568d0facecSAnup Patel }; 457304dcb64SAndre Przywara } system_event; 458304dcb64SAndre Przywara /* KVM_EXIT_S390_STSI */ 459304dcb64SAndre Przywara struct { 460304dcb64SAndre Przywara __u64 addr; 461304dcb64SAndre Przywara __u8 ar; 462304dcb64SAndre Przywara __u8 reserved; 463304dcb64SAndre Przywara __u8 fc; 464304dcb64SAndre Przywara __u8 sel1; 465304dcb64SAndre Przywara __u16 sel2; 466304dcb64SAndre Przywara } s390_stsi; 467b3f606e1SMarc Zyngier /* KVM_EXIT_IOAPIC_EOI */ 468b3f606e1SMarc Zyngier struct { 469b3f606e1SMarc Zyngier __u8 vector; 470b3f606e1SMarc Zyngier } eoi; 471b3f606e1SMarc Zyngier /* KVM_EXIT_HYPERV */ 472b3f606e1SMarc Zyngier struct kvm_hyperv_exit hyperv; 4735968b5ffSAnup Patel /* KVM_EXIT_ARM_NISV */ 4745968b5ffSAnup Patel struct { 4755968b5ffSAnup Patel __u64 esr_iss; 4765968b5ffSAnup Patel __u64 fault_ipa; 4775968b5ffSAnup Patel } arm_nisv; 4785968b5ffSAnup Patel /* KVM_EXIT_X86_RDMSR / KVM_EXIT_X86_WRMSR */ 4795968b5ffSAnup Patel struct { 4805968b5ffSAnup Patel __u8 error; /* user -> kernel */ 4815968b5ffSAnup Patel __u8 pad[7]; 4825968b5ffSAnup Patel #define KVM_MSR_EXIT_REASON_INVAL (1 << 0) 4835968b5ffSAnup Patel #define KVM_MSR_EXIT_REASON_UNKNOWN (1 << 1) 4845968b5ffSAnup Patel #define KVM_MSR_EXIT_REASON_FILTER (1 << 2) 485be986824SAnup Patel #define KVM_MSR_EXIT_REASON_VALID_MASK (KVM_MSR_EXIT_REASON_INVAL | \ 486be986824SAnup Patel KVM_MSR_EXIT_REASON_UNKNOWN | \ 487be986824SAnup Patel KVM_MSR_EXIT_REASON_FILTER) 4885968b5ffSAnup Patel __u32 reason; /* kernel -> user */ 4895968b5ffSAnup Patel __u32 index; /* kernel -> user */ 4905968b5ffSAnup Patel __u64 data; /* kernel <-> user */ 4915968b5ffSAnup Patel } msr; 4925968b5ffSAnup Patel /* KVM_EXIT_XEN */ 4935968b5ffSAnup Patel struct kvm_xen_exit xen; 4945968b5ffSAnup Patel /* KVM_EXIT_RISCV_SBI */ 4955968b5ffSAnup Patel struct { 4965968b5ffSAnup Patel unsigned long extension_id; 4975968b5ffSAnup Patel unsigned long function_id; 4985968b5ffSAnup Patel unsigned long args[6]; 4995968b5ffSAnup Patel unsigned long ret[2]; 5005968b5ffSAnup Patel } riscv_sbi; 5018d0facecSAnup Patel /* KVM_EXIT_RISCV_CSR */ 5028d0facecSAnup Patel struct { 5038d0facecSAnup Patel unsigned long csr_num; 5048d0facecSAnup Patel unsigned long new_value; 5058d0facecSAnup Patel unsigned long write_mask; 5068d0facecSAnup Patel unsigned long ret_value; 5078d0facecSAnup Patel } riscv_csr; 5088d0facecSAnup Patel /* KVM_EXIT_NOTIFY */ 5098d0facecSAnup Patel struct { 5108d0facecSAnup Patel #define KVM_NOTIFY_CONTEXT_INVALID (1 << 0) 5118d0facecSAnup Patel __u32 flags; 5128d0facecSAnup Patel } notify; 513304dcb64SAndre Przywara /* Fix the size of the union. */ 514304dcb64SAndre Przywara char padding[256]; 515304dcb64SAndre Przywara }; 516304dcb64SAndre Przywara 5171bbe92f5SDave Martin /* 2048 is the size of the char array used to bound/pad the size 5181bbe92f5SDave Martin * of the union that holds sync regs. 5191bbe92f5SDave Martin */ 5201bbe92f5SDave Martin #define SYNC_REGS_SIZE_BYTES 2048 521304dcb64SAndre Przywara /* 522304dcb64SAndre Przywara * shared registers between kvm and userspace. 523304dcb64SAndre Przywara * kvm_valid_regs specifies the register classes set by the host 524304dcb64SAndre Przywara * kvm_dirty_regs specified the register classes dirtied by userspace 525304dcb64SAndre Przywara * struct kvm_sync_regs is architecture specific, as well as the 526304dcb64SAndre Przywara * bits for kvm_valid_regs and kvm_dirty_regs 527304dcb64SAndre Przywara */ 528304dcb64SAndre Przywara __u64 kvm_valid_regs; 529304dcb64SAndre Przywara __u64 kvm_dirty_regs; 530304dcb64SAndre Przywara union { 531304dcb64SAndre Przywara struct kvm_sync_regs regs; 5321bbe92f5SDave Martin char padding[SYNC_REGS_SIZE_BYTES]; 533304dcb64SAndre Przywara } s; 534304dcb64SAndre Przywara }; 535304dcb64SAndre Przywara 536304dcb64SAndre Przywara /* for KVM_REGISTER_COALESCED_MMIO / KVM_UNREGISTER_COALESCED_MMIO */ 537304dcb64SAndre Przywara 538304dcb64SAndre Przywara struct kvm_coalesced_mmio_zone { 539304dcb64SAndre Przywara __u64 addr; 540304dcb64SAndre Przywara __u32 size; 5411bbe92f5SDave Martin union { 542304dcb64SAndre Przywara __u32 pad; 5431bbe92f5SDave Martin __u32 pio; 5441bbe92f5SDave Martin }; 545304dcb64SAndre Przywara }; 546304dcb64SAndre Przywara 547304dcb64SAndre Przywara struct kvm_coalesced_mmio { 548304dcb64SAndre Przywara __u64 phys_addr; 549304dcb64SAndre Przywara __u32 len; 5501bbe92f5SDave Martin union { 551304dcb64SAndre Przywara __u32 pad; 5521bbe92f5SDave Martin __u32 pio; 5531bbe92f5SDave Martin }; 554304dcb64SAndre Przywara __u8 data[8]; 555304dcb64SAndre Przywara }; 556304dcb64SAndre Przywara 557304dcb64SAndre Przywara struct kvm_coalesced_mmio_ring { 558304dcb64SAndre Przywara __u32 first, last; 5598d0facecSAnup Patel struct kvm_coalesced_mmio coalesced_mmio[]; 560304dcb64SAndre Przywara }; 561304dcb64SAndre Przywara 562304dcb64SAndre Przywara #define KVM_COALESCED_MMIO_MAX \ 563304dcb64SAndre Przywara ((PAGE_SIZE - sizeof(struct kvm_coalesced_mmio_ring)) / \ 564304dcb64SAndre Przywara sizeof(struct kvm_coalesced_mmio)) 565304dcb64SAndre Przywara 566304dcb64SAndre Przywara /* for KVM_TRANSLATE */ 567304dcb64SAndre Przywara struct kvm_translation { 568304dcb64SAndre Przywara /* in */ 569304dcb64SAndre Przywara __u64 linear_address; 570304dcb64SAndre Przywara 571304dcb64SAndre Przywara /* out */ 572304dcb64SAndre Przywara __u64 physical_address; 573304dcb64SAndre Przywara __u8 valid; 574304dcb64SAndre Przywara __u8 writeable; 575304dcb64SAndre Przywara __u8 usermode; 576304dcb64SAndre Przywara __u8 pad[5]; 577304dcb64SAndre Przywara }; 578304dcb64SAndre Przywara 579304dcb64SAndre Przywara /* for KVM_S390_MEM_OP */ 580304dcb64SAndre Przywara struct kvm_s390_mem_op { 581304dcb64SAndre Przywara /* in */ 582304dcb64SAndre Przywara __u64 gaddr; /* the guest address */ 583304dcb64SAndre Przywara __u64 flags; /* flags */ 584304dcb64SAndre Przywara __u32 size; /* amount of bytes */ 585304dcb64SAndre Przywara __u32 op; /* type of operation */ 586304dcb64SAndre Przywara __u64 buf; /* buffer in userspace */ 5875968b5ffSAnup Patel union { 588083a976eSAlexandru Elisei struct { 589304dcb64SAndre Przywara __u8 ar; /* the access register number */ 590083a976eSAlexandru Elisei __u8 key; /* access key, ignored if flag unset */ 591be986824SAnup Patel __u8 pad1[6]; /* ignored */ 592be986824SAnup Patel __u64 old_addr; /* ignored if cmpxchg flag unset */ 593083a976eSAlexandru Elisei }; 5945968b5ffSAnup Patel __u32 sida_offset; /* offset into the sida */ 595083a976eSAlexandru Elisei __u8 reserved[32]; /* ignored */ 5965968b5ffSAnup Patel }; 597304dcb64SAndre Przywara }; 598304dcb64SAndre Przywara /* types for kvm_s390_mem_op->op */ 599304dcb64SAndre Przywara #define KVM_S390_MEMOP_LOGICAL_READ 0 600304dcb64SAndre Przywara #define KVM_S390_MEMOP_LOGICAL_WRITE 1 6015968b5ffSAnup Patel #define KVM_S390_MEMOP_SIDA_READ 2 6025968b5ffSAnup Patel #define KVM_S390_MEMOP_SIDA_WRITE 3 603083a976eSAlexandru Elisei #define KVM_S390_MEMOP_ABSOLUTE_READ 4 604083a976eSAlexandru Elisei #define KVM_S390_MEMOP_ABSOLUTE_WRITE 5 605be986824SAnup Patel #define KVM_S390_MEMOP_ABSOLUTE_CMPXCHG 6 606be986824SAnup Patel 607304dcb64SAndre Przywara /* flags for kvm_s390_mem_op->flags */ 608304dcb64SAndre Przywara #define KVM_S390_MEMOP_F_CHECK_ONLY (1ULL << 0) 609304dcb64SAndre Przywara #define KVM_S390_MEMOP_F_INJECT_EXCEPTION (1ULL << 1) 610083a976eSAlexandru Elisei #define KVM_S390_MEMOP_F_SKEY_PROTECTION (1ULL << 2) 611304dcb64SAndre Przywara 612be986824SAnup Patel /* flags specifying extension support via KVM_CAP_S390_MEM_OP_EXTENSION */ 613be986824SAnup Patel #define KVM_S390_MEMOP_EXTENSION_CAP_BASE (1 << 0) 614be986824SAnup Patel #define KVM_S390_MEMOP_EXTENSION_CAP_CMPXCHG (1 << 1) 615be986824SAnup Patel 616304dcb64SAndre Przywara /* for KVM_INTERRUPT */ 617304dcb64SAndre Przywara struct kvm_interrupt { 618304dcb64SAndre Przywara /* in */ 619304dcb64SAndre Przywara __u32 irq; 620304dcb64SAndre Przywara }; 621304dcb64SAndre Przywara 622304dcb64SAndre Przywara /* for KVM_GET_DIRTY_LOG */ 623304dcb64SAndre Przywara struct kvm_dirty_log { 624304dcb64SAndre Przywara __u32 slot; 625304dcb64SAndre Przywara __u32 padding1; 626304dcb64SAndre Przywara union { 627304dcb64SAndre Przywara void __user *dirty_bitmap; /* one bit per page */ 628304dcb64SAndre Przywara __u64 padding2; 629304dcb64SAndre Przywara }; 630304dcb64SAndre Przywara }; 631304dcb64SAndre Przywara 6321bbe92f5SDave Martin /* for KVM_CLEAR_DIRTY_LOG */ 6331bbe92f5SDave Martin struct kvm_clear_dirty_log { 6341bbe92f5SDave Martin __u32 slot; 6351bbe92f5SDave Martin __u32 num_pages; 6361bbe92f5SDave Martin __u64 first_page; 6371bbe92f5SDave Martin union { 6381bbe92f5SDave Martin void __user *dirty_bitmap; /* one bit per page */ 6391bbe92f5SDave Martin __u64 padding2; 6401bbe92f5SDave Martin }; 6411bbe92f5SDave Martin }; 6421bbe92f5SDave Martin 643304dcb64SAndre Przywara /* for KVM_SET_SIGNAL_MASK */ 644304dcb64SAndre Przywara struct kvm_signal_mask { 645304dcb64SAndre Przywara __u32 len; 6468d0facecSAnup Patel __u8 sigset[]; 647304dcb64SAndre Przywara }; 648304dcb64SAndre Przywara 649304dcb64SAndre Przywara /* for KVM_TPR_ACCESS_REPORTING */ 650304dcb64SAndre Przywara struct kvm_tpr_access_ctl { 651304dcb64SAndre Przywara __u32 enabled; 652304dcb64SAndre Przywara __u32 flags; 653304dcb64SAndre Przywara __u32 reserved[8]; 654304dcb64SAndre Przywara }; 655304dcb64SAndre Przywara 656304dcb64SAndre Przywara /* for KVM_SET_VAPIC_ADDR */ 657304dcb64SAndre Przywara struct kvm_vapic_addr { 658304dcb64SAndre Przywara __u64 vapic_addr; 659304dcb64SAndre Przywara }; 660304dcb64SAndre Przywara 661304dcb64SAndre Przywara /* for KVM_SET_MP_STATE */ 662304dcb64SAndre Przywara 663304dcb64SAndre Przywara /* not all states are valid on all architectures */ 664304dcb64SAndre Przywara #define KVM_MP_STATE_RUNNABLE 0 665304dcb64SAndre Przywara #define KVM_MP_STATE_UNINITIALIZED 1 666304dcb64SAndre Przywara #define KVM_MP_STATE_INIT_RECEIVED 2 667304dcb64SAndre Przywara #define KVM_MP_STATE_HALTED 3 668304dcb64SAndre Przywara #define KVM_MP_STATE_SIPI_RECEIVED 4 669304dcb64SAndre Przywara #define KVM_MP_STATE_STOPPED 5 670304dcb64SAndre Przywara #define KVM_MP_STATE_CHECK_STOP 6 671304dcb64SAndre Przywara #define KVM_MP_STATE_OPERATING 7 672304dcb64SAndre Przywara #define KVM_MP_STATE_LOAD 8 6735968b5ffSAnup Patel #define KVM_MP_STATE_AP_RESET_HOLD 9 6748d0facecSAnup Patel #define KVM_MP_STATE_SUSPENDED 10 675304dcb64SAndre Przywara 676304dcb64SAndre Przywara struct kvm_mp_state { 677304dcb64SAndre Przywara __u32 mp_state; 678304dcb64SAndre Przywara }; 679304dcb64SAndre Przywara 680304dcb64SAndre Przywara struct kvm_s390_psw { 681304dcb64SAndre Przywara __u64 mask; 682304dcb64SAndre Przywara __u64 addr; 683304dcb64SAndre Przywara }; 684304dcb64SAndre Przywara 685304dcb64SAndre Przywara /* valid values for type in kvm_s390_interrupt */ 686304dcb64SAndre Przywara #define KVM_S390_SIGP_STOP 0xfffe0000u 687304dcb64SAndre Przywara #define KVM_S390_PROGRAM_INT 0xfffe0001u 688304dcb64SAndre Przywara #define KVM_S390_SIGP_SET_PREFIX 0xfffe0002u 689304dcb64SAndre Przywara #define KVM_S390_RESTART 0xfffe0003u 690304dcb64SAndre Przywara #define KVM_S390_INT_PFAULT_INIT 0xfffe0004u 691304dcb64SAndre Przywara #define KVM_S390_INT_PFAULT_DONE 0xfffe0005u 692304dcb64SAndre Przywara #define KVM_S390_MCHK 0xfffe1000u 693304dcb64SAndre Przywara #define KVM_S390_INT_CLOCK_COMP 0xffff1004u 694304dcb64SAndre Przywara #define KVM_S390_INT_CPU_TIMER 0xffff1005u 695304dcb64SAndre Przywara #define KVM_S390_INT_VIRTIO 0xffff2603u 696304dcb64SAndre Przywara #define KVM_S390_INT_SERVICE 0xffff2401u 697304dcb64SAndre Przywara #define KVM_S390_INT_EMERGENCY 0xffff1201u 698304dcb64SAndre Przywara #define KVM_S390_INT_EXTERNAL_CALL 0xffff1202u 699304dcb64SAndre Przywara /* Anything below 0xfffe0000u is taken by INT_IO */ 700304dcb64SAndre Przywara #define KVM_S390_INT_IO(ai,cssid,ssid,schid) \ 701304dcb64SAndre Przywara (((schid)) | \ 702304dcb64SAndre Przywara ((ssid) << 16) | \ 703304dcb64SAndre Przywara ((cssid) << 18) | \ 704304dcb64SAndre Przywara ((ai) << 26)) 705304dcb64SAndre Przywara #define KVM_S390_INT_IO_MIN 0x00000000u 706304dcb64SAndre Przywara #define KVM_S390_INT_IO_MAX 0xfffdffffu 707b3f606e1SMarc Zyngier #define KVM_S390_INT_IO_AI_MASK 0x04000000u 708304dcb64SAndre Przywara 709304dcb64SAndre Przywara 710304dcb64SAndre Przywara struct kvm_s390_interrupt { 711304dcb64SAndre Przywara __u32 type; 712304dcb64SAndre Przywara __u32 parm; 713304dcb64SAndre Przywara __u64 parm64; 714304dcb64SAndre Przywara }; 715304dcb64SAndre Przywara 716304dcb64SAndre Przywara struct kvm_s390_io_info { 717304dcb64SAndre Przywara __u16 subchannel_id; 718304dcb64SAndre Przywara __u16 subchannel_nr; 719304dcb64SAndre Przywara __u32 io_int_parm; 720304dcb64SAndre Przywara __u32 io_int_word; 721304dcb64SAndre Przywara }; 722304dcb64SAndre Przywara 723304dcb64SAndre Przywara struct kvm_s390_ext_info { 724304dcb64SAndre Przywara __u32 ext_params; 725304dcb64SAndre Przywara __u32 pad; 726304dcb64SAndre Przywara __u64 ext_params2; 727304dcb64SAndre Przywara }; 728304dcb64SAndre Przywara 729304dcb64SAndre Przywara struct kvm_s390_pgm_info { 730304dcb64SAndre Przywara __u64 trans_exc_code; 731304dcb64SAndre Przywara __u64 mon_code; 732304dcb64SAndre Przywara __u64 per_address; 733304dcb64SAndre Przywara __u32 data_exc_code; 734304dcb64SAndre Przywara __u16 code; 735304dcb64SAndre Przywara __u16 mon_class_nr; 736304dcb64SAndre Przywara __u8 per_code; 737304dcb64SAndre Przywara __u8 per_atmid; 738304dcb64SAndre Przywara __u8 exc_access_id; 739304dcb64SAndre Przywara __u8 per_access_id; 740304dcb64SAndre Przywara __u8 op_access_id; 741b37ed70eSAndre Przywara #define KVM_S390_PGM_FLAGS_ILC_VALID 0x01 742b37ed70eSAndre Przywara #define KVM_S390_PGM_FLAGS_ILC_0 0x02 743b37ed70eSAndre Przywara #define KVM_S390_PGM_FLAGS_ILC_1 0x04 744b37ed70eSAndre Przywara #define KVM_S390_PGM_FLAGS_ILC_MASK 0x06 745b37ed70eSAndre Przywara #define KVM_S390_PGM_FLAGS_NO_REWIND 0x08 746b37ed70eSAndre Przywara __u8 flags; 747b37ed70eSAndre Przywara __u8 pad[2]; 748304dcb64SAndre Przywara }; 749304dcb64SAndre Przywara 750304dcb64SAndre Przywara struct kvm_s390_prefix_info { 751304dcb64SAndre Przywara __u32 address; 752304dcb64SAndre Przywara }; 753304dcb64SAndre Przywara 754304dcb64SAndre Przywara struct kvm_s390_extcall_info { 755304dcb64SAndre Przywara __u16 code; 756304dcb64SAndre Przywara }; 757304dcb64SAndre Przywara 758304dcb64SAndre Przywara struct kvm_s390_emerg_info { 759304dcb64SAndre Przywara __u16 code; 760304dcb64SAndre Przywara }; 761304dcb64SAndre Przywara 762304dcb64SAndre Przywara #define KVM_S390_STOP_FLAG_STORE_STATUS 0x01 763304dcb64SAndre Przywara struct kvm_s390_stop_info { 764304dcb64SAndre Przywara __u32 flags; 765304dcb64SAndre Przywara }; 766304dcb64SAndre Przywara 767304dcb64SAndre Przywara struct kvm_s390_mchk_info { 768304dcb64SAndre Przywara __u64 cr14; 769304dcb64SAndre Przywara __u64 mcic; 770304dcb64SAndre Przywara __u64 failing_storage_address; 771304dcb64SAndre Przywara __u32 ext_damage_code; 772304dcb64SAndre Przywara __u32 pad; 773304dcb64SAndre Przywara __u8 fixed_logout[16]; 774304dcb64SAndre Przywara }; 775304dcb64SAndre Przywara 776304dcb64SAndre Przywara struct kvm_s390_irq { 777304dcb64SAndre Przywara __u64 type; 778304dcb64SAndre Przywara union { 779304dcb64SAndre Przywara struct kvm_s390_io_info io; 780304dcb64SAndre Przywara struct kvm_s390_ext_info ext; 781304dcb64SAndre Przywara struct kvm_s390_pgm_info pgm; 782304dcb64SAndre Przywara struct kvm_s390_emerg_info emerg; 783304dcb64SAndre Przywara struct kvm_s390_extcall_info extcall; 784304dcb64SAndre Przywara struct kvm_s390_prefix_info prefix; 785304dcb64SAndre Przywara struct kvm_s390_stop_info stop; 786304dcb64SAndre Przywara struct kvm_s390_mchk_info mchk; 787304dcb64SAndre Przywara char reserved[64]; 788304dcb64SAndre Przywara } u; 789304dcb64SAndre Przywara }; 790304dcb64SAndre Przywara 791304dcb64SAndre Przywara struct kvm_s390_irq_state { 792304dcb64SAndre Przywara __u64 buf; 7931bbe92f5SDave Martin __u32 flags; /* will stay unused for compatibility reasons */ 794304dcb64SAndre Przywara __u32 len; 7951bbe92f5SDave Martin __u32 reserved[4]; /* will stay unused for compatibility reasons */ 796304dcb64SAndre Przywara }; 797304dcb64SAndre Przywara 798304dcb64SAndre Przywara /* for KVM_SET_GUEST_DEBUG */ 799304dcb64SAndre Przywara 800304dcb64SAndre Przywara #define KVM_GUESTDBG_ENABLE 0x00000001 801304dcb64SAndre Przywara #define KVM_GUESTDBG_SINGLESTEP 0x00000002 802304dcb64SAndre Przywara 803304dcb64SAndre Przywara struct kvm_guest_debug { 804304dcb64SAndre Przywara __u32 control; 805304dcb64SAndre Przywara __u32 pad; 806304dcb64SAndre Przywara struct kvm_guest_debug_arch arch; 807304dcb64SAndre Przywara }; 808304dcb64SAndre Przywara 809304dcb64SAndre Przywara enum { 810304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_datamatch, 811304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_pio, 812304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_deassign, 813304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_virtio_ccw_notify, 814304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_fast_mmio, 815304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_max, 816304dcb64SAndre Przywara }; 817304dcb64SAndre Przywara 818304dcb64SAndre Przywara #define KVM_IOEVENTFD_FLAG_DATAMATCH (1 << kvm_ioeventfd_flag_nr_datamatch) 819304dcb64SAndre Przywara #define KVM_IOEVENTFD_FLAG_PIO (1 << kvm_ioeventfd_flag_nr_pio) 820304dcb64SAndre Przywara #define KVM_IOEVENTFD_FLAG_DEASSIGN (1 << kvm_ioeventfd_flag_nr_deassign) 821304dcb64SAndre Przywara #define KVM_IOEVENTFD_FLAG_VIRTIO_CCW_NOTIFY \ 822304dcb64SAndre Przywara (1 << kvm_ioeventfd_flag_nr_virtio_ccw_notify) 823304dcb64SAndre Przywara 824304dcb64SAndre Przywara #define KVM_IOEVENTFD_VALID_FLAG_MASK ((1 << kvm_ioeventfd_flag_nr_max) - 1) 825304dcb64SAndre Przywara 826304dcb64SAndre Przywara struct kvm_ioeventfd { 827304dcb64SAndre Przywara __u64 datamatch; 828304dcb64SAndre Przywara __u64 addr; /* legal pio/mmio address */ 829304dcb64SAndre Przywara __u32 len; /* 1, 2, 4, or 8 bytes; or 0 to ignore length */ 830304dcb64SAndre Przywara __s32 fd; 831304dcb64SAndre Przywara __u32 flags; 832304dcb64SAndre Przywara __u8 pad[36]; 833304dcb64SAndre Przywara }; 834304dcb64SAndre Przywara 8351bbe92f5SDave Martin #define KVM_X86_DISABLE_EXITS_MWAIT (1 << 0) 8361bbe92f5SDave Martin #define KVM_X86_DISABLE_EXITS_HLT (1 << 1) 8371bbe92f5SDave Martin #define KVM_X86_DISABLE_EXITS_PAUSE (1 << 2) 83866b24a33SWill Deacon #define KVM_X86_DISABLE_EXITS_CSTATE (1 << 3) 8391bbe92f5SDave Martin #define KVM_X86_DISABLE_VALID_EXITS (KVM_X86_DISABLE_EXITS_MWAIT | \ 8401bbe92f5SDave Martin KVM_X86_DISABLE_EXITS_HLT | \ 84166b24a33SWill Deacon KVM_X86_DISABLE_EXITS_PAUSE | \ 84266b24a33SWill Deacon KVM_X86_DISABLE_EXITS_CSTATE) 8431bbe92f5SDave Martin 844304dcb64SAndre Przywara /* for KVM_ENABLE_CAP */ 845304dcb64SAndre Przywara struct kvm_enable_cap { 846304dcb64SAndre Przywara /* in */ 847304dcb64SAndre Przywara __u32 cap; 848304dcb64SAndre Przywara __u32 flags; 849304dcb64SAndre Przywara __u64 args[4]; 850304dcb64SAndre Przywara __u8 pad[64]; 851304dcb64SAndre Przywara }; 852304dcb64SAndre Przywara 853304dcb64SAndre Przywara /* for KVM_PPC_GET_PVINFO */ 854764dfba1SAndre Przywara 855764dfba1SAndre Przywara #define KVM_PPC_PVINFO_FLAGS_EV_IDLE (1<<0) 856764dfba1SAndre Przywara 857304dcb64SAndre Przywara struct kvm_ppc_pvinfo { 858304dcb64SAndre Przywara /* out */ 859304dcb64SAndre Przywara __u32 flags; 860304dcb64SAndre Przywara __u32 hcall[4]; 861304dcb64SAndre Przywara __u8 pad[108]; 862304dcb64SAndre Przywara }; 863304dcb64SAndre Przywara 864304dcb64SAndre Przywara /* for KVM_PPC_GET_SMMU_INFO */ 865304dcb64SAndre Przywara #define KVM_PPC_PAGE_SIZES_MAX_SZ 8 866304dcb64SAndre Przywara 867304dcb64SAndre Przywara struct kvm_ppc_one_page_size { 868304dcb64SAndre Przywara __u32 page_shift; /* Page shift (or 0) */ 869304dcb64SAndre Przywara __u32 pte_enc; /* Encoding in the HPTE (>>12) */ 870304dcb64SAndre Przywara }; 871304dcb64SAndre Przywara 872304dcb64SAndre Przywara struct kvm_ppc_one_seg_page_size { 873304dcb64SAndre Przywara __u32 page_shift; /* Base page shift of segment (or 0) */ 874304dcb64SAndre Przywara __u32 slb_enc; /* SLB encoding for BookS */ 875304dcb64SAndre Przywara struct kvm_ppc_one_page_size enc[KVM_PPC_PAGE_SIZES_MAX_SZ]; 876304dcb64SAndre Przywara }; 877304dcb64SAndre Przywara 878304dcb64SAndre Przywara #define KVM_PPC_PAGE_SIZES_REAL 0x00000001 879304dcb64SAndre Przywara #define KVM_PPC_1T_SEGMENTS 0x00000002 8801bbe92f5SDave Martin #define KVM_PPC_NO_HASH 0x00000004 881304dcb64SAndre Przywara 882304dcb64SAndre Przywara struct kvm_ppc_smmu_info { 883304dcb64SAndre Przywara __u64 flags; 884304dcb64SAndre Przywara __u32 slb_size; 8851bbe92f5SDave Martin __u16 data_keys; /* # storage keys supported for data */ 8861bbe92f5SDave Martin __u16 instr_keys; /* # storage keys supported for instructions */ 887304dcb64SAndre Przywara struct kvm_ppc_one_seg_page_size sps[KVM_PPC_PAGE_SIZES_MAX_SZ]; 888304dcb64SAndre Przywara }; 889304dcb64SAndre Przywara 890764dfba1SAndre Przywara /* for KVM_PPC_RESIZE_HPT_{PREPARE,COMMIT} */ 891764dfba1SAndre Przywara struct kvm_ppc_resize_hpt { 892764dfba1SAndre Przywara __u64 flags; 893764dfba1SAndre Przywara __u32 shift; 894764dfba1SAndre Przywara __u32 pad; 895764dfba1SAndre Przywara }; 896304dcb64SAndre Przywara 897304dcb64SAndre Przywara #define KVMIO 0xAE 898304dcb64SAndre Przywara 899304dcb64SAndre Przywara /* machine type bits, to be used as argument to KVM_CREATE_VM */ 900304dcb64SAndre Przywara #define KVM_VM_S390_UCONTROL 1 901304dcb64SAndre Przywara 902304dcb64SAndre Przywara /* on ppc, 0 indicate default, 1 should force HV and 2 PR */ 903304dcb64SAndre Przywara #define KVM_VM_PPC_HV 1 904304dcb64SAndre Przywara #define KVM_VM_PPC_PR 2 905304dcb64SAndre Przywara 9065968b5ffSAnup Patel /* on MIPS, 0 indicates auto, 1 forces VZ ASE, 2 forces trap & emulate */ 9075968b5ffSAnup Patel #define KVM_VM_MIPS_AUTO 0 9081bbe92f5SDave Martin #define KVM_VM_MIPS_VZ 1 9095968b5ffSAnup Patel #define KVM_VM_MIPS_TE 2 9101bbe92f5SDave Martin 911304dcb64SAndre Przywara #define KVM_S390_SIE_PAGE_OFFSET 1 912304dcb64SAndre Przywara 913304dcb64SAndre Przywara /* 9141bbe92f5SDave Martin * On arm64, machine type can be used to request the physical 9151bbe92f5SDave Martin * address size for the VM. Bits[7-0] are reserved for the guest 9161bbe92f5SDave Martin * PA size shift (i.e, log2(PA_Size)). For backward compatibility, 9171bbe92f5SDave Martin * value 0 implies the default IPA size, 40bits. 9181bbe92f5SDave Martin */ 9191bbe92f5SDave Martin #define KVM_VM_TYPE_ARM_IPA_SIZE_MASK 0xffULL 9201bbe92f5SDave Martin #define KVM_VM_TYPE_ARM_IPA_SIZE(x) \ 9211bbe92f5SDave Martin ((x) & KVM_VM_TYPE_ARM_IPA_SIZE_MASK) 9221bbe92f5SDave Martin /* 923304dcb64SAndre Przywara * ioctls for /dev/kvm fds: 924304dcb64SAndre Przywara */ 925304dcb64SAndre Przywara #define KVM_GET_API_VERSION _IO(KVMIO, 0x00) 926304dcb64SAndre Przywara #define KVM_CREATE_VM _IO(KVMIO, 0x01) /* returns a VM fd */ 927304dcb64SAndre Przywara #define KVM_GET_MSR_INDEX_LIST _IOWR(KVMIO, 0x02, struct kvm_msr_list) 928304dcb64SAndre Przywara 929304dcb64SAndre Przywara #define KVM_S390_ENABLE_SIE _IO(KVMIO, 0x06) 930304dcb64SAndre Przywara /* 931304dcb64SAndre Przywara * Check if a kvm extension is available. Argument is extension number, 932304dcb64SAndre Przywara * return is 1 (yes) or 0 (no, sorry). 933304dcb64SAndre Przywara */ 934304dcb64SAndre Przywara #define KVM_CHECK_EXTENSION _IO(KVMIO, 0x03) 935304dcb64SAndre Przywara /* 936304dcb64SAndre Przywara * Get size for mmap(vcpu_fd) 937304dcb64SAndre Przywara */ 938304dcb64SAndre Przywara #define KVM_GET_VCPU_MMAP_SIZE _IO(KVMIO, 0x04) /* in bytes */ 939304dcb64SAndre Przywara #define KVM_GET_SUPPORTED_CPUID _IOWR(KVMIO, 0x05, struct kvm_cpuid2) 940304dcb64SAndre Przywara #define KVM_TRACE_ENABLE __KVM_DEPRECATED_MAIN_W_0x06 941304dcb64SAndre Przywara #define KVM_TRACE_PAUSE __KVM_DEPRECATED_MAIN_0x07 942304dcb64SAndre Przywara #define KVM_TRACE_DISABLE __KVM_DEPRECATED_MAIN_0x08 943304dcb64SAndre Przywara #define KVM_GET_EMULATED_CPUID _IOWR(KVMIO, 0x09, struct kvm_cpuid2) 9441bbe92f5SDave Martin #define KVM_GET_MSR_FEATURE_INDEX_LIST _IOWR(KVMIO, 0x0a, struct kvm_msr_list) 945304dcb64SAndre Przywara 946304dcb64SAndre Przywara /* 947304dcb64SAndre Przywara * Extension capability list. 948304dcb64SAndre Przywara */ 949304dcb64SAndre Przywara #define KVM_CAP_IRQCHIP 0 950304dcb64SAndre Przywara #define KVM_CAP_HLT 1 951304dcb64SAndre Przywara #define KVM_CAP_MMU_SHADOW_CACHE_CONTROL 2 952304dcb64SAndre Przywara #define KVM_CAP_USER_MEMORY 3 953304dcb64SAndre Przywara #define KVM_CAP_SET_TSS_ADDR 4 954304dcb64SAndre Przywara #define KVM_CAP_VAPIC 6 955304dcb64SAndre Przywara #define KVM_CAP_EXT_CPUID 7 956304dcb64SAndre Przywara #define KVM_CAP_CLOCKSOURCE 8 957304dcb64SAndre Przywara #define KVM_CAP_NR_VCPUS 9 /* returns recommended max vcpus per vm */ 958304dcb64SAndre Przywara #define KVM_CAP_NR_MEMSLOTS 10 /* returns max memory slots per vm */ 959304dcb64SAndre Przywara #define KVM_CAP_PIT 11 960304dcb64SAndre Przywara #define KVM_CAP_NOP_IO_DELAY 12 961304dcb64SAndre Przywara #define KVM_CAP_PV_MMU 13 962304dcb64SAndre Przywara #define KVM_CAP_MP_STATE 14 963304dcb64SAndre Przywara #define KVM_CAP_COALESCED_MMIO 15 964304dcb64SAndre Przywara #define KVM_CAP_SYNC_MMU 16 /* Changes to host mmap are reflected in guest */ 965304dcb64SAndre Przywara #define KVM_CAP_IOMMU 18 966304dcb64SAndre Przywara /* Bug in KVM_SET_USER_MEMORY_REGION fixed: */ 967304dcb64SAndre Przywara #define KVM_CAP_DESTROY_MEMORY_REGION_WORKS 21 968304dcb64SAndre Przywara #define KVM_CAP_USER_NMI 22 969304dcb64SAndre Przywara #ifdef __KVM_HAVE_GUEST_DEBUG 970304dcb64SAndre Przywara #define KVM_CAP_SET_GUEST_DEBUG 23 971304dcb64SAndre Przywara #endif 972304dcb64SAndre Przywara #ifdef __KVM_HAVE_PIT 973304dcb64SAndre Przywara #define KVM_CAP_REINJECT_CONTROL 24 974304dcb64SAndre Przywara #endif 975304dcb64SAndre Przywara #define KVM_CAP_IRQ_ROUTING 25 976304dcb64SAndre Przywara #define KVM_CAP_IRQ_INJECT_STATUS 26 977304dcb64SAndre Przywara #define KVM_CAP_ASSIGN_DEV_IRQ 29 978304dcb64SAndre Przywara /* Another bug in KVM_SET_USER_MEMORY_REGION fixed: */ 979304dcb64SAndre Przywara #define KVM_CAP_JOIN_MEMORY_REGIONS_WORKS 30 980304dcb64SAndre Przywara #ifdef __KVM_HAVE_MCE 981304dcb64SAndre Przywara #define KVM_CAP_MCE 31 982304dcb64SAndre Przywara #endif 983304dcb64SAndre Przywara #define KVM_CAP_IRQFD 32 984304dcb64SAndre Przywara #ifdef __KVM_HAVE_PIT 985304dcb64SAndre Przywara #define KVM_CAP_PIT2 33 986304dcb64SAndre Przywara #endif 987304dcb64SAndre Przywara #define KVM_CAP_SET_BOOT_CPU_ID 34 988304dcb64SAndre Przywara #ifdef __KVM_HAVE_PIT_STATE2 989304dcb64SAndre Przywara #define KVM_CAP_PIT_STATE2 35 990304dcb64SAndre Przywara #endif 991304dcb64SAndre Przywara #define KVM_CAP_IOEVENTFD 36 992304dcb64SAndre Przywara #define KVM_CAP_SET_IDENTITY_MAP_ADDR 37 993304dcb64SAndre Przywara #ifdef __KVM_HAVE_XEN_HVM 994304dcb64SAndre Przywara #define KVM_CAP_XEN_HVM 38 995304dcb64SAndre Przywara #endif 996304dcb64SAndre Przywara #define KVM_CAP_ADJUST_CLOCK 39 997304dcb64SAndre Przywara #define KVM_CAP_INTERNAL_ERROR_DATA 40 998304dcb64SAndre Przywara #ifdef __KVM_HAVE_VCPU_EVENTS 999304dcb64SAndre Przywara #define KVM_CAP_VCPU_EVENTS 41 1000304dcb64SAndre Przywara #endif 1001304dcb64SAndre Przywara #define KVM_CAP_S390_PSW 42 1002304dcb64SAndre Przywara #define KVM_CAP_PPC_SEGSTATE 43 1003304dcb64SAndre Przywara #define KVM_CAP_HYPERV 44 1004304dcb64SAndre Przywara #define KVM_CAP_HYPERV_VAPIC 45 1005304dcb64SAndre Przywara #define KVM_CAP_HYPERV_SPIN 46 1006304dcb64SAndre Przywara #define KVM_CAP_PCI_SEGMENT 47 1007304dcb64SAndre Przywara #define KVM_CAP_PPC_PAIRED_SINGLES 48 1008304dcb64SAndre Przywara #define KVM_CAP_INTR_SHADOW 49 1009304dcb64SAndre Przywara #ifdef __KVM_HAVE_DEBUGREGS 1010304dcb64SAndre Przywara #define KVM_CAP_DEBUGREGS 50 1011304dcb64SAndre Przywara #endif 1012304dcb64SAndre Przywara #define KVM_CAP_X86_ROBUST_SINGLESTEP 51 1013304dcb64SAndre Przywara #define KVM_CAP_PPC_OSI 52 1014304dcb64SAndre Przywara #define KVM_CAP_PPC_UNSET_IRQ 53 1015304dcb64SAndre Przywara #define KVM_CAP_ENABLE_CAP 54 1016304dcb64SAndre Przywara #ifdef __KVM_HAVE_XSAVE 1017304dcb64SAndre Przywara #define KVM_CAP_XSAVE 55 1018304dcb64SAndre Przywara #endif 1019304dcb64SAndre Przywara #ifdef __KVM_HAVE_XCRS 1020304dcb64SAndre Przywara #define KVM_CAP_XCRS 56 1021304dcb64SAndre Przywara #endif 1022304dcb64SAndre Przywara #define KVM_CAP_PPC_GET_PVINFO 57 1023304dcb64SAndre Przywara #define KVM_CAP_PPC_IRQ_LEVEL 58 1024304dcb64SAndre Przywara #define KVM_CAP_ASYNC_PF 59 1025304dcb64SAndre Przywara #define KVM_CAP_TSC_CONTROL 60 1026304dcb64SAndre Przywara #define KVM_CAP_GET_TSC_KHZ 61 1027304dcb64SAndre Przywara #define KVM_CAP_PPC_BOOKE_SREGS 62 1028304dcb64SAndre Przywara #define KVM_CAP_SPAPR_TCE 63 1029304dcb64SAndre Przywara #define KVM_CAP_PPC_SMT 64 1030304dcb64SAndre Przywara #define KVM_CAP_PPC_RMA 65 1031304dcb64SAndre Przywara #define KVM_CAP_MAX_VCPUS 66 /* returns max vcpus per vm */ 1032304dcb64SAndre Przywara #define KVM_CAP_PPC_HIOR 67 1033304dcb64SAndre Przywara #define KVM_CAP_PPC_PAPR 68 1034304dcb64SAndre Przywara #define KVM_CAP_SW_TLB 69 1035304dcb64SAndre Przywara #define KVM_CAP_ONE_REG 70 1036304dcb64SAndre Przywara #define KVM_CAP_S390_GMAP 71 1037304dcb64SAndre Przywara #define KVM_CAP_TSC_DEADLINE_TIMER 72 1038304dcb64SAndre Przywara #define KVM_CAP_S390_UCONTROL 73 1039304dcb64SAndre Przywara #define KVM_CAP_SYNC_REGS 74 1040304dcb64SAndre Przywara #define KVM_CAP_PCI_2_3 75 1041304dcb64SAndre Przywara #define KVM_CAP_KVMCLOCK_CTRL 76 1042304dcb64SAndre Przywara #define KVM_CAP_SIGNAL_MSI 77 1043304dcb64SAndre Przywara #define KVM_CAP_PPC_GET_SMMU_INFO 78 1044304dcb64SAndre Przywara #define KVM_CAP_S390_COW 79 1045304dcb64SAndre Przywara #define KVM_CAP_PPC_ALLOC_HTAB 80 1046304dcb64SAndre Przywara #define KVM_CAP_READONLY_MEM 81 1047304dcb64SAndre Przywara #define KVM_CAP_IRQFD_RESAMPLE 82 1048304dcb64SAndre Przywara #define KVM_CAP_PPC_BOOKE_WATCHDOG 83 1049304dcb64SAndre Przywara #define KVM_CAP_PPC_HTAB_FD 84 1050304dcb64SAndre Przywara #define KVM_CAP_S390_CSS_SUPPORT 85 1051304dcb64SAndre Przywara #define KVM_CAP_PPC_EPR 86 1052304dcb64SAndre Przywara #define KVM_CAP_ARM_PSCI 87 1053304dcb64SAndre Przywara #define KVM_CAP_ARM_SET_DEVICE_ADDR 88 1054304dcb64SAndre Przywara #define KVM_CAP_DEVICE_CTRL 89 1055304dcb64SAndre Przywara #define KVM_CAP_IRQ_MPIC 90 1056304dcb64SAndre Przywara #define KVM_CAP_PPC_RTAS 91 1057304dcb64SAndre Przywara #define KVM_CAP_IRQ_XICS 92 1058304dcb64SAndre Przywara #define KVM_CAP_ARM_EL1_32BIT 93 1059304dcb64SAndre Przywara #define KVM_CAP_SPAPR_MULTITCE 94 1060304dcb64SAndre Przywara #define KVM_CAP_EXT_EMUL_CPUID 95 1061304dcb64SAndre Przywara #define KVM_CAP_HYPERV_TIME 96 1062304dcb64SAndre Przywara #define KVM_CAP_IOAPIC_POLARITY_IGNORED 97 1063304dcb64SAndre Przywara #define KVM_CAP_ENABLE_CAP_VM 98 1064304dcb64SAndre Przywara #define KVM_CAP_S390_IRQCHIP 99 1065304dcb64SAndre Przywara #define KVM_CAP_IOEVENTFD_NO_LENGTH 100 1066304dcb64SAndre Przywara #define KVM_CAP_VM_ATTRIBUTES 101 1067304dcb64SAndre Przywara #define KVM_CAP_ARM_PSCI_0_2 102 1068304dcb64SAndre Przywara #define KVM_CAP_PPC_FIXUP_HCALL 103 1069304dcb64SAndre Przywara #define KVM_CAP_PPC_ENABLE_HCALL 104 1070304dcb64SAndre Przywara #define KVM_CAP_CHECK_EXTENSION_VM 105 1071304dcb64SAndre Przywara #define KVM_CAP_S390_USER_SIGP 106 1072304dcb64SAndre Przywara #define KVM_CAP_S390_VECTOR_REGISTERS 107 1073304dcb64SAndre Przywara #define KVM_CAP_S390_MEM_OP 108 1074304dcb64SAndre Przywara #define KVM_CAP_S390_USER_STSI 109 1075304dcb64SAndre Przywara #define KVM_CAP_S390_SKEYS 110 1076304dcb64SAndre Przywara #define KVM_CAP_MIPS_FPU 111 1077304dcb64SAndre Przywara #define KVM_CAP_MIPS_MSA 112 1078304dcb64SAndre Przywara #define KVM_CAP_S390_INJECT_IRQ 113 1079304dcb64SAndre Przywara #define KVM_CAP_S390_IRQ_STATE 114 1080304dcb64SAndre Przywara #define KVM_CAP_PPC_HWRNG 115 1081b3f606e1SMarc Zyngier #define KVM_CAP_DISABLE_QUIRKS 116 1082b3f606e1SMarc Zyngier #define KVM_CAP_X86_SMM 117 1083b3f606e1SMarc Zyngier #define KVM_CAP_MULTI_ADDRESS_SPACE 118 1084b3f606e1SMarc Zyngier #define KVM_CAP_GUEST_DEBUG_HW_BPS 119 1085b3f606e1SMarc Zyngier #define KVM_CAP_GUEST_DEBUG_HW_WPS 120 1086b3f606e1SMarc Zyngier #define KVM_CAP_SPLIT_IRQCHIP 121 1087b3f606e1SMarc Zyngier #define KVM_CAP_IOEVENTFD_ANY_LENGTH 122 1088b3f606e1SMarc Zyngier #define KVM_CAP_HYPERV_SYNIC 123 1089b3f606e1SMarc Zyngier #define KVM_CAP_S390_RI 124 1090b37ed70eSAndre Przywara #define KVM_CAP_SPAPR_TCE_64 125 1091b37ed70eSAndre Przywara #define KVM_CAP_ARM_PMU_V3 126 1092b37ed70eSAndre Przywara #define KVM_CAP_VCPU_ATTRIBUTES 127 1093764dfba1SAndre Przywara #define KVM_CAP_MAX_VCPU_ID 128 1094764dfba1SAndre Przywara #define KVM_CAP_X2APIC_API 129 1095764dfba1SAndre Przywara #define KVM_CAP_S390_USER_INSTR0 130 1096764dfba1SAndre Przywara #define KVM_CAP_MSI_DEVID 131 1097764dfba1SAndre Przywara #define KVM_CAP_PPC_HTM 132 1098764dfba1SAndre Przywara #define KVM_CAP_SPAPR_RESIZE_HPT 133 1099764dfba1SAndre Przywara #define KVM_CAP_PPC_MMU_RADIX 134 1100764dfba1SAndre Przywara #define KVM_CAP_PPC_MMU_HASH_V3 135 1101764dfba1SAndre Przywara #define KVM_CAP_IMMEDIATE_EXIT 136 11021bbe92f5SDave Martin #define KVM_CAP_MIPS_VZ 137 11031bbe92f5SDave Martin #define KVM_CAP_MIPS_TE 138 11041bbe92f5SDave Martin #define KVM_CAP_MIPS_64BIT 139 11051bbe92f5SDave Martin #define KVM_CAP_S390_GS 140 11061bbe92f5SDave Martin #define KVM_CAP_S390_AIS 141 11071bbe92f5SDave Martin #define KVM_CAP_SPAPR_TCE_VFIO 142 11081bbe92f5SDave Martin #define KVM_CAP_X86_DISABLE_EXITS 143 11091bbe92f5SDave Martin #define KVM_CAP_ARM_USER_IRQ 144 11101bbe92f5SDave Martin #define KVM_CAP_S390_CMMA_MIGRATION 145 11111bbe92f5SDave Martin #define KVM_CAP_PPC_FWNMI 146 11121bbe92f5SDave Martin #define KVM_CAP_PPC_SMT_POSSIBLE 147 11131bbe92f5SDave Martin #define KVM_CAP_HYPERV_SYNIC2 148 11141bbe92f5SDave Martin #define KVM_CAP_HYPERV_VP_INDEX 149 11151bbe92f5SDave Martin #define KVM_CAP_S390_AIS_MIGRATION 150 11161bbe92f5SDave Martin #define KVM_CAP_PPC_GET_CPU_CHAR 151 11171bbe92f5SDave Martin #define KVM_CAP_S390_BPB 152 11181bbe92f5SDave Martin #define KVM_CAP_GET_MSR_FEATURES 153 11191bbe92f5SDave Martin #define KVM_CAP_HYPERV_EVENTFD 154 11201bbe92f5SDave Martin #define KVM_CAP_HYPERV_TLBFLUSH 155 11211bbe92f5SDave Martin #define KVM_CAP_S390_HPAGE_1M 156 11221bbe92f5SDave Martin #define KVM_CAP_NESTED_STATE 157 11231bbe92f5SDave Martin #define KVM_CAP_ARM_INJECT_SERROR_ESR 158 11241bbe92f5SDave Martin #define KVM_CAP_MSR_PLATFORM_INFO 159 11251bbe92f5SDave Martin #define KVM_CAP_PPC_NESTED_HV 160 11261bbe92f5SDave Martin #define KVM_CAP_HYPERV_SEND_IPI 161 11271bbe92f5SDave Martin #define KVM_CAP_COALESCED_PIO 162 11281bbe92f5SDave Martin #define KVM_CAP_HYPERV_ENLIGHTENED_VMCS 163 11291bbe92f5SDave Martin #define KVM_CAP_EXCEPTION_PAYLOAD 164 11301bbe92f5SDave Martin #define KVM_CAP_ARM_VM_IPA_SIZE 165 113166b24a33SWill Deacon #define KVM_CAP_MANUAL_DIRTY_LOG_PROTECT 166 /* Obsolete */ 11321bbe92f5SDave Martin #define KVM_CAP_HYPERV_CPUID 167 113366b24a33SWill Deacon #define KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2 168 113466b24a33SWill Deacon #define KVM_CAP_PPC_IRQ_XIVE 169 113566b24a33SWill Deacon #define KVM_CAP_ARM_SVE 170 113666b24a33SWill Deacon #define KVM_CAP_ARM_PTRAUTH_ADDRESS 171 113766b24a33SWill Deacon #define KVM_CAP_ARM_PTRAUTH_GENERIC 172 113866b24a33SWill Deacon #define KVM_CAP_PMU_EVENT_FILTER 173 11395968b5ffSAnup Patel #define KVM_CAP_ARM_IRQ_LINE_LAYOUT_2 174 11405968b5ffSAnup Patel #define KVM_CAP_HYPERV_DIRECT_TLBFLUSH 175 11415968b5ffSAnup Patel #define KVM_CAP_PPC_GUEST_DEBUG_SSTEP 176 11425968b5ffSAnup Patel #define KVM_CAP_ARM_NISV_TO_USER 177 11435968b5ffSAnup Patel #define KVM_CAP_ARM_INJECT_EXT_DABT 178 11445968b5ffSAnup Patel #define KVM_CAP_S390_VCPU_RESETS 179 11455968b5ffSAnup Patel #define KVM_CAP_S390_PROTECTED 180 11465968b5ffSAnup Patel #define KVM_CAP_PPC_SECURE_GUEST 181 11475968b5ffSAnup Patel #define KVM_CAP_HALT_POLL 182 11485968b5ffSAnup Patel #define KVM_CAP_ASYNC_PF_INT 183 11495968b5ffSAnup Patel #define KVM_CAP_LAST_CPU 184 11505968b5ffSAnup Patel #define KVM_CAP_SMALLER_MAXPHYADDR 185 11515968b5ffSAnup Patel #define KVM_CAP_S390_DIAG318 186 11525968b5ffSAnup Patel #define KVM_CAP_STEAL_TIME 187 11535968b5ffSAnup Patel #define KVM_CAP_X86_USER_SPACE_MSR 188 11545968b5ffSAnup Patel #define KVM_CAP_X86_MSR_FILTER 189 11555968b5ffSAnup Patel #define KVM_CAP_ENFORCE_PV_FEATURE_CPUID 190 11565968b5ffSAnup Patel #define KVM_CAP_SYS_HYPERV_CPUID 191 11575968b5ffSAnup Patel #define KVM_CAP_DIRTY_LOG_RING 192 11585968b5ffSAnup Patel #define KVM_CAP_X86_BUS_LOCK_EXIT 193 11595968b5ffSAnup Patel #define KVM_CAP_PPC_DAWR1 194 11605968b5ffSAnup Patel #define KVM_CAP_SET_GUEST_DEBUG2 195 11615968b5ffSAnup Patel #define KVM_CAP_SGX_ATTRIBUTE 196 11625968b5ffSAnup Patel #define KVM_CAP_VM_COPY_ENC_CONTEXT_FROM 197 11635968b5ffSAnup Patel #define KVM_CAP_PTP_KVM 198 11645968b5ffSAnup Patel #define KVM_CAP_HYPERV_ENFORCE_CPUID 199 11655968b5ffSAnup Patel #define KVM_CAP_SREGS2 200 11665968b5ffSAnup Patel #define KVM_CAP_EXIT_HYPERCALL 201 11675968b5ffSAnup Patel #define KVM_CAP_PPC_RPT_INVALIDATE 202 11685968b5ffSAnup Patel #define KVM_CAP_BINARY_STATS_FD 203 11695968b5ffSAnup Patel #define KVM_CAP_EXIT_ON_EMULATION_FAILURE 204 11705968b5ffSAnup Patel #define KVM_CAP_ARM_MTE 205 11715968b5ffSAnup Patel #define KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM 206 1172af1b793cSAlexandru Elisei #define KVM_CAP_VM_GPA_BITS 207 1173af1b793cSAlexandru Elisei #define KVM_CAP_XSAVE2 208 1174af1b793cSAlexandru Elisei #define KVM_CAP_SYS_ATTRIBUTES 209 1175af1b793cSAlexandru Elisei #define KVM_CAP_PPC_AIL_MODE_3 210 1176083a976eSAlexandru Elisei #define KVM_CAP_S390_MEM_OP_EXTENSION 211 1177083a976eSAlexandru Elisei #define KVM_CAP_PMU_CAPABILITY 212 1178083a976eSAlexandru Elisei #define KVM_CAP_DISABLE_QUIRKS2 213 11798d0facecSAnup Patel #define KVM_CAP_VM_TSC_CONTROL 214 11808d0facecSAnup Patel #define KVM_CAP_SYSTEM_EVENT_DATA 215 11818d0facecSAnup Patel #define KVM_CAP_ARM_SYSTEM_SUSPEND 216 11828d0facecSAnup Patel #define KVM_CAP_S390_PROTECTED_DUMP 217 11838d0facecSAnup Patel #define KVM_CAP_X86_TRIPLE_FAULT_EVENT 218 11848d0facecSAnup Patel #define KVM_CAP_X86_NOTIFY_VMEXIT 219 11858d0facecSAnup Patel #define KVM_CAP_VM_DISABLE_NX_HUGE_PAGES 220 11868d0facecSAnup Patel #define KVM_CAP_S390_ZPCI_OP 221 11878d0facecSAnup Patel #define KVM_CAP_S390_CPU_TOPOLOGY 222 118876dfc0cfSAnup Patel #define KVM_CAP_DIRTY_LOG_RING_ACQ_REL 223 1189be986824SAnup Patel #define KVM_CAP_S390_PROTECTED_ASYNC_DISABLE 224 1190be986824SAnup Patel #define KVM_CAP_DIRTY_LOG_RING_WITH_BITMAP 225 1191be986824SAnup Patel #define KVM_CAP_PMU_EVENT_MASKED_EVENTS 226 1192be986824SAnup Patel #define KVM_CAP_COUNTER_OFFSET 227 1193*26c85896SAnup Patel #define KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE 228 1194*26c85896SAnup Patel #define KVM_CAP_ARM_SUPPORTED_BLOCK_SIZES 229 1195304dcb64SAndre Przywara 1196304dcb64SAndre Przywara #ifdef KVM_CAP_IRQ_ROUTING 1197304dcb64SAndre Przywara 1198304dcb64SAndre Przywara struct kvm_irq_routing_irqchip { 1199304dcb64SAndre Przywara __u32 irqchip; 1200304dcb64SAndre Przywara __u32 pin; 1201304dcb64SAndre Przywara }; 1202304dcb64SAndre Przywara 1203304dcb64SAndre Przywara struct kvm_irq_routing_msi { 1204304dcb64SAndre Przywara __u32 address_lo; 1205304dcb64SAndre Przywara __u32 address_hi; 1206304dcb64SAndre Przywara __u32 data; 1207764dfba1SAndre Przywara union { 1208304dcb64SAndre Przywara __u32 pad; 1209764dfba1SAndre Przywara __u32 devid; 1210764dfba1SAndre Przywara }; 1211304dcb64SAndre Przywara }; 1212304dcb64SAndre Przywara 1213304dcb64SAndre Przywara struct kvm_irq_routing_s390_adapter { 1214304dcb64SAndre Przywara __u64 ind_addr; 1215304dcb64SAndre Przywara __u64 summary_addr; 1216304dcb64SAndre Przywara __u64 ind_offset; 1217304dcb64SAndre Przywara __u32 summary_offset; 1218304dcb64SAndre Przywara __u32 adapter_id; 1219304dcb64SAndre Przywara }; 1220304dcb64SAndre Przywara 1221b3f606e1SMarc Zyngier struct kvm_irq_routing_hv_sint { 1222b3f606e1SMarc Zyngier __u32 vcpu; 1223b3f606e1SMarc Zyngier __u32 sint; 1224b3f606e1SMarc Zyngier }; 1225b3f606e1SMarc Zyngier 1226af1b793cSAlexandru Elisei struct kvm_irq_routing_xen_evtchn { 1227af1b793cSAlexandru Elisei __u32 port; 1228af1b793cSAlexandru Elisei __u32 vcpu; 1229af1b793cSAlexandru Elisei __u32 priority; 1230af1b793cSAlexandru Elisei }; 1231af1b793cSAlexandru Elisei 1232af1b793cSAlexandru Elisei #define KVM_IRQ_ROUTING_XEN_EVTCHN_PRIO_2LEVEL ((__u32)(-1)) 1233af1b793cSAlexandru Elisei 1234304dcb64SAndre Przywara /* gsi routing entry types */ 1235304dcb64SAndre Przywara #define KVM_IRQ_ROUTING_IRQCHIP 1 1236304dcb64SAndre Przywara #define KVM_IRQ_ROUTING_MSI 2 1237304dcb64SAndre Przywara #define KVM_IRQ_ROUTING_S390_ADAPTER 3 1238b3f606e1SMarc Zyngier #define KVM_IRQ_ROUTING_HV_SINT 4 1239af1b793cSAlexandru Elisei #define KVM_IRQ_ROUTING_XEN_EVTCHN 5 1240304dcb64SAndre Przywara 1241304dcb64SAndre Przywara struct kvm_irq_routing_entry { 1242304dcb64SAndre Przywara __u32 gsi; 1243304dcb64SAndre Przywara __u32 type; 1244304dcb64SAndre Przywara __u32 flags; 1245304dcb64SAndre Przywara __u32 pad; 1246304dcb64SAndre Przywara union { 1247304dcb64SAndre Przywara struct kvm_irq_routing_irqchip irqchip; 1248304dcb64SAndre Przywara struct kvm_irq_routing_msi msi; 1249304dcb64SAndre Przywara struct kvm_irq_routing_s390_adapter adapter; 1250b3f606e1SMarc Zyngier struct kvm_irq_routing_hv_sint hv_sint; 1251af1b793cSAlexandru Elisei struct kvm_irq_routing_xen_evtchn xen_evtchn; 1252304dcb64SAndre Przywara __u32 pad[8]; 1253304dcb64SAndre Przywara } u; 1254304dcb64SAndre Przywara }; 1255304dcb64SAndre Przywara 1256304dcb64SAndre Przywara struct kvm_irq_routing { 1257304dcb64SAndre Przywara __u32 nr; 1258304dcb64SAndre Przywara __u32 flags; 12598d0facecSAnup Patel struct kvm_irq_routing_entry entries[]; 1260304dcb64SAndre Przywara }; 1261304dcb64SAndre Przywara 1262304dcb64SAndre Przywara #endif 1263304dcb64SAndre Przywara 1264304dcb64SAndre Przywara #ifdef KVM_CAP_MCE 1265304dcb64SAndre Przywara /* x86 MCE */ 1266304dcb64SAndre Przywara struct kvm_x86_mce { 1267304dcb64SAndre Przywara __u64 status; 1268304dcb64SAndre Przywara __u64 addr; 1269304dcb64SAndre Przywara __u64 misc; 1270304dcb64SAndre Przywara __u64 mcg_status; 1271304dcb64SAndre Przywara __u8 bank; 1272304dcb64SAndre Przywara __u8 pad1[7]; 1273304dcb64SAndre Przywara __u64 pad2[3]; 1274304dcb64SAndre Przywara }; 1275304dcb64SAndre Przywara #endif 1276304dcb64SAndre Przywara 1277304dcb64SAndre Przywara #ifdef KVM_CAP_XEN_HVM 12785968b5ffSAnup Patel #define KVM_XEN_HVM_CONFIG_HYPERCALL_MSR (1 << 0) 12795968b5ffSAnup Patel #define KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL (1 << 1) 12805968b5ffSAnup Patel #define KVM_XEN_HVM_CONFIG_SHARED_INFO (1 << 2) 12815968b5ffSAnup Patel #define KVM_XEN_HVM_CONFIG_RUNSTATE (1 << 3) 1282af1b793cSAlexandru Elisei #define KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL (1 << 4) 12838d0facecSAnup Patel #define KVM_XEN_HVM_CONFIG_EVTCHN_SEND (1 << 5) 1284be986824SAnup Patel #define KVM_XEN_HVM_CONFIG_RUNSTATE_UPDATE_FLAG (1 << 6) 12855968b5ffSAnup Patel 1286304dcb64SAndre Przywara struct kvm_xen_hvm_config { 1287304dcb64SAndre Przywara __u32 flags; 1288304dcb64SAndre Przywara __u32 msr; 1289304dcb64SAndre Przywara __u64 blob_addr_32; 1290304dcb64SAndre Przywara __u64 blob_addr_64; 1291304dcb64SAndre Przywara __u8 blob_size_32; 1292304dcb64SAndre Przywara __u8 blob_size_64; 1293304dcb64SAndre Przywara __u8 pad2[30]; 1294304dcb64SAndre Przywara }; 1295304dcb64SAndre Przywara #endif 1296304dcb64SAndre Przywara 1297304dcb64SAndre Przywara #define KVM_IRQFD_FLAG_DEASSIGN (1 << 0) 1298304dcb64SAndre Przywara /* 1299304dcb64SAndre Przywara * Available with KVM_CAP_IRQFD_RESAMPLE 1300304dcb64SAndre Przywara * 1301304dcb64SAndre Przywara * KVM_IRQFD_FLAG_RESAMPLE indicates resamplefd is valid and specifies 1302304dcb64SAndre Przywara * the irqfd to operate in resampling mode for level triggered interrupt 13035968b5ffSAnup Patel * emulation. See Documentation/virt/kvm/api.rst. 1304304dcb64SAndre Przywara */ 1305304dcb64SAndre Przywara #define KVM_IRQFD_FLAG_RESAMPLE (1 << 1) 1306304dcb64SAndre Przywara 1307304dcb64SAndre Przywara struct kvm_irqfd { 1308304dcb64SAndre Przywara __u32 fd; 1309304dcb64SAndre Przywara __u32 gsi; 1310304dcb64SAndre Przywara __u32 flags; 1311304dcb64SAndre Przywara __u32 resamplefd; 1312304dcb64SAndre Przywara __u8 pad[16]; 1313304dcb64SAndre Przywara }; 1314304dcb64SAndre Przywara 1315764dfba1SAndre Przywara /* For KVM_CAP_ADJUST_CLOCK */ 1316764dfba1SAndre Przywara 1317764dfba1SAndre Przywara /* Do not use 1, KVM_CHECK_EXTENSION returned it before we had flags. */ 1318764dfba1SAndre Przywara #define KVM_CLOCK_TSC_STABLE 2 13195968b5ffSAnup Patel #define KVM_CLOCK_REALTIME (1 << 2) 13205968b5ffSAnup Patel #define KVM_CLOCK_HOST_TSC (1 << 3) 1321764dfba1SAndre Przywara 1322304dcb64SAndre Przywara struct kvm_clock_data { 1323304dcb64SAndre Przywara __u64 clock; 1324304dcb64SAndre Przywara __u32 flags; 13255968b5ffSAnup Patel __u32 pad0; 13265968b5ffSAnup Patel __u64 realtime; 13275968b5ffSAnup Patel __u64 host_tsc; 13285968b5ffSAnup Patel __u32 pad[4]; 1329304dcb64SAndre Przywara }; 1330304dcb64SAndre Przywara 1331764dfba1SAndre Przywara /* For KVM_CAP_SW_TLB */ 1332764dfba1SAndre Przywara 1333304dcb64SAndre Przywara #define KVM_MMU_FSL_BOOKE_NOHV 0 1334304dcb64SAndre Przywara #define KVM_MMU_FSL_BOOKE_HV 1 1335304dcb64SAndre Przywara 1336304dcb64SAndre Przywara struct kvm_config_tlb { 1337304dcb64SAndre Przywara __u64 params; 1338304dcb64SAndre Przywara __u64 array; 1339304dcb64SAndre Przywara __u32 mmu_type; 1340304dcb64SAndre Przywara __u32 array_len; 1341304dcb64SAndre Przywara }; 1342304dcb64SAndre Przywara 1343304dcb64SAndre Przywara struct kvm_dirty_tlb { 1344304dcb64SAndre Przywara __u64 bitmap; 1345304dcb64SAndre Przywara __u32 num_dirty; 1346304dcb64SAndre Przywara }; 1347304dcb64SAndre Przywara 1348304dcb64SAndre Przywara /* Available with KVM_CAP_ONE_REG */ 1349304dcb64SAndre Przywara 1350304dcb64SAndre Przywara #define KVM_REG_ARCH_MASK 0xff00000000000000ULL 1351304dcb64SAndre Przywara #define KVM_REG_GENERIC 0x0000000000000000ULL 1352304dcb64SAndre Przywara 1353304dcb64SAndre Przywara /* 1354304dcb64SAndre Przywara * Architecture specific registers are to be defined in arch headers and 1355304dcb64SAndre Przywara * ORed with the arch identifier. 1356304dcb64SAndre Przywara */ 1357304dcb64SAndre Przywara #define KVM_REG_PPC 0x1000000000000000ULL 1358304dcb64SAndre Przywara #define KVM_REG_X86 0x2000000000000000ULL 1359304dcb64SAndre Przywara #define KVM_REG_IA64 0x3000000000000000ULL 1360304dcb64SAndre Przywara #define KVM_REG_ARM 0x4000000000000000ULL 1361304dcb64SAndre Przywara #define KVM_REG_S390 0x5000000000000000ULL 1362304dcb64SAndre Przywara #define KVM_REG_ARM64 0x6000000000000000ULL 1363304dcb64SAndre Przywara #define KVM_REG_MIPS 0x7000000000000000ULL 13645968b5ffSAnup Patel #define KVM_REG_RISCV 0x8000000000000000ULL 1365304dcb64SAndre Przywara 1366304dcb64SAndre Przywara #define KVM_REG_SIZE_SHIFT 52 1367304dcb64SAndre Przywara #define KVM_REG_SIZE_MASK 0x00f0000000000000ULL 1368304dcb64SAndre Przywara #define KVM_REG_SIZE_U8 0x0000000000000000ULL 1369304dcb64SAndre Przywara #define KVM_REG_SIZE_U16 0x0010000000000000ULL 1370304dcb64SAndre Przywara #define KVM_REG_SIZE_U32 0x0020000000000000ULL 1371304dcb64SAndre Przywara #define KVM_REG_SIZE_U64 0x0030000000000000ULL 1372304dcb64SAndre Przywara #define KVM_REG_SIZE_U128 0x0040000000000000ULL 1373304dcb64SAndre Przywara #define KVM_REG_SIZE_U256 0x0050000000000000ULL 1374304dcb64SAndre Przywara #define KVM_REG_SIZE_U512 0x0060000000000000ULL 1375304dcb64SAndre Przywara #define KVM_REG_SIZE_U1024 0x0070000000000000ULL 137666b24a33SWill Deacon #define KVM_REG_SIZE_U2048 0x0080000000000000ULL 1377304dcb64SAndre Przywara 1378304dcb64SAndre Przywara struct kvm_reg_list { 1379304dcb64SAndre Przywara __u64 n; /* number of regs */ 13808d0facecSAnup Patel __u64 reg[]; 1381304dcb64SAndre Przywara }; 1382304dcb64SAndre Przywara 1383304dcb64SAndre Przywara struct kvm_one_reg { 1384304dcb64SAndre Przywara __u64 id; 1385304dcb64SAndre Przywara __u64 addr; 1386304dcb64SAndre Przywara }; 1387304dcb64SAndre Przywara 1388764dfba1SAndre Przywara #define KVM_MSI_VALID_DEVID (1U << 0) 1389304dcb64SAndre Przywara struct kvm_msi { 1390304dcb64SAndre Przywara __u32 address_lo; 1391304dcb64SAndre Przywara __u32 address_hi; 1392304dcb64SAndre Przywara __u32 data; 1393304dcb64SAndre Przywara __u32 flags; 1394764dfba1SAndre Przywara __u32 devid; 1395764dfba1SAndre Przywara __u8 pad[12]; 1396304dcb64SAndre Przywara }; 1397304dcb64SAndre Przywara 1398304dcb64SAndre Przywara struct kvm_arm_device_addr { 1399304dcb64SAndre Przywara __u64 id; 1400304dcb64SAndre Przywara __u64 addr; 1401304dcb64SAndre Przywara }; 1402304dcb64SAndre Przywara 1403304dcb64SAndre Przywara /* 1404304dcb64SAndre Przywara * Device control API, available with KVM_CAP_DEVICE_CTRL 1405304dcb64SAndre Przywara */ 1406304dcb64SAndre Przywara #define KVM_CREATE_DEVICE_TEST 1 1407304dcb64SAndre Przywara 1408304dcb64SAndre Przywara struct kvm_create_device { 1409304dcb64SAndre Przywara __u32 type; /* in: KVM_DEV_TYPE_xxx */ 1410304dcb64SAndre Przywara __u32 fd; /* out: device handle */ 1411304dcb64SAndre Przywara __u32 flags; /* in: KVM_CREATE_DEVICE_xxx */ 1412304dcb64SAndre Przywara }; 1413304dcb64SAndre Przywara 1414304dcb64SAndre Przywara struct kvm_device_attr { 1415304dcb64SAndre Przywara __u32 flags; /* no flags currently defined */ 1416304dcb64SAndre Przywara __u32 group; /* device-defined */ 1417304dcb64SAndre Przywara __u64 attr; /* group-defined */ 1418304dcb64SAndre Przywara __u64 addr; /* userspace address of attr data */ 1419304dcb64SAndre Przywara }; 1420304dcb64SAndre Przywara 1421*26c85896SAnup Patel #define KVM_DEV_VFIO_FILE 1 1422*26c85896SAnup Patel 1423*26c85896SAnup Patel #define KVM_DEV_VFIO_FILE_ADD 1 1424*26c85896SAnup Patel #define KVM_DEV_VFIO_FILE_DEL 2 1425*26c85896SAnup Patel 1426*26c85896SAnup Patel /* KVM_DEV_VFIO_GROUP aliases are for compile time uapi compatibility */ 1427*26c85896SAnup Patel #define KVM_DEV_VFIO_GROUP KVM_DEV_VFIO_FILE 1428*26c85896SAnup Patel 1429*26c85896SAnup Patel #define KVM_DEV_VFIO_GROUP_ADD KVM_DEV_VFIO_FILE_ADD 1430*26c85896SAnup Patel #define KVM_DEV_VFIO_GROUP_DEL KVM_DEV_VFIO_FILE_DEL 14311bbe92f5SDave Martin #define KVM_DEV_VFIO_GROUP_SET_SPAPR_TCE 3 1432304dcb64SAndre Przywara 1433304dcb64SAndre Przywara enum kvm_device_type { 1434304dcb64SAndre Przywara KVM_DEV_TYPE_FSL_MPIC_20 = 1, 1435304dcb64SAndre Przywara #define KVM_DEV_TYPE_FSL_MPIC_20 KVM_DEV_TYPE_FSL_MPIC_20 1436304dcb64SAndre Przywara KVM_DEV_TYPE_FSL_MPIC_42, 1437304dcb64SAndre Przywara #define KVM_DEV_TYPE_FSL_MPIC_42 KVM_DEV_TYPE_FSL_MPIC_42 1438304dcb64SAndre Przywara KVM_DEV_TYPE_XICS, 1439304dcb64SAndre Przywara #define KVM_DEV_TYPE_XICS KVM_DEV_TYPE_XICS 1440304dcb64SAndre Przywara KVM_DEV_TYPE_VFIO, 1441304dcb64SAndre Przywara #define KVM_DEV_TYPE_VFIO KVM_DEV_TYPE_VFIO 1442304dcb64SAndre Przywara KVM_DEV_TYPE_ARM_VGIC_V2, 1443304dcb64SAndre Przywara #define KVM_DEV_TYPE_ARM_VGIC_V2 KVM_DEV_TYPE_ARM_VGIC_V2 1444304dcb64SAndre Przywara KVM_DEV_TYPE_FLIC, 1445304dcb64SAndre Przywara #define KVM_DEV_TYPE_FLIC KVM_DEV_TYPE_FLIC 1446304dcb64SAndre Przywara KVM_DEV_TYPE_ARM_VGIC_V3, 1447304dcb64SAndre Przywara #define KVM_DEV_TYPE_ARM_VGIC_V3 KVM_DEV_TYPE_ARM_VGIC_V3 1448764dfba1SAndre Przywara KVM_DEV_TYPE_ARM_VGIC_ITS, 1449764dfba1SAndre Przywara #define KVM_DEV_TYPE_ARM_VGIC_ITS KVM_DEV_TYPE_ARM_VGIC_ITS 145066b24a33SWill Deacon KVM_DEV_TYPE_XIVE, 145166b24a33SWill Deacon #define KVM_DEV_TYPE_XIVE KVM_DEV_TYPE_XIVE 14525968b5ffSAnup Patel KVM_DEV_TYPE_ARM_PV_TIME, 14535968b5ffSAnup Patel #define KVM_DEV_TYPE_ARM_PV_TIME KVM_DEV_TYPE_ARM_PV_TIME 1454*26c85896SAnup Patel KVM_DEV_TYPE_RISCV_AIA, 1455*26c85896SAnup Patel #define KVM_DEV_TYPE_RISCV_AIA KVM_DEV_TYPE_RISCV_AIA 1456304dcb64SAndre Przywara KVM_DEV_TYPE_MAX, 1457304dcb64SAndre Przywara }; 1458304dcb64SAndre Przywara 14591bbe92f5SDave Martin struct kvm_vfio_spapr_tce { 14601bbe92f5SDave Martin __s32 groupfd; 14611bbe92f5SDave Martin __s32 tablefd; 14621bbe92f5SDave Martin }; 14631bbe92f5SDave Martin 1464304dcb64SAndre Przywara /* 1465304dcb64SAndre Przywara * KVM_CREATE_VCPU receives as a parameter the vcpu slot, and returns 1466304dcb64SAndre Przywara * a vcpu fd. 1467304dcb64SAndre Przywara */ 1468304dcb64SAndre Przywara #define KVM_CREATE_VCPU _IO(KVMIO, 0x41) 1469304dcb64SAndre Przywara #define KVM_GET_DIRTY_LOG _IOW(KVMIO, 0x42, struct kvm_dirty_log) 1470304dcb64SAndre Przywara #define KVM_SET_NR_MMU_PAGES _IO(KVMIO, 0x44) 1471be986824SAnup Patel #define KVM_GET_NR_MMU_PAGES _IO(KVMIO, 0x45) /* deprecated */ 1472304dcb64SAndre Przywara #define KVM_SET_USER_MEMORY_REGION _IOW(KVMIO, 0x46, \ 1473304dcb64SAndre Przywara struct kvm_userspace_memory_region) 1474304dcb64SAndre Przywara #define KVM_SET_TSS_ADDR _IO(KVMIO, 0x47) 1475304dcb64SAndre Przywara #define KVM_SET_IDENTITY_MAP_ADDR _IOW(KVMIO, 0x48, __u64) 1476304dcb64SAndre Przywara 1477304dcb64SAndre Przywara /* enable ucontrol for s390 */ 1478304dcb64SAndre Przywara struct kvm_s390_ucas_mapping { 1479304dcb64SAndre Przywara __u64 user_addr; 1480304dcb64SAndre Przywara __u64 vcpu_addr; 1481304dcb64SAndre Przywara __u64 length; 1482304dcb64SAndre Przywara }; 1483304dcb64SAndre Przywara #define KVM_S390_UCAS_MAP _IOW(KVMIO, 0x50, struct kvm_s390_ucas_mapping) 1484304dcb64SAndre Przywara #define KVM_S390_UCAS_UNMAP _IOW(KVMIO, 0x51, struct kvm_s390_ucas_mapping) 1485304dcb64SAndre Przywara #define KVM_S390_VCPU_FAULT _IOW(KVMIO, 0x52, unsigned long) 1486304dcb64SAndre Przywara 1487304dcb64SAndre Przywara /* Device model IOC */ 1488304dcb64SAndre Przywara #define KVM_CREATE_IRQCHIP _IO(KVMIO, 0x60) 1489304dcb64SAndre Przywara #define KVM_IRQ_LINE _IOW(KVMIO, 0x61, struct kvm_irq_level) 1490304dcb64SAndre Przywara #define KVM_GET_IRQCHIP _IOWR(KVMIO, 0x62, struct kvm_irqchip) 1491304dcb64SAndre Przywara #define KVM_SET_IRQCHIP _IOR(KVMIO, 0x63, struct kvm_irqchip) 1492304dcb64SAndre Przywara #define KVM_CREATE_PIT _IO(KVMIO, 0x64) 1493304dcb64SAndre Przywara #define KVM_GET_PIT _IOWR(KVMIO, 0x65, struct kvm_pit_state) 1494304dcb64SAndre Przywara #define KVM_SET_PIT _IOR(KVMIO, 0x66, struct kvm_pit_state) 1495304dcb64SAndre Przywara #define KVM_IRQ_LINE_STATUS _IOWR(KVMIO, 0x67, struct kvm_irq_level) 1496304dcb64SAndre Przywara #define KVM_REGISTER_COALESCED_MMIO \ 1497304dcb64SAndre Przywara _IOW(KVMIO, 0x67, struct kvm_coalesced_mmio_zone) 1498304dcb64SAndre Przywara #define KVM_UNREGISTER_COALESCED_MMIO \ 1499304dcb64SAndre Przywara _IOW(KVMIO, 0x68, struct kvm_coalesced_mmio_zone) 1500304dcb64SAndre Przywara #define KVM_ASSIGN_PCI_DEVICE _IOR(KVMIO, 0x69, \ 1501304dcb64SAndre Przywara struct kvm_assigned_pci_dev) 1502304dcb64SAndre Przywara #define KVM_SET_GSI_ROUTING _IOW(KVMIO, 0x6a, struct kvm_irq_routing) 1503304dcb64SAndre Przywara /* deprecated, replaced by KVM_ASSIGN_DEV_IRQ */ 1504304dcb64SAndre Przywara #define KVM_ASSIGN_IRQ __KVM_DEPRECATED_VM_R_0x70 1505304dcb64SAndre Przywara #define KVM_ASSIGN_DEV_IRQ _IOW(KVMIO, 0x70, struct kvm_assigned_irq) 1506304dcb64SAndre Przywara #define KVM_REINJECT_CONTROL _IO(KVMIO, 0x71) 1507304dcb64SAndre Przywara #define KVM_DEASSIGN_PCI_DEVICE _IOW(KVMIO, 0x72, \ 1508304dcb64SAndre Przywara struct kvm_assigned_pci_dev) 1509304dcb64SAndre Przywara #define KVM_ASSIGN_SET_MSIX_NR _IOW(KVMIO, 0x73, \ 1510304dcb64SAndre Przywara struct kvm_assigned_msix_nr) 1511304dcb64SAndre Przywara #define KVM_ASSIGN_SET_MSIX_ENTRY _IOW(KVMIO, 0x74, \ 1512304dcb64SAndre Przywara struct kvm_assigned_msix_entry) 1513304dcb64SAndre Przywara #define KVM_DEASSIGN_DEV_IRQ _IOW(KVMIO, 0x75, struct kvm_assigned_irq) 1514304dcb64SAndre Przywara #define KVM_IRQFD _IOW(KVMIO, 0x76, struct kvm_irqfd) 1515304dcb64SAndre Przywara #define KVM_CREATE_PIT2 _IOW(KVMIO, 0x77, struct kvm_pit_config) 1516304dcb64SAndre Przywara #define KVM_SET_BOOT_CPU_ID _IO(KVMIO, 0x78) 1517304dcb64SAndre Przywara #define KVM_IOEVENTFD _IOW(KVMIO, 0x79, struct kvm_ioeventfd) 1518304dcb64SAndre Przywara #define KVM_XEN_HVM_CONFIG _IOW(KVMIO, 0x7a, struct kvm_xen_hvm_config) 1519304dcb64SAndre Przywara #define KVM_SET_CLOCK _IOW(KVMIO, 0x7b, struct kvm_clock_data) 1520304dcb64SAndre Przywara #define KVM_GET_CLOCK _IOR(KVMIO, 0x7c, struct kvm_clock_data) 1521304dcb64SAndre Przywara /* Available with KVM_CAP_PIT_STATE2 */ 1522304dcb64SAndre Przywara #define KVM_GET_PIT2 _IOR(KVMIO, 0x9f, struct kvm_pit_state2) 1523304dcb64SAndre Przywara #define KVM_SET_PIT2 _IOW(KVMIO, 0xa0, struct kvm_pit_state2) 1524304dcb64SAndre Przywara /* Available with KVM_CAP_PPC_GET_PVINFO */ 1525304dcb64SAndre Przywara #define KVM_PPC_GET_PVINFO _IOW(KVMIO, 0xa1, struct kvm_ppc_pvinfo) 15268d0facecSAnup Patel /* Available with KVM_CAP_TSC_CONTROL for a vCPU, or with 15278d0facecSAnup Patel * KVM_CAP_VM_TSC_CONTROL to set defaults for a VM */ 1528304dcb64SAndre Przywara #define KVM_SET_TSC_KHZ _IO(KVMIO, 0xa2) 1529304dcb64SAndre Przywara #define KVM_GET_TSC_KHZ _IO(KVMIO, 0xa3) 1530304dcb64SAndre Przywara /* Available with KVM_CAP_PCI_2_3 */ 1531304dcb64SAndre Przywara #define KVM_ASSIGN_SET_INTX_MASK _IOW(KVMIO, 0xa4, \ 1532304dcb64SAndre Przywara struct kvm_assigned_pci_dev) 1533304dcb64SAndre Przywara /* Available with KVM_CAP_SIGNAL_MSI */ 1534304dcb64SAndre Przywara #define KVM_SIGNAL_MSI _IOW(KVMIO, 0xa5, struct kvm_msi) 1535304dcb64SAndre Przywara /* Available with KVM_CAP_PPC_GET_SMMU_INFO */ 1536304dcb64SAndre Przywara #define KVM_PPC_GET_SMMU_INFO _IOR(KVMIO, 0xa6, struct kvm_ppc_smmu_info) 1537304dcb64SAndre Przywara /* Available with KVM_CAP_PPC_ALLOC_HTAB */ 1538304dcb64SAndre Przywara #define KVM_PPC_ALLOCATE_HTAB _IOWR(KVMIO, 0xa7, __u32) 1539304dcb64SAndre Przywara #define KVM_CREATE_SPAPR_TCE _IOW(KVMIO, 0xa8, struct kvm_create_spapr_tce) 1540b37ed70eSAndre Przywara #define KVM_CREATE_SPAPR_TCE_64 _IOW(KVMIO, 0xa8, \ 1541b37ed70eSAndre Przywara struct kvm_create_spapr_tce_64) 1542304dcb64SAndre Przywara /* Available with KVM_CAP_RMA */ 1543304dcb64SAndre Przywara #define KVM_ALLOCATE_RMA _IOR(KVMIO, 0xa9, struct kvm_allocate_rma) 1544304dcb64SAndre Przywara /* Available with KVM_CAP_PPC_HTAB_FD */ 1545304dcb64SAndre Przywara #define KVM_PPC_GET_HTAB_FD _IOW(KVMIO, 0xaa, struct kvm_get_htab_fd) 1546304dcb64SAndre Przywara /* Available with KVM_CAP_ARM_SET_DEVICE_ADDR */ 1547304dcb64SAndre Przywara #define KVM_ARM_SET_DEVICE_ADDR _IOW(KVMIO, 0xab, struct kvm_arm_device_addr) 1548304dcb64SAndre Przywara /* Available with KVM_CAP_PPC_RTAS */ 1549304dcb64SAndre Przywara #define KVM_PPC_RTAS_DEFINE_TOKEN _IOW(KVMIO, 0xac, struct kvm_rtas_token_args) 1550764dfba1SAndre Przywara /* Available with KVM_CAP_SPAPR_RESIZE_HPT */ 1551764dfba1SAndre Przywara #define KVM_PPC_RESIZE_HPT_PREPARE _IOR(KVMIO, 0xad, struct kvm_ppc_resize_hpt) 1552764dfba1SAndre Przywara #define KVM_PPC_RESIZE_HPT_COMMIT _IOR(KVMIO, 0xae, struct kvm_ppc_resize_hpt) 1553764dfba1SAndre Przywara /* Available with KVM_CAP_PPC_RADIX_MMU or KVM_CAP_PPC_HASH_MMU_V3 */ 1554764dfba1SAndre Przywara #define KVM_PPC_CONFIGURE_V3_MMU _IOW(KVMIO, 0xaf, struct kvm_ppc_mmuv3_cfg) 1555764dfba1SAndre Przywara /* Available with KVM_CAP_PPC_RADIX_MMU */ 1556764dfba1SAndre Przywara #define KVM_PPC_GET_RMMU_INFO _IOW(KVMIO, 0xb0, struct kvm_ppc_rmmu_info) 15571bbe92f5SDave Martin /* Available with KVM_CAP_PPC_GET_CPU_CHAR */ 15581bbe92f5SDave Martin #define KVM_PPC_GET_CPU_CHAR _IOR(KVMIO, 0xb1, struct kvm_ppc_cpu_char) 155966b24a33SWill Deacon /* Available with KVM_CAP_PMU_EVENT_FILTER */ 156066b24a33SWill Deacon #define KVM_SET_PMU_EVENT_FILTER _IOW(KVMIO, 0xb2, struct kvm_pmu_event_filter) 15615968b5ffSAnup Patel #define KVM_PPC_SVM_OFF _IO(KVMIO, 0xb3) 15625968b5ffSAnup Patel #define KVM_ARM_MTE_COPY_TAGS _IOR(KVMIO, 0xb4, struct kvm_arm_copy_mte_tags) 1563be986824SAnup Patel /* Available with KVM_CAP_COUNTER_OFFSET */ 1564be986824SAnup Patel #define KVM_ARM_SET_COUNTER_OFFSET _IOW(KVMIO, 0xb5, struct kvm_arm_counter_offset) 1565304dcb64SAndre Przywara 1566304dcb64SAndre Przywara /* ioctl for vm fd */ 1567304dcb64SAndre Przywara #define KVM_CREATE_DEVICE _IOWR(KVMIO, 0xe0, struct kvm_create_device) 1568304dcb64SAndre Przywara 1569304dcb64SAndre Przywara /* ioctls for fds returned by KVM_CREATE_DEVICE */ 1570304dcb64SAndre Przywara #define KVM_SET_DEVICE_ATTR _IOW(KVMIO, 0xe1, struct kvm_device_attr) 1571304dcb64SAndre Przywara #define KVM_GET_DEVICE_ATTR _IOW(KVMIO, 0xe2, struct kvm_device_attr) 1572304dcb64SAndre Przywara #define KVM_HAS_DEVICE_ATTR _IOW(KVMIO, 0xe3, struct kvm_device_attr) 1573304dcb64SAndre Przywara 1574304dcb64SAndre Przywara /* 1575304dcb64SAndre Przywara * ioctls for vcpu fds 1576304dcb64SAndre Przywara */ 1577304dcb64SAndre Przywara #define KVM_RUN _IO(KVMIO, 0x80) 1578304dcb64SAndre Przywara #define KVM_GET_REGS _IOR(KVMIO, 0x81, struct kvm_regs) 1579304dcb64SAndre Przywara #define KVM_SET_REGS _IOW(KVMIO, 0x82, struct kvm_regs) 1580304dcb64SAndre Przywara #define KVM_GET_SREGS _IOR(KVMIO, 0x83, struct kvm_sregs) 1581304dcb64SAndre Przywara #define KVM_SET_SREGS _IOW(KVMIO, 0x84, struct kvm_sregs) 1582304dcb64SAndre Przywara #define KVM_TRANSLATE _IOWR(KVMIO, 0x85, struct kvm_translation) 1583304dcb64SAndre Przywara #define KVM_INTERRUPT _IOW(KVMIO, 0x86, struct kvm_interrupt) 1584304dcb64SAndre Przywara /* KVM_DEBUG_GUEST is no longer supported, use KVM_SET_GUEST_DEBUG instead */ 1585304dcb64SAndre Przywara #define KVM_DEBUG_GUEST __KVM_DEPRECATED_VCPU_W_0x87 1586304dcb64SAndre Przywara #define KVM_GET_MSRS _IOWR(KVMIO, 0x88, struct kvm_msrs) 1587304dcb64SAndre Przywara #define KVM_SET_MSRS _IOW(KVMIO, 0x89, struct kvm_msrs) 1588304dcb64SAndre Przywara #define KVM_SET_CPUID _IOW(KVMIO, 0x8a, struct kvm_cpuid) 1589304dcb64SAndre Przywara #define KVM_SET_SIGNAL_MASK _IOW(KVMIO, 0x8b, struct kvm_signal_mask) 1590304dcb64SAndre Przywara #define KVM_GET_FPU _IOR(KVMIO, 0x8c, struct kvm_fpu) 1591304dcb64SAndre Przywara #define KVM_SET_FPU _IOW(KVMIO, 0x8d, struct kvm_fpu) 1592304dcb64SAndre Przywara #define KVM_GET_LAPIC _IOR(KVMIO, 0x8e, struct kvm_lapic_state) 1593304dcb64SAndre Przywara #define KVM_SET_LAPIC _IOW(KVMIO, 0x8f, struct kvm_lapic_state) 1594304dcb64SAndre Przywara #define KVM_SET_CPUID2 _IOW(KVMIO, 0x90, struct kvm_cpuid2) 1595304dcb64SAndre Przywara #define KVM_GET_CPUID2 _IOWR(KVMIO, 0x91, struct kvm_cpuid2) 1596304dcb64SAndre Przywara /* Available with KVM_CAP_VAPIC */ 1597304dcb64SAndre Przywara #define KVM_TPR_ACCESS_REPORTING _IOWR(KVMIO, 0x92, struct kvm_tpr_access_ctl) 1598304dcb64SAndre Przywara /* Available with KVM_CAP_VAPIC */ 1599304dcb64SAndre Przywara #define KVM_SET_VAPIC_ADDR _IOW(KVMIO, 0x93, struct kvm_vapic_addr) 1600304dcb64SAndre Przywara /* valid for virtual machine (for floating interrupt)_and_ vcpu */ 1601304dcb64SAndre Przywara #define KVM_S390_INTERRUPT _IOW(KVMIO, 0x94, struct kvm_s390_interrupt) 1602304dcb64SAndre Przywara /* store status for s390 */ 1603304dcb64SAndre Przywara #define KVM_S390_STORE_STATUS_NOADDR (-1ul) 1604304dcb64SAndre Przywara #define KVM_S390_STORE_STATUS_PREFIXED (-2ul) 1605304dcb64SAndre Przywara #define KVM_S390_STORE_STATUS _IOW(KVMIO, 0x95, unsigned long) 1606304dcb64SAndre Przywara /* initial ipl psw for s390 */ 1607304dcb64SAndre Przywara #define KVM_S390_SET_INITIAL_PSW _IOW(KVMIO, 0x96, struct kvm_s390_psw) 1608304dcb64SAndre Przywara /* initial reset for s390 */ 1609304dcb64SAndre Przywara #define KVM_S390_INITIAL_RESET _IO(KVMIO, 0x97) 1610304dcb64SAndre Przywara #define KVM_GET_MP_STATE _IOR(KVMIO, 0x98, struct kvm_mp_state) 1611304dcb64SAndre Przywara #define KVM_SET_MP_STATE _IOW(KVMIO, 0x99, struct kvm_mp_state) 1612304dcb64SAndre Przywara /* Available with KVM_CAP_USER_NMI */ 1613304dcb64SAndre Przywara #define KVM_NMI _IO(KVMIO, 0x9a) 1614304dcb64SAndre Przywara /* Available with KVM_CAP_SET_GUEST_DEBUG */ 1615304dcb64SAndre Przywara #define KVM_SET_GUEST_DEBUG _IOW(KVMIO, 0x9b, struct kvm_guest_debug) 1616304dcb64SAndre Przywara /* MCE for x86 */ 1617304dcb64SAndre Przywara #define KVM_X86_SETUP_MCE _IOW(KVMIO, 0x9c, __u64) 1618304dcb64SAndre Przywara #define KVM_X86_GET_MCE_CAP_SUPPORTED _IOR(KVMIO, 0x9d, __u64) 1619304dcb64SAndre Przywara #define KVM_X86_SET_MCE _IOW(KVMIO, 0x9e, struct kvm_x86_mce) 1620304dcb64SAndre Przywara /* Available with KVM_CAP_VCPU_EVENTS */ 1621304dcb64SAndre Przywara #define KVM_GET_VCPU_EVENTS _IOR(KVMIO, 0x9f, struct kvm_vcpu_events) 1622304dcb64SAndre Przywara #define KVM_SET_VCPU_EVENTS _IOW(KVMIO, 0xa0, struct kvm_vcpu_events) 1623304dcb64SAndre Przywara /* Available with KVM_CAP_DEBUGREGS */ 1624304dcb64SAndre Przywara #define KVM_GET_DEBUGREGS _IOR(KVMIO, 0xa1, struct kvm_debugregs) 1625304dcb64SAndre Przywara #define KVM_SET_DEBUGREGS _IOW(KVMIO, 0xa2, struct kvm_debugregs) 1626304dcb64SAndre Przywara /* 1627*26c85896SAnup Patel * vcpu version available with KVM_CAP_ENABLE_CAP 1628304dcb64SAndre Przywara * vm version available with KVM_CAP_ENABLE_CAP_VM 1629304dcb64SAndre Przywara */ 1630304dcb64SAndre Przywara #define KVM_ENABLE_CAP _IOW(KVMIO, 0xa3, struct kvm_enable_cap) 1631304dcb64SAndre Przywara /* Available with KVM_CAP_XSAVE */ 1632304dcb64SAndre Przywara #define KVM_GET_XSAVE _IOR(KVMIO, 0xa4, struct kvm_xsave) 1633304dcb64SAndre Przywara #define KVM_SET_XSAVE _IOW(KVMIO, 0xa5, struct kvm_xsave) 1634304dcb64SAndre Przywara /* Available with KVM_CAP_XCRS */ 1635304dcb64SAndre Przywara #define KVM_GET_XCRS _IOR(KVMIO, 0xa6, struct kvm_xcrs) 1636304dcb64SAndre Przywara #define KVM_SET_XCRS _IOW(KVMIO, 0xa7, struct kvm_xcrs) 1637304dcb64SAndre Przywara /* Available with KVM_CAP_SW_TLB */ 1638304dcb64SAndre Przywara #define KVM_DIRTY_TLB _IOW(KVMIO, 0xaa, struct kvm_dirty_tlb) 1639304dcb64SAndre Przywara /* Available with KVM_CAP_ONE_REG */ 1640304dcb64SAndre Przywara #define KVM_GET_ONE_REG _IOW(KVMIO, 0xab, struct kvm_one_reg) 1641304dcb64SAndre Przywara #define KVM_SET_ONE_REG _IOW(KVMIO, 0xac, struct kvm_one_reg) 1642304dcb64SAndre Przywara /* VM is being stopped by host */ 1643304dcb64SAndre Przywara #define KVM_KVMCLOCK_CTRL _IO(KVMIO, 0xad) 1644304dcb64SAndre Przywara #define KVM_ARM_VCPU_INIT _IOW(KVMIO, 0xae, struct kvm_vcpu_init) 1645304dcb64SAndre Przywara #define KVM_ARM_PREFERRED_TARGET _IOR(KVMIO, 0xaf, struct kvm_vcpu_init) 1646304dcb64SAndre Przywara #define KVM_GET_REG_LIST _IOWR(KVMIO, 0xb0, struct kvm_reg_list) 1647304dcb64SAndre Przywara /* Available with KVM_CAP_S390_MEM_OP */ 1648304dcb64SAndre Przywara #define KVM_S390_MEM_OP _IOW(KVMIO, 0xb1, struct kvm_s390_mem_op) 1649304dcb64SAndre Przywara /* Available with KVM_CAP_S390_SKEYS */ 1650304dcb64SAndre Przywara #define KVM_S390_GET_SKEYS _IOW(KVMIO, 0xb2, struct kvm_s390_skeys) 1651304dcb64SAndre Przywara #define KVM_S390_SET_SKEYS _IOW(KVMIO, 0xb3, struct kvm_s390_skeys) 1652304dcb64SAndre Przywara /* Available with KVM_CAP_S390_INJECT_IRQ */ 1653304dcb64SAndre Przywara #define KVM_S390_IRQ _IOW(KVMIO, 0xb4, struct kvm_s390_irq) 1654304dcb64SAndre Przywara /* Available with KVM_CAP_S390_IRQ_STATE */ 1655304dcb64SAndre Przywara #define KVM_S390_SET_IRQ_STATE _IOW(KVMIO, 0xb5, struct kvm_s390_irq_state) 1656304dcb64SAndre Przywara #define KVM_S390_GET_IRQ_STATE _IOW(KVMIO, 0xb6, struct kvm_s390_irq_state) 1657b3f606e1SMarc Zyngier /* Available with KVM_CAP_X86_SMM */ 1658b3f606e1SMarc Zyngier #define KVM_SMI _IO(KVMIO, 0xb7) 16591bbe92f5SDave Martin /* Available with KVM_CAP_S390_CMMA_MIGRATION */ 16601bbe92f5SDave Martin #define KVM_S390_GET_CMMA_BITS _IOWR(KVMIO, 0xb8, struct kvm_s390_cmma_log) 16611bbe92f5SDave Martin #define KVM_S390_SET_CMMA_BITS _IOW(KVMIO, 0xb9, struct kvm_s390_cmma_log) 16621bbe92f5SDave Martin /* Memory Encryption Commands */ 16631bbe92f5SDave Martin #define KVM_MEMORY_ENCRYPT_OP _IOWR(KVMIO, 0xba, unsigned long) 16641bbe92f5SDave Martin 16651bbe92f5SDave Martin struct kvm_enc_region { 16661bbe92f5SDave Martin __u64 addr; 16671bbe92f5SDave Martin __u64 size; 16681bbe92f5SDave Martin }; 16691bbe92f5SDave Martin 16701bbe92f5SDave Martin #define KVM_MEMORY_ENCRYPT_REG_REGION _IOR(KVMIO, 0xbb, struct kvm_enc_region) 16711bbe92f5SDave Martin #define KVM_MEMORY_ENCRYPT_UNREG_REGION _IOR(KVMIO, 0xbc, struct kvm_enc_region) 16721bbe92f5SDave Martin 16731bbe92f5SDave Martin /* Available with KVM_CAP_HYPERV_EVENTFD */ 16741bbe92f5SDave Martin #define KVM_HYPERV_EVENTFD _IOW(KVMIO, 0xbd, struct kvm_hyperv_eventfd) 16751bbe92f5SDave Martin 16761bbe92f5SDave Martin /* Available with KVM_CAP_NESTED_STATE */ 16771bbe92f5SDave Martin #define KVM_GET_NESTED_STATE _IOWR(KVMIO, 0xbe, struct kvm_nested_state) 16781bbe92f5SDave Martin #define KVM_SET_NESTED_STATE _IOW(KVMIO, 0xbf, struct kvm_nested_state) 16791bbe92f5SDave Martin 168066b24a33SWill Deacon /* Available with KVM_CAP_MANUAL_DIRTY_LOG_PROTECT_2 */ 16811bbe92f5SDave Martin #define KVM_CLEAR_DIRTY_LOG _IOWR(KVMIO, 0xc0, struct kvm_clear_dirty_log) 16821bbe92f5SDave Martin 16835968b5ffSAnup Patel /* Available with KVM_CAP_HYPERV_CPUID (vcpu) / KVM_CAP_SYS_HYPERV_CPUID (system) */ 16841bbe92f5SDave Martin #define KVM_GET_SUPPORTED_HV_CPUID _IOWR(KVMIO, 0xc1, struct kvm_cpuid2) 16851bbe92f5SDave Martin 168666b24a33SWill Deacon /* Available with KVM_CAP_ARM_SVE */ 168766b24a33SWill Deacon #define KVM_ARM_VCPU_FINALIZE _IOW(KVMIO, 0xc2, int) 168866b24a33SWill Deacon 16895968b5ffSAnup Patel /* Available with KVM_CAP_S390_VCPU_RESETS */ 16905968b5ffSAnup Patel #define KVM_S390_NORMAL_RESET _IO(KVMIO, 0xc3) 16915968b5ffSAnup Patel #define KVM_S390_CLEAR_RESET _IO(KVMIO, 0xc4) 16925968b5ffSAnup Patel 16935968b5ffSAnup Patel struct kvm_s390_pv_sec_parm { 16945968b5ffSAnup Patel __u64 origin; 16955968b5ffSAnup Patel __u64 length; 16965968b5ffSAnup Patel }; 16975968b5ffSAnup Patel 16985968b5ffSAnup Patel struct kvm_s390_pv_unp { 16995968b5ffSAnup Patel __u64 addr; 17005968b5ffSAnup Patel __u64 size; 17015968b5ffSAnup Patel __u64 tweak; 17025968b5ffSAnup Patel }; 17035968b5ffSAnup Patel 17048d0facecSAnup Patel enum pv_cmd_dmp_id { 17058d0facecSAnup Patel KVM_PV_DUMP_INIT, 17068d0facecSAnup Patel KVM_PV_DUMP_CONFIG_STOR_STATE, 17078d0facecSAnup Patel KVM_PV_DUMP_COMPLETE, 17088d0facecSAnup Patel KVM_PV_DUMP_CPU, 17098d0facecSAnup Patel }; 17108d0facecSAnup Patel 17118d0facecSAnup Patel struct kvm_s390_pv_dmp { 17128d0facecSAnup Patel __u64 subcmd; 17138d0facecSAnup Patel __u64 buff_addr; 17148d0facecSAnup Patel __u64 buff_len; 17158d0facecSAnup Patel __u64 gaddr; /* For dump storage state */ 17168d0facecSAnup Patel __u64 reserved[4]; 17178d0facecSAnup Patel }; 17188d0facecSAnup Patel 17198d0facecSAnup Patel enum pv_cmd_info_id { 17208d0facecSAnup Patel KVM_PV_INFO_VM, 17218d0facecSAnup Patel KVM_PV_INFO_DUMP, 17228d0facecSAnup Patel }; 17238d0facecSAnup Patel 17248d0facecSAnup Patel struct kvm_s390_pv_info_dump { 17258d0facecSAnup Patel __u64 dump_cpu_buffer_len; 17268d0facecSAnup Patel __u64 dump_config_mem_buffer_per_1m; 17278d0facecSAnup Patel __u64 dump_config_finalize_len; 17288d0facecSAnup Patel }; 17298d0facecSAnup Patel 17308d0facecSAnup Patel struct kvm_s390_pv_info_vm { 17318d0facecSAnup Patel __u64 inst_calls_list[4]; 17328d0facecSAnup Patel __u64 max_cpus; 17338d0facecSAnup Patel __u64 max_guests; 17348d0facecSAnup Patel __u64 max_guest_addr; 17358d0facecSAnup Patel __u64 feature_indication; 17368d0facecSAnup Patel }; 17378d0facecSAnup Patel 17388d0facecSAnup Patel struct kvm_s390_pv_info_header { 17398d0facecSAnup Patel __u32 id; 17408d0facecSAnup Patel __u32 len_max; 17418d0facecSAnup Patel __u32 len_written; 17428d0facecSAnup Patel __u32 reserved; 17438d0facecSAnup Patel }; 17448d0facecSAnup Patel 17458d0facecSAnup Patel struct kvm_s390_pv_info { 17468d0facecSAnup Patel struct kvm_s390_pv_info_header header; 17478d0facecSAnup Patel union { 17488d0facecSAnup Patel struct kvm_s390_pv_info_dump dump; 17498d0facecSAnup Patel struct kvm_s390_pv_info_vm vm; 17508d0facecSAnup Patel }; 17518d0facecSAnup Patel }; 17528d0facecSAnup Patel 17535968b5ffSAnup Patel enum pv_cmd_id { 17545968b5ffSAnup Patel KVM_PV_ENABLE, 17555968b5ffSAnup Patel KVM_PV_DISABLE, 17565968b5ffSAnup Patel KVM_PV_SET_SEC_PARMS, 17575968b5ffSAnup Patel KVM_PV_UNPACK, 17585968b5ffSAnup Patel KVM_PV_VERIFY, 17595968b5ffSAnup Patel KVM_PV_PREP_RESET, 17605968b5ffSAnup Patel KVM_PV_UNSHARE_ALL, 17618d0facecSAnup Patel KVM_PV_INFO, 17628d0facecSAnup Patel KVM_PV_DUMP, 1763be986824SAnup Patel KVM_PV_ASYNC_CLEANUP_PREPARE, 1764be986824SAnup Patel KVM_PV_ASYNC_CLEANUP_PERFORM, 17655968b5ffSAnup Patel }; 17665968b5ffSAnup Patel 17675968b5ffSAnup Patel struct kvm_pv_cmd { 17685968b5ffSAnup Patel __u32 cmd; /* Command to be executed */ 17695968b5ffSAnup Patel __u16 rc; /* Ultravisor return code */ 17705968b5ffSAnup Patel __u16 rrc; /* Ultravisor return reason code */ 17715968b5ffSAnup Patel __u64 data; /* Data or address */ 17725968b5ffSAnup Patel __u32 flags; /* flags for future extensions. Must be 0 for now */ 17735968b5ffSAnup Patel __u32 reserved[3]; 17745968b5ffSAnup Patel }; 17755968b5ffSAnup Patel 17765968b5ffSAnup Patel /* Available with KVM_CAP_S390_PROTECTED */ 17775968b5ffSAnup Patel #define KVM_S390_PV_COMMAND _IOWR(KVMIO, 0xc5, struct kvm_pv_cmd) 17785968b5ffSAnup Patel 17795968b5ffSAnup Patel /* Available with KVM_CAP_X86_MSR_FILTER */ 17805968b5ffSAnup Patel #define KVM_X86_SET_MSR_FILTER _IOW(KVMIO, 0xc6, struct kvm_msr_filter) 17815968b5ffSAnup Patel 17825968b5ffSAnup Patel /* Available with KVM_CAP_DIRTY_LOG_RING */ 17835968b5ffSAnup Patel #define KVM_RESET_DIRTY_RINGS _IO(KVMIO, 0xc7) 17845968b5ffSAnup Patel 17855968b5ffSAnup Patel /* Per-VM Xen attributes */ 17865968b5ffSAnup Patel #define KVM_XEN_HVM_GET_ATTR _IOWR(KVMIO, 0xc8, struct kvm_xen_hvm_attr) 17875968b5ffSAnup Patel #define KVM_XEN_HVM_SET_ATTR _IOW(KVMIO, 0xc9, struct kvm_xen_hvm_attr) 17885968b5ffSAnup Patel 17895968b5ffSAnup Patel struct kvm_xen_hvm_attr { 17905968b5ffSAnup Patel __u16 type; 17915968b5ffSAnup Patel __u16 pad[3]; 17925968b5ffSAnup Patel union { 17935968b5ffSAnup Patel __u8 long_mode; 17945968b5ffSAnup Patel __u8 vector; 1795be986824SAnup Patel __u8 runstate_update_flag; 17965968b5ffSAnup Patel struct { 17975968b5ffSAnup Patel __u64 gfn; 1798be986824SAnup Patel #define KVM_XEN_INVALID_GFN ((__u64)-1) 17995968b5ffSAnup Patel } shared_info; 18008d0facecSAnup Patel struct { 18018d0facecSAnup Patel __u32 send_port; 18028d0facecSAnup Patel __u32 type; /* EVTCHNSTAT_ipi / EVTCHNSTAT_interdomain */ 18038d0facecSAnup Patel __u32 flags; 18048d0facecSAnup Patel #define KVM_XEN_EVTCHN_DEASSIGN (1 << 0) 18058d0facecSAnup Patel #define KVM_XEN_EVTCHN_UPDATE (1 << 1) 18068d0facecSAnup Patel #define KVM_XEN_EVTCHN_RESET (1 << 2) 18078d0facecSAnup Patel /* 18088d0facecSAnup Patel * Events sent by the guest are either looped back to 18098d0facecSAnup Patel * the guest itself (potentially on a different port#) 18108d0facecSAnup Patel * or signalled via an eventfd. 18118d0facecSAnup Patel */ 18128d0facecSAnup Patel union { 18138d0facecSAnup Patel struct { 18148d0facecSAnup Patel __u32 port; 18158d0facecSAnup Patel __u32 vcpu; 18168d0facecSAnup Patel __u32 priority; 18178d0facecSAnup Patel } port; 18188d0facecSAnup Patel struct { 18198d0facecSAnup Patel __u32 port; /* Zero for eventfd */ 18208d0facecSAnup Patel __s32 fd; 18218d0facecSAnup Patel } eventfd; 18228d0facecSAnup Patel __u32 padding[4]; 18238d0facecSAnup Patel } deliver; 18248d0facecSAnup Patel } evtchn; 18258d0facecSAnup Patel __u32 xen_version; 18265968b5ffSAnup Patel __u64 pad[8]; 18275968b5ffSAnup Patel } u; 18285968b5ffSAnup Patel }; 18295968b5ffSAnup Patel 1830be986824SAnup Patel 18315968b5ffSAnup Patel /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_SHARED_INFO */ 18325968b5ffSAnup Patel #define KVM_XEN_ATTR_TYPE_LONG_MODE 0x0 18335968b5ffSAnup Patel #define KVM_XEN_ATTR_TYPE_SHARED_INFO 0x1 18345968b5ffSAnup Patel #define KVM_XEN_ATTR_TYPE_UPCALL_VECTOR 0x2 18358d0facecSAnup Patel /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */ 18368d0facecSAnup Patel #define KVM_XEN_ATTR_TYPE_EVTCHN 0x3 18378d0facecSAnup Patel #define KVM_XEN_ATTR_TYPE_XEN_VERSION 0x4 1838be986824SAnup Patel /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_RUNSTATE_UPDATE_FLAG */ 1839be986824SAnup Patel #define KVM_XEN_ATTR_TYPE_RUNSTATE_UPDATE_FLAG 0x5 18405968b5ffSAnup Patel 18415968b5ffSAnup Patel /* Per-vCPU Xen attributes */ 18425968b5ffSAnup Patel #define KVM_XEN_VCPU_GET_ATTR _IOWR(KVMIO, 0xca, struct kvm_xen_vcpu_attr) 18435968b5ffSAnup Patel #define KVM_XEN_VCPU_SET_ATTR _IOW(KVMIO, 0xcb, struct kvm_xen_vcpu_attr) 18445968b5ffSAnup Patel 18458d0facecSAnup Patel /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */ 18468d0facecSAnup Patel #define KVM_XEN_HVM_EVTCHN_SEND _IOW(KVMIO, 0xd0, struct kvm_irq_routing_xen_evtchn) 18478d0facecSAnup Patel 18485968b5ffSAnup Patel #define KVM_GET_SREGS2 _IOR(KVMIO, 0xcc, struct kvm_sregs2) 18495968b5ffSAnup Patel #define KVM_SET_SREGS2 _IOW(KVMIO, 0xcd, struct kvm_sregs2) 18505968b5ffSAnup Patel 18515968b5ffSAnup Patel struct kvm_xen_vcpu_attr { 18525968b5ffSAnup Patel __u16 type; 18535968b5ffSAnup Patel __u16 pad[3]; 18545968b5ffSAnup Patel union { 18555968b5ffSAnup Patel __u64 gpa; 1856be986824SAnup Patel #define KVM_XEN_INVALID_GPA ((__u64)-1) 18575968b5ffSAnup Patel __u64 pad[8]; 18585968b5ffSAnup Patel struct { 18595968b5ffSAnup Patel __u64 state; 18605968b5ffSAnup Patel __u64 state_entry_time; 18615968b5ffSAnup Patel __u64 time_running; 18625968b5ffSAnup Patel __u64 time_runnable; 18635968b5ffSAnup Patel __u64 time_blocked; 18645968b5ffSAnup Patel __u64 time_offline; 18655968b5ffSAnup Patel } runstate; 18668d0facecSAnup Patel __u32 vcpu_id; 18678d0facecSAnup Patel struct { 18688d0facecSAnup Patel __u32 port; 18698d0facecSAnup Patel __u32 priority; 18708d0facecSAnup Patel __u64 expires_ns; 18718d0facecSAnup Patel } timer; 18728d0facecSAnup Patel __u8 vector; 18735968b5ffSAnup Patel } u; 18745968b5ffSAnup Patel }; 18755968b5ffSAnup Patel 18765968b5ffSAnup Patel /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_SHARED_INFO */ 18775968b5ffSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_VCPU_INFO 0x0 18785968b5ffSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_VCPU_TIME_INFO 0x1 18795968b5ffSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADDR 0x2 18805968b5ffSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_CURRENT 0x3 18815968b5ffSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_DATA 0x4 18825968b5ffSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADJUST 0x5 18838d0facecSAnup Patel /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */ 18848d0facecSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_VCPU_ID 0x6 18858d0facecSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_TIMER 0x7 18868d0facecSAnup Patel #define KVM_XEN_VCPU_ATTR_TYPE_UPCALL_VECTOR 0x8 18875968b5ffSAnup Patel 18881bbe92f5SDave Martin /* Secure Encrypted Virtualization command */ 18891bbe92f5SDave Martin enum sev_cmd_id { 18901bbe92f5SDave Martin /* Guest initialization commands */ 18911bbe92f5SDave Martin KVM_SEV_INIT = 0, 18921bbe92f5SDave Martin KVM_SEV_ES_INIT, 18931bbe92f5SDave Martin /* Guest launch commands */ 18941bbe92f5SDave Martin KVM_SEV_LAUNCH_START, 18951bbe92f5SDave Martin KVM_SEV_LAUNCH_UPDATE_DATA, 18961bbe92f5SDave Martin KVM_SEV_LAUNCH_UPDATE_VMSA, 18971bbe92f5SDave Martin KVM_SEV_LAUNCH_SECRET, 18981bbe92f5SDave Martin KVM_SEV_LAUNCH_MEASURE, 18991bbe92f5SDave Martin KVM_SEV_LAUNCH_FINISH, 19001bbe92f5SDave Martin /* Guest migration commands (outgoing) */ 19011bbe92f5SDave Martin KVM_SEV_SEND_START, 19021bbe92f5SDave Martin KVM_SEV_SEND_UPDATE_DATA, 19031bbe92f5SDave Martin KVM_SEV_SEND_UPDATE_VMSA, 19041bbe92f5SDave Martin KVM_SEV_SEND_FINISH, 19051bbe92f5SDave Martin /* Guest migration commands (incoming) */ 19061bbe92f5SDave Martin KVM_SEV_RECEIVE_START, 19071bbe92f5SDave Martin KVM_SEV_RECEIVE_UPDATE_DATA, 19081bbe92f5SDave Martin KVM_SEV_RECEIVE_UPDATE_VMSA, 19091bbe92f5SDave Martin KVM_SEV_RECEIVE_FINISH, 19101bbe92f5SDave Martin /* Guest status and debug commands */ 19111bbe92f5SDave Martin KVM_SEV_GUEST_STATUS, 19121bbe92f5SDave Martin KVM_SEV_DBG_DECRYPT, 19131bbe92f5SDave Martin KVM_SEV_DBG_ENCRYPT, 19141bbe92f5SDave Martin /* Guest certificates commands */ 19151bbe92f5SDave Martin KVM_SEV_CERT_EXPORT, 19165968b5ffSAnup Patel /* Attestation report */ 19175968b5ffSAnup Patel KVM_SEV_GET_ATTESTATION_REPORT, 19185968b5ffSAnup Patel /* Guest Migration Extension */ 19195968b5ffSAnup Patel KVM_SEV_SEND_CANCEL, 19201bbe92f5SDave Martin 19211bbe92f5SDave Martin KVM_SEV_NR_MAX, 19221bbe92f5SDave Martin }; 19231bbe92f5SDave Martin 19241bbe92f5SDave Martin struct kvm_sev_cmd { 19251bbe92f5SDave Martin __u32 id; 19261bbe92f5SDave Martin __u64 data; 19271bbe92f5SDave Martin __u32 error; 19281bbe92f5SDave Martin __u32 sev_fd; 19291bbe92f5SDave Martin }; 19301bbe92f5SDave Martin 19311bbe92f5SDave Martin struct kvm_sev_launch_start { 19321bbe92f5SDave Martin __u32 handle; 19331bbe92f5SDave Martin __u32 policy; 19341bbe92f5SDave Martin __u64 dh_uaddr; 19351bbe92f5SDave Martin __u32 dh_len; 19361bbe92f5SDave Martin __u64 session_uaddr; 19371bbe92f5SDave Martin __u32 session_len; 19381bbe92f5SDave Martin }; 19391bbe92f5SDave Martin 19401bbe92f5SDave Martin struct kvm_sev_launch_update_data { 19411bbe92f5SDave Martin __u64 uaddr; 19421bbe92f5SDave Martin __u32 len; 19431bbe92f5SDave Martin }; 19441bbe92f5SDave Martin 19451bbe92f5SDave Martin 19461bbe92f5SDave Martin struct kvm_sev_launch_secret { 19471bbe92f5SDave Martin __u64 hdr_uaddr; 19481bbe92f5SDave Martin __u32 hdr_len; 19491bbe92f5SDave Martin __u64 guest_uaddr; 19501bbe92f5SDave Martin __u32 guest_len; 19511bbe92f5SDave Martin __u64 trans_uaddr; 19521bbe92f5SDave Martin __u32 trans_len; 19531bbe92f5SDave Martin }; 19541bbe92f5SDave Martin 19551bbe92f5SDave Martin struct kvm_sev_launch_measure { 19561bbe92f5SDave Martin __u64 uaddr; 19571bbe92f5SDave Martin __u32 len; 19581bbe92f5SDave Martin }; 19591bbe92f5SDave Martin 19601bbe92f5SDave Martin struct kvm_sev_guest_status { 19611bbe92f5SDave Martin __u32 handle; 19621bbe92f5SDave Martin __u32 policy; 19631bbe92f5SDave Martin __u32 state; 19641bbe92f5SDave Martin }; 19651bbe92f5SDave Martin 19661bbe92f5SDave Martin struct kvm_sev_dbg { 19671bbe92f5SDave Martin __u64 src_uaddr; 19681bbe92f5SDave Martin __u64 dst_uaddr; 19691bbe92f5SDave Martin __u32 len; 19701bbe92f5SDave Martin }; 1971304dcb64SAndre Przywara 19725968b5ffSAnup Patel struct kvm_sev_attestation_report { 19735968b5ffSAnup Patel __u8 mnonce[16]; 19745968b5ffSAnup Patel __u64 uaddr; 19755968b5ffSAnup Patel __u32 len; 19765968b5ffSAnup Patel }; 19775968b5ffSAnup Patel 19785968b5ffSAnup Patel struct kvm_sev_send_start { 19795968b5ffSAnup Patel __u32 policy; 19805968b5ffSAnup Patel __u64 pdh_cert_uaddr; 19815968b5ffSAnup Patel __u32 pdh_cert_len; 19825968b5ffSAnup Patel __u64 plat_certs_uaddr; 19835968b5ffSAnup Patel __u32 plat_certs_len; 19845968b5ffSAnup Patel __u64 amd_certs_uaddr; 19855968b5ffSAnup Patel __u32 amd_certs_len; 19865968b5ffSAnup Patel __u64 session_uaddr; 19875968b5ffSAnup Patel __u32 session_len; 19885968b5ffSAnup Patel }; 19895968b5ffSAnup Patel 19905968b5ffSAnup Patel struct kvm_sev_send_update_data { 19915968b5ffSAnup Patel __u64 hdr_uaddr; 19925968b5ffSAnup Patel __u32 hdr_len; 19935968b5ffSAnup Patel __u64 guest_uaddr; 19945968b5ffSAnup Patel __u32 guest_len; 19955968b5ffSAnup Patel __u64 trans_uaddr; 19965968b5ffSAnup Patel __u32 trans_len; 19975968b5ffSAnup Patel }; 19985968b5ffSAnup Patel 19995968b5ffSAnup Patel struct kvm_sev_receive_start { 20005968b5ffSAnup Patel __u32 handle; 20015968b5ffSAnup Patel __u32 policy; 20025968b5ffSAnup Patel __u64 pdh_uaddr; 20035968b5ffSAnup Patel __u32 pdh_len; 20045968b5ffSAnup Patel __u64 session_uaddr; 20055968b5ffSAnup Patel __u32 session_len; 20065968b5ffSAnup Patel }; 20075968b5ffSAnup Patel 20085968b5ffSAnup Patel struct kvm_sev_receive_update_data { 20095968b5ffSAnup Patel __u64 hdr_uaddr; 20105968b5ffSAnup Patel __u32 hdr_len; 20115968b5ffSAnup Patel __u64 guest_uaddr; 20125968b5ffSAnup Patel __u32 guest_len; 20135968b5ffSAnup Patel __u64 trans_uaddr; 20145968b5ffSAnup Patel __u32 trans_len; 20155968b5ffSAnup Patel }; 20165968b5ffSAnup Patel 2017304dcb64SAndre Przywara #define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0) 2018304dcb64SAndre Przywara #define KVM_DEV_ASSIGN_PCI_2_3 (1 << 1) 2019304dcb64SAndre Przywara #define KVM_DEV_ASSIGN_MASK_INTX (1 << 2) 2020304dcb64SAndre Przywara 2021304dcb64SAndre Przywara struct kvm_assigned_pci_dev { 2022304dcb64SAndre Przywara __u32 assigned_dev_id; 2023304dcb64SAndre Przywara __u32 busnr; 2024304dcb64SAndre Przywara __u32 devfn; 2025304dcb64SAndre Przywara __u32 flags; 2026304dcb64SAndre Przywara __u32 segnr; 2027304dcb64SAndre Przywara union { 2028304dcb64SAndre Przywara __u32 reserved[11]; 2029304dcb64SAndre Przywara }; 2030304dcb64SAndre Przywara }; 2031304dcb64SAndre Przywara 2032304dcb64SAndre Przywara #define KVM_DEV_IRQ_HOST_INTX (1 << 0) 2033304dcb64SAndre Przywara #define KVM_DEV_IRQ_HOST_MSI (1 << 1) 2034304dcb64SAndre Przywara #define KVM_DEV_IRQ_HOST_MSIX (1 << 2) 2035304dcb64SAndre Przywara 2036304dcb64SAndre Przywara #define KVM_DEV_IRQ_GUEST_INTX (1 << 8) 2037304dcb64SAndre Przywara #define KVM_DEV_IRQ_GUEST_MSI (1 << 9) 2038304dcb64SAndre Przywara #define KVM_DEV_IRQ_GUEST_MSIX (1 << 10) 2039304dcb64SAndre Przywara 2040304dcb64SAndre Przywara #define KVM_DEV_IRQ_HOST_MASK 0x00ff 2041304dcb64SAndre Przywara #define KVM_DEV_IRQ_GUEST_MASK 0xff00 2042304dcb64SAndre Przywara 2043304dcb64SAndre Przywara struct kvm_assigned_irq { 2044304dcb64SAndre Przywara __u32 assigned_dev_id; 2045304dcb64SAndre Przywara __u32 host_irq; /* ignored (legacy field) */ 2046304dcb64SAndre Przywara __u32 guest_irq; 2047304dcb64SAndre Przywara __u32 flags; 2048304dcb64SAndre Przywara union { 2049304dcb64SAndre Przywara __u32 reserved[12]; 2050304dcb64SAndre Przywara }; 2051304dcb64SAndre Przywara }; 2052304dcb64SAndre Przywara 2053304dcb64SAndre Przywara struct kvm_assigned_msix_nr { 2054304dcb64SAndre Przywara __u32 assigned_dev_id; 2055304dcb64SAndre Przywara __u16 entry_nr; 2056304dcb64SAndre Przywara __u16 padding; 2057304dcb64SAndre Przywara }; 2058304dcb64SAndre Przywara 2059304dcb64SAndre Przywara #define KVM_MAX_MSIX_PER_DEV 256 2060304dcb64SAndre Przywara struct kvm_assigned_msix_entry { 2061304dcb64SAndre Przywara __u32 assigned_dev_id; 2062304dcb64SAndre Przywara __u32 gsi; 2063304dcb64SAndre Przywara __u16 entry; /* The index of entry in the MSI-X table */ 2064304dcb64SAndre Przywara __u16 padding[3]; 2065304dcb64SAndre Przywara }; 2066304dcb64SAndre Przywara 2067764dfba1SAndre Przywara #define KVM_X2APIC_API_USE_32BIT_IDS (1ULL << 0) 2068764dfba1SAndre Przywara #define KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK (1ULL << 1) 2069764dfba1SAndre Przywara 20701bbe92f5SDave Martin /* Available with KVM_CAP_ARM_USER_IRQ */ 20711bbe92f5SDave Martin 20721bbe92f5SDave Martin /* Bits for run->s.regs.device_irq_level */ 20731bbe92f5SDave Martin #define KVM_ARM_DEV_EL1_VTIMER (1 << 0) 20741bbe92f5SDave Martin #define KVM_ARM_DEV_EL1_PTIMER (1 << 1) 20751bbe92f5SDave Martin #define KVM_ARM_DEV_PMU (1 << 2) 20761bbe92f5SDave Martin 20771bbe92f5SDave Martin struct kvm_hyperv_eventfd { 20781bbe92f5SDave Martin __u32 conn_id; 20791bbe92f5SDave Martin __s32 fd; 20801bbe92f5SDave Martin __u32 flags; 20811bbe92f5SDave Martin __u32 padding[3]; 20821bbe92f5SDave Martin }; 20831bbe92f5SDave Martin 20841bbe92f5SDave Martin #define KVM_HYPERV_CONN_ID_MASK 0x00ffffff 20851bbe92f5SDave Martin #define KVM_HYPERV_EVENTFD_DEASSIGN (1 << 0) 20861bbe92f5SDave Martin 20875968b5ffSAnup Patel #define KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE (1 << 0) 20885968b5ffSAnup Patel #define KVM_DIRTY_LOG_INITIALLY_SET (1 << 1) 20895968b5ffSAnup Patel 20905968b5ffSAnup Patel /* 20915968b5ffSAnup Patel * Arch needs to define the macro after implementing the dirty ring 20925968b5ffSAnup Patel * feature. KVM_DIRTY_LOG_PAGE_OFFSET should be defined as the 20935968b5ffSAnup Patel * starting page offset of the dirty ring structures. 20945968b5ffSAnup Patel */ 20955968b5ffSAnup Patel #ifndef KVM_DIRTY_LOG_PAGE_OFFSET 20965968b5ffSAnup Patel #define KVM_DIRTY_LOG_PAGE_OFFSET 0 20975968b5ffSAnup Patel #endif 20985968b5ffSAnup Patel 20995968b5ffSAnup Patel /* 21005968b5ffSAnup Patel * KVM dirty GFN flags, defined as: 21015968b5ffSAnup Patel * 21025968b5ffSAnup Patel * |---------------+---------------+--------------| 21035968b5ffSAnup Patel * | bit 1 (reset) | bit 0 (dirty) | Status | 21045968b5ffSAnup Patel * |---------------+---------------+--------------| 21055968b5ffSAnup Patel * | 0 | 0 | Invalid GFN | 21065968b5ffSAnup Patel * | 0 | 1 | Dirty GFN | 21075968b5ffSAnup Patel * | 1 | X | GFN to reset | 21085968b5ffSAnup Patel * |---------------+---------------+--------------| 21095968b5ffSAnup Patel * 21105968b5ffSAnup Patel * Lifecycle of a dirty GFN goes like: 21115968b5ffSAnup Patel * 21125968b5ffSAnup Patel * dirtied harvested reset 21135968b5ffSAnup Patel * 00 -----------> 01 -------------> 1X -------+ 21145968b5ffSAnup Patel * ^ | 21155968b5ffSAnup Patel * | | 21165968b5ffSAnup Patel * +------------------------------------------+ 21175968b5ffSAnup Patel * 21185968b5ffSAnup Patel * The userspace program is only responsible for the 01->1X state 21195968b5ffSAnup Patel * conversion after harvesting an entry. Also, it must not skip any 21205968b5ffSAnup Patel * dirty bits, so that dirty bits are always harvested in sequence. 21215968b5ffSAnup Patel */ 21225968b5ffSAnup Patel #define KVM_DIRTY_GFN_F_DIRTY _BITUL(0) 21235968b5ffSAnup Patel #define KVM_DIRTY_GFN_F_RESET _BITUL(1) 21245968b5ffSAnup Patel #define KVM_DIRTY_GFN_F_MASK 0x3 21255968b5ffSAnup Patel 21265968b5ffSAnup Patel /* 21275968b5ffSAnup Patel * KVM dirty rings should be mapped at KVM_DIRTY_LOG_PAGE_OFFSET of 21285968b5ffSAnup Patel * per-vcpu mmaped regions as an array of struct kvm_dirty_gfn. The 21295968b5ffSAnup Patel * size of the gfn buffer is decided by the first argument when 21305968b5ffSAnup Patel * enabling KVM_CAP_DIRTY_LOG_RING. 21315968b5ffSAnup Patel */ 21325968b5ffSAnup Patel struct kvm_dirty_gfn { 21335968b5ffSAnup Patel __u32 flags; 21345968b5ffSAnup Patel __u32 slot; 21355968b5ffSAnup Patel __u64 offset; 21365968b5ffSAnup Patel }; 21375968b5ffSAnup Patel 21385968b5ffSAnup Patel #define KVM_BUS_LOCK_DETECTION_OFF (1 << 0) 21395968b5ffSAnup Patel #define KVM_BUS_LOCK_DETECTION_EXIT (1 << 1) 21405968b5ffSAnup Patel 2141083a976eSAlexandru Elisei #define KVM_PMU_CAP_DISABLE (1 << 0) 2142083a976eSAlexandru Elisei 21435968b5ffSAnup Patel /** 21445968b5ffSAnup Patel * struct kvm_stats_header - Header of per vm/vcpu binary statistics data. 21455968b5ffSAnup Patel * @flags: Some extra information for header, always 0 for now. 21465968b5ffSAnup Patel * @name_size: The size in bytes of the memory which contains statistics 21475968b5ffSAnup Patel * name string including trailing '\0'. The memory is allocated 21485968b5ffSAnup Patel * at the send of statistics descriptor. 21495968b5ffSAnup Patel * @num_desc: The number of statistics the vm or vcpu has. 21505968b5ffSAnup Patel * @id_offset: The offset of the vm/vcpu stats' id string in the file pointed 21515968b5ffSAnup Patel * by vm/vcpu stats fd. 21525968b5ffSAnup Patel * @desc_offset: The offset of the vm/vcpu stats' descriptor block in the file 21535968b5ffSAnup Patel * pointd by vm/vcpu stats fd. 21545968b5ffSAnup Patel * @data_offset: The offset of the vm/vcpu stats' data block in the file 21555968b5ffSAnup Patel * pointed by vm/vcpu stats fd. 21565968b5ffSAnup Patel * 21575968b5ffSAnup Patel * This is the header userspace needs to read from stats fd before any other 21585968b5ffSAnup Patel * readings. It is used by userspace to discover all the information about the 21595968b5ffSAnup Patel * vm/vcpu's binary statistics. 21605968b5ffSAnup Patel * Userspace reads this header from the start of the vm/vcpu's stats fd. 21615968b5ffSAnup Patel */ 21625968b5ffSAnup Patel struct kvm_stats_header { 21635968b5ffSAnup Patel __u32 flags; 21645968b5ffSAnup Patel __u32 name_size; 21655968b5ffSAnup Patel __u32 num_desc; 21665968b5ffSAnup Patel __u32 id_offset; 21675968b5ffSAnup Patel __u32 desc_offset; 21685968b5ffSAnup Patel __u32 data_offset; 21695968b5ffSAnup Patel }; 21705968b5ffSAnup Patel 21715968b5ffSAnup Patel #define KVM_STATS_TYPE_SHIFT 0 21725968b5ffSAnup Patel #define KVM_STATS_TYPE_MASK (0xF << KVM_STATS_TYPE_SHIFT) 21735968b5ffSAnup Patel #define KVM_STATS_TYPE_CUMULATIVE (0x0 << KVM_STATS_TYPE_SHIFT) 21745968b5ffSAnup Patel #define KVM_STATS_TYPE_INSTANT (0x1 << KVM_STATS_TYPE_SHIFT) 21755968b5ffSAnup Patel #define KVM_STATS_TYPE_PEAK (0x2 << KVM_STATS_TYPE_SHIFT) 21765968b5ffSAnup Patel #define KVM_STATS_TYPE_LINEAR_HIST (0x3 << KVM_STATS_TYPE_SHIFT) 21775968b5ffSAnup Patel #define KVM_STATS_TYPE_LOG_HIST (0x4 << KVM_STATS_TYPE_SHIFT) 21785968b5ffSAnup Patel #define KVM_STATS_TYPE_MAX KVM_STATS_TYPE_LOG_HIST 21795968b5ffSAnup Patel 21805968b5ffSAnup Patel #define KVM_STATS_UNIT_SHIFT 4 21815968b5ffSAnup Patel #define KVM_STATS_UNIT_MASK (0xF << KVM_STATS_UNIT_SHIFT) 21825968b5ffSAnup Patel #define KVM_STATS_UNIT_NONE (0x0 << KVM_STATS_UNIT_SHIFT) 21835968b5ffSAnup Patel #define KVM_STATS_UNIT_BYTES (0x1 << KVM_STATS_UNIT_SHIFT) 21845968b5ffSAnup Patel #define KVM_STATS_UNIT_SECONDS (0x2 << KVM_STATS_UNIT_SHIFT) 21855968b5ffSAnup Patel #define KVM_STATS_UNIT_CYCLES (0x3 << KVM_STATS_UNIT_SHIFT) 21868d0facecSAnup Patel #define KVM_STATS_UNIT_BOOLEAN (0x4 << KVM_STATS_UNIT_SHIFT) 21878d0facecSAnup Patel #define KVM_STATS_UNIT_MAX KVM_STATS_UNIT_BOOLEAN 21885968b5ffSAnup Patel 21895968b5ffSAnup Patel #define KVM_STATS_BASE_SHIFT 8 21905968b5ffSAnup Patel #define KVM_STATS_BASE_MASK (0xF << KVM_STATS_BASE_SHIFT) 21915968b5ffSAnup Patel #define KVM_STATS_BASE_POW10 (0x0 << KVM_STATS_BASE_SHIFT) 21925968b5ffSAnup Patel #define KVM_STATS_BASE_POW2 (0x1 << KVM_STATS_BASE_SHIFT) 21935968b5ffSAnup Patel #define KVM_STATS_BASE_MAX KVM_STATS_BASE_POW2 21945968b5ffSAnup Patel 21955968b5ffSAnup Patel /** 21965968b5ffSAnup Patel * struct kvm_stats_desc - Descriptor of a KVM statistics. 21975968b5ffSAnup Patel * @flags: Annotations of the stats, like type, unit, etc. 21985968b5ffSAnup Patel * @exponent: Used together with @flags to determine the unit. 21995968b5ffSAnup Patel * @size: The number of data items for this stats. 22005968b5ffSAnup Patel * Every data item is of type __u64. 22015968b5ffSAnup Patel * @offset: The offset of the stats to the start of stat structure in 22025968b5ffSAnup Patel * structure kvm or kvm_vcpu. 22035968b5ffSAnup Patel * @bucket_size: A parameter value used for histogram stats. It is only used 22045968b5ffSAnup Patel * for linear histogram stats, specifying the size of the bucket; 22055968b5ffSAnup Patel * @name: The name string for the stats. Its size is indicated by the 22065968b5ffSAnup Patel * &kvm_stats_header->name_size. 22075968b5ffSAnup Patel */ 22085968b5ffSAnup Patel struct kvm_stats_desc { 22095968b5ffSAnup Patel __u32 flags; 22105968b5ffSAnup Patel __s16 exponent; 22115968b5ffSAnup Patel __u16 size; 22125968b5ffSAnup Patel __u32 offset; 22135968b5ffSAnup Patel __u32 bucket_size; 22145968b5ffSAnup Patel char name[]; 22155968b5ffSAnup Patel }; 22165968b5ffSAnup Patel 22175968b5ffSAnup Patel #define KVM_GET_STATS_FD _IO(KVMIO, 0xce) 22185968b5ffSAnup Patel 2219af1b793cSAlexandru Elisei /* Available with KVM_CAP_XSAVE2 */ 2220af1b793cSAlexandru Elisei #define KVM_GET_XSAVE2 _IOR(KVMIO, 0xcf, struct kvm_xsave) 2221af1b793cSAlexandru Elisei 22228d0facecSAnup Patel /* Available with KVM_CAP_S390_PROTECTED_DUMP */ 22238d0facecSAnup Patel #define KVM_S390_PV_CPU_COMMAND _IOWR(KVMIO, 0xd0, struct kvm_pv_cmd) 22248d0facecSAnup Patel 22258d0facecSAnup Patel /* Available with KVM_CAP_X86_NOTIFY_VMEXIT */ 22268d0facecSAnup Patel #define KVM_X86_NOTIFY_VMEXIT_ENABLED (1ULL << 0) 22278d0facecSAnup Patel #define KVM_X86_NOTIFY_VMEXIT_USER (1ULL << 1) 22288d0facecSAnup Patel 22298d0facecSAnup Patel /* Available with KVM_CAP_S390_ZPCI_OP */ 22308d0facecSAnup Patel #define KVM_S390_ZPCI_OP _IOW(KVMIO, 0xd1, struct kvm_s390_zpci_op) 22318d0facecSAnup Patel 22328d0facecSAnup Patel struct kvm_s390_zpci_op { 22338d0facecSAnup Patel /* in */ 22348d0facecSAnup Patel __u32 fh; /* target device */ 22358d0facecSAnup Patel __u8 op; /* operation to perform */ 22368d0facecSAnup Patel __u8 pad[3]; 22378d0facecSAnup Patel union { 22388d0facecSAnup Patel /* for KVM_S390_ZPCIOP_REG_AEN */ 22398d0facecSAnup Patel struct { 22408d0facecSAnup Patel __u64 ibv; /* Guest addr of interrupt bit vector */ 22418d0facecSAnup Patel __u64 sb; /* Guest addr of summary bit */ 22428d0facecSAnup Patel __u32 flags; 22438d0facecSAnup Patel __u32 noi; /* Number of interrupts */ 22448d0facecSAnup Patel __u8 isc; /* Guest interrupt subclass */ 22458d0facecSAnup Patel __u8 sbo; /* Offset of guest summary bit vector */ 22468d0facecSAnup Patel __u16 pad; 22478d0facecSAnup Patel } reg_aen; 22488d0facecSAnup Patel __u64 reserved[8]; 22498d0facecSAnup Patel } u; 22508d0facecSAnup Patel }; 22518d0facecSAnup Patel 22528d0facecSAnup Patel /* types for kvm_s390_zpci_op->op */ 22538d0facecSAnup Patel #define KVM_S390_ZPCIOP_REG_AEN 0 22548d0facecSAnup Patel #define KVM_S390_ZPCIOP_DEREG_AEN 1 22558d0facecSAnup Patel 22568d0facecSAnup Patel /* flags for kvm_s390_zpci_op->u.reg_aen.flags */ 22578d0facecSAnup Patel #define KVM_S390_ZPCIOP_REGAEN_HOST (1 << 0) 22588d0facecSAnup Patel 2259304dcb64SAndre Przywara #endif /* __LINUX_KVM_H */ 2260