11bbe92f5SDave Martin /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2304dcb64SAndre Przywara #ifndef __LINUX_KVM_H 3304dcb64SAndre Przywara #define __LINUX_KVM_H 4304dcb64SAndre Przywara 5304dcb64SAndre Przywara /* 6304dcb64SAndre Przywara * Userspace interface for /dev/kvm - kernel based virtual machine 7304dcb64SAndre Przywara * 8304dcb64SAndre Przywara * Note: you must update KVM_API_VERSION if you change this interface. 9304dcb64SAndre Przywara */ 10304dcb64SAndre Przywara 115968b5ffSAnup Patel #include <linux/const.h> 12304dcb64SAndre Przywara #include <linux/types.h> 13304dcb64SAndre Przywara #include <linux/compiler.h> 14304dcb64SAndre Przywara #include <linux/ioctl.h> 15304dcb64SAndre Przywara #include <asm/kvm.h> 16304dcb64SAndre Przywara 17304dcb64SAndre Przywara #define KVM_API_VERSION 12 18304dcb64SAndre Przywara 1985aaadf6SAnup Patel /* 2085aaadf6SAnup Patel * Backwards-compatible definitions. 2185aaadf6SAnup Patel */ 2285aaadf6SAnup Patel #define __KVM_HAVE_GUEST_DEBUG 2385aaadf6SAnup Patel 24304dcb64SAndre Przywara /* for KVM_SET_USER_MEMORY_REGION */ 25304dcb64SAndre Przywara struct kvm_userspace_memory_region { 26304dcb64SAndre Przywara __u32 slot; 27304dcb64SAndre Przywara __u32 flags; 28304dcb64SAndre Przywara __u64 guest_phys_addr; 29304dcb64SAndre Przywara __u64 memory_size; /* bytes */ 30304dcb64SAndre Przywara __u64 userspace_addr; /* start of the userspace allocated memory */ 31304dcb64SAndre Przywara }; 32304dcb64SAndre Przywara 3399684681SAnup Patel /* for KVM_SET_USER_MEMORY_REGION2 */ 3499684681SAnup Patel struct kvm_userspace_memory_region2 { 3599684681SAnup Patel __u32 slot; 3699684681SAnup Patel __u32 flags; 3799684681SAnup Patel __u64 guest_phys_addr; 3899684681SAnup Patel __u64 memory_size; 3999684681SAnup Patel __u64 userspace_addr; 4099684681SAnup Patel __u64 guest_memfd_offset; 4199684681SAnup Patel __u32 guest_memfd; 4299684681SAnup Patel __u32 pad1; 4399684681SAnup Patel __u64 pad2[14]; 4499684681SAnup Patel }; 4599684681SAnup Patel 46304dcb64SAndre Przywara /* 47be986824SAnup Patel * The bit 0 ~ bit 15 of kvm_userspace_memory_region::flags are visible for 48be986824SAnup Patel * userspace, other bits are reserved for kvm internal use which are defined 49be986824SAnup Patel * in include/linux/kvm_host.h. 50304dcb64SAndre Przywara */ 51304dcb64SAndre Przywara #define KVM_MEM_LOG_DIRTY_PAGES (1UL << 0) 52304dcb64SAndre Przywara #define KVM_MEM_READONLY (1UL << 1) 5399684681SAnup Patel #define KVM_MEM_GUEST_MEMFD (1UL << 2) 54304dcb64SAndre Przywara 55304dcb64SAndre Przywara /* for KVM_IRQ_LINE */ 56304dcb64SAndre Przywara struct kvm_irq_level { 57304dcb64SAndre Przywara /* 58304dcb64SAndre Przywara * ACPI gsi notion of irq. 59304dcb64SAndre Przywara * For IA-64 (APIC model) IOAPIC0: irq 0-23; IOAPIC1: irq 24-47.. 60304dcb64SAndre Przywara * For X86 (standard AT mode) PIC0/1: irq 0-15. IOAPIC0: 0-23.. 615968b5ffSAnup Patel * For ARM: See Documentation/virt/kvm/api.rst 62304dcb64SAndre Przywara */ 63304dcb64SAndre Przywara union { 64304dcb64SAndre Przywara __u32 irq; 65304dcb64SAndre Przywara __s32 status; 66304dcb64SAndre Przywara }; 67304dcb64SAndre Przywara __u32 level; 68304dcb64SAndre Przywara }; 69304dcb64SAndre Przywara 70304dcb64SAndre Przywara 71304dcb64SAndre Przywara struct kvm_irqchip { 72304dcb64SAndre Przywara __u32 chip_id; 73304dcb64SAndre Przywara __u32 pad; 74304dcb64SAndre Przywara union { 75304dcb64SAndre Przywara char dummy[512]; /* reserving space */ 76304dcb64SAndre Przywara #ifdef __KVM_HAVE_PIT 77304dcb64SAndre Przywara struct kvm_pic_state pic; 78304dcb64SAndre Przywara #endif 79304dcb64SAndre Przywara #ifdef __KVM_HAVE_IOAPIC 80304dcb64SAndre Przywara struct kvm_ioapic_state ioapic; 81304dcb64SAndre Przywara #endif 82304dcb64SAndre Przywara } chip; 83304dcb64SAndre Przywara }; 84304dcb64SAndre Przywara 85304dcb64SAndre Przywara /* for KVM_CREATE_PIT2 */ 86304dcb64SAndre Przywara struct kvm_pit_config { 87304dcb64SAndre Przywara __u32 flags; 88304dcb64SAndre Przywara __u32 pad[15]; 89304dcb64SAndre Przywara }; 90304dcb64SAndre Przywara 91304dcb64SAndre Przywara #define KVM_PIT_SPEAKER_DUMMY 1 92304dcb64SAndre Przywara 93b3f606e1SMarc Zyngier struct kvm_hyperv_exit { 94b3f606e1SMarc Zyngier #define KVM_EXIT_HYPERV_SYNIC 1 95b37ed70eSAndre Przywara #define KVM_EXIT_HYPERV_HCALL 2 965968b5ffSAnup Patel #define KVM_EXIT_HYPERV_SYNDBG 3 97b3f606e1SMarc Zyngier __u32 type; 985968b5ffSAnup Patel __u32 pad1; 99b3f606e1SMarc Zyngier union { 100b3f606e1SMarc Zyngier struct { 101b3f606e1SMarc Zyngier __u32 msr; 1025968b5ffSAnup Patel __u32 pad2; 103b3f606e1SMarc Zyngier __u64 control; 104b3f606e1SMarc Zyngier __u64 evt_page; 105b3f606e1SMarc Zyngier __u64 msg_page; 106b3f606e1SMarc Zyngier } synic; 107b37ed70eSAndre Przywara struct { 108b37ed70eSAndre Przywara __u64 input; 109b37ed70eSAndre Przywara __u64 result; 110b37ed70eSAndre Przywara __u64 params[2]; 111b37ed70eSAndre Przywara } hcall; 1125968b5ffSAnup Patel struct { 1135968b5ffSAnup Patel __u32 msr; 1145968b5ffSAnup Patel __u32 pad2; 1155968b5ffSAnup Patel __u64 control; 1165968b5ffSAnup Patel __u64 status; 1175968b5ffSAnup Patel __u64 send_page; 1185968b5ffSAnup Patel __u64 recv_page; 1195968b5ffSAnup Patel __u64 pending_page; 1205968b5ffSAnup Patel } syndbg; 1215968b5ffSAnup Patel } u; 1225968b5ffSAnup Patel }; 1235968b5ffSAnup Patel 1245968b5ffSAnup Patel struct kvm_xen_exit { 1255968b5ffSAnup Patel #define KVM_EXIT_XEN_HCALL 1 1265968b5ffSAnup Patel __u32 type; 1275968b5ffSAnup Patel union { 1285968b5ffSAnup Patel struct { 1295968b5ffSAnup Patel __u32 longmode; 1305968b5ffSAnup Patel __u32 cpl; 1315968b5ffSAnup Patel __u64 input; 1325968b5ffSAnup Patel __u64 result; 1335968b5ffSAnup Patel __u64 params[6]; 1345968b5ffSAnup Patel } hcall; 135b3f606e1SMarc Zyngier } u; 136b3f606e1SMarc Zyngier }; 137b3f606e1SMarc Zyngier 138304dcb64SAndre Przywara #define KVM_S390_GET_SKEYS_NONE 1 139304dcb64SAndre Przywara #define KVM_S390_SKEYS_MAX 1048576 140304dcb64SAndre Przywara 141304dcb64SAndre Przywara #define KVM_EXIT_UNKNOWN 0 142304dcb64SAndre Przywara #define KVM_EXIT_EXCEPTION 1 143304dcb64SAndre Przywara #define KVM_EXIT_IO 2 144304dcb64SAndre Przywara #define KVM_EXIT_HYPERCALL 3 145304dcb64SAndre Przywara #define KVM_EXIT_DEBUG 4 146304dcb64SAndre Przywara #define KVM_EXIT_HLT 5 147304dcb64SAndre Przywara #define KVM_EXIT_MMIO 6 148304dcb64SAndre Przywara #define KVM_EXIT_IRQ_WINDOW_OPEN 7 149304dcb64SAndre Przywara #define KVM_EXIT_SHUTDOWN 8 150304dcb64SAndre Przywara #define KVM_EXIT_FAIL_ENTRY 9 151304dcb64SAndre Przywara #define KVM_EXIT_INTR 10 152304dcb64SAndre Przywara #define KVM_EXIT_SET_TPR 11 153304dcb64SAndre Przywara #define KVM_EXIT_TPR_ACCESS 12 154304dcb64SAndre Przywara #define KVM_EXIT_S390_SIEIC 13 155304dcb64SAndre Przywara #define KVM_EXIT_S390_RESET 14 156304dcb64SAndre Przywara #define KVM_EXIT_DCR 15 /* deprecated */ 157304dcb64SAndre Przywara #define KVM_EXIT_NMI 16 158304dcb64SAndre Przywara #define KVM_EXIT_INTERNAL_ERROR 17 159304dcb64SAndre Przywara #define KVM_EXIT_OSI 18 160304dcb64SAndre Przywara #define KVM_EXIT_PAPR_HCALL 19 161304dcb64SAndre Przywara #define KVM_EXIT_S390_UCONTROL 20 162304dcb64SAndre Przywara #define KVM_EXIT_WATCHDOG 21 163304dcb64SAndre Przywara #define KVM_EXIT_S390_TSCH 22 164304dcb64SAndre Przywara #define KVM_EXIT_EPR 23 165304dcb64SAndre Przywara #define KVM_EXIT_SYSTEM_EVENT 24 166304dcb64SAndre Przywara #define KVM_EXIT_S390_STSI 25 167b3f606e1SMarc Zyngier #define KVM_EXIT_IOAPIC_EOI 26 168b3f606e1SMarc Zyngier #define KVM_EXIT_HYPERV 27 1695968b5ffSAnup Patel #define KVM_EXIT_ARM_NISV 28 1705968b5ffSAnup Patel #define KVM_EXIT_X86_RDMSR 29 1715968b5ffSAnup Patel #define KVM_EXIT_X86_WRMSR 30 1725968b5ffSAnup Patel #define KVM_EXIT_DIRTY_RING_FULL 31 1735968b5ffSAnup Patel #define KVM_EXIT_AP_RESET_HOLD 32 1745968b5ffSAnup Patel #define KVM_EXIT_X86_BUS_LOCK 33 1755968b5ffSAnup Patel #define KVM_EXIT_XEN 34 1765968b5ffSAnup Patel #define KVM_EXIT_RISCV_SBI 35 1778d0facecSAnup Patel #define KVM_EXIT_RISCV_CSR 36 1788d0facecSAnup Patel #define KVM_EXIT_NOTIFY 37 17992ef2dcdSWill Deacon #define KVM_EXIT_LOONGARCH_IOCSR 38 18099684681SAnup Patel #define KVM_EXIT_MEMORY_FAULT 39 181304dcb64SAndre Przywara 182304dcb64SAndre Przywara /* For KVM_EXIT_INTERNAL_ERROR */ 183304dcb64SAndre Przywara /* Emulate instruction failed. */ 184304dcb64SAndre Przywara #define KVM_INTERNAL_ERROR_EMULATION 1 185304dcb64SAndre Przywara /* Encounter unexpected simultaneous exceptions. */ 186304dcb64SAndre Przywara #define KVM_INTERNAL_ERROR_SIMUL_EX 2 187304dcb64SAndre Przywara /* Encounter unexpected vm-exit due to delivery event. */ 188304dcb64SAndre Przywara #define KVM_INTERNAL_ERROR_DELIVERY_EV 3 1895968b5ffSAnup Patel /* Encounter unexpected vm-exit reason */ 1905968b5ffSAnup Patel #define KVM_INTERNAL_ERROR_UNEXPECTED_EXIT_REASON 4 1915968b5ffSAnup Patel 1925968b5ffSAnup Patel /* Flags that describe what fields in emulation_failure hold valid data. */ 1935968b5ffSAnup Patel #define KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES (1ULL << 0) 194304dcb64SAndre Przywara 195304dcb64SAndre Przywara /* for KVM_RUN, returned by mmap(vcpu_fd, offset=0) */ 196304dcb64SAndre Przywara struct kvm_run { 197304dcb64SAndre Przywara /* in */ 198304dcb64SAndre Przywara __u8 request_interrupt_window; 199764dfba1SAndre Przywara __u8 immediate_exit; 200764dfba1SAndre Przywara __u8 padding1[6]; 201304dcb64SAndre Przywara 202304dcb64SAndre Przywara /* out */ 203304dcb64SAndre Przywara __u32 exit_reason; 204304dcb64SAndre Przywara __u8 ready_for_interrupt_injection; 205304dcb64SAndre Przywara __u8 if_flag; 206b3f606e1SMarc Zyngier __u16 flags; 207304dcb64SAndre Przywara 208304dcb64SAndre Przywara /* in (pre_kvm_run), out (post_kvm_run) */ 209304dcb64SAndre Przywara __u64 cr8; 210304dcb64SAndre Przywara __u64 apic_base; 211304dcb64SAndre Przywara 212304dcb64SAndre Przywara #ifdef __KVM_S390 213304dcb64SAndre Przywara /* the processor status word for s390 */ 214304dcb64SAndre Przywara __u64 psw_mask; /* psw upper half */ 215304dcb64SAndre Przywara __u64 psw_addr; /* psw lower half */ 216304dcb64SAndre Przywara #endif 217304dcb64SAndre Przywara union { 218304dcb64SAndre Przywara /* KVM_EXIT_UNKNOWN */ 219304dcb64SAndre Przywara struct { 220304dcb64SAndre Przywara __u64 hardware_exit_reason; 221304dcb64SAndre Przywara } hw; 222304dcb64SAndre Przywara /* KVM_EXIT_FAIL_ENTRY */ 223304dcb64SAndre Przywara struct { 224304dcb64SAndre Przywara __u64 hardware_entry_failure_reason; 2255968b5ffSAnup Patel __u32 cpu; 226304dcb64SAndre Przywara } fail_entry; 227304dcb64SAndre Przywara /* KVM_EXIT_EXCEPTION */ 228304dcb64SAndre Przywara struct { 229304dcb64SAndre Przywara __u32 exception; 230304dcb64SAndre Przywara __u32 error_code; 231304dcb64SAndre Przywara } ex; 232304dcb64SAndre Przywara /* KVM_EXIT_IO */ 233304dcb64SAndre Przywara struct { 234304dcb64SAndre Przywara #define KVM_EXIT_IO_IN 0 235304dcb64SAndre Przywara #define KVM_EXIT_IO_OUT 1 236304dcb64SAndre Przywara __u8 direction; 237304dcb64SAndre Przywara __u8 size; /* bytes */ 238304dcb64SAndre Przywara __u16 port; 239304dcb64SAndre Przywara __u32 count; 240304dcb64SAndre Przywara __u64 data_offset; /* relative to kvm_run start */ 241304dcb64SAndre Przywara } io; 242b3f606e1SMarc Zyngier /* KVM_EXIT_DEBUG */ 243304dcb64SAndre Przywara struct { 244304dcb64SAndre Przywara struct kvm_debug_exit_arch arch; 245304dcb64SAndre Przywara } debug; 246304dcb64SAndre Przywara /* KVM_EXIT_MMIO */ 247304dcb64SAndre Przywara struct { 248304dcb64SAndre Przywara __u64 phys_addr; 249304dcb64SAndre Przywara __u8 data[8]; 250304dcb64SAndre Przywara __u32 len; 251304dcb64SAndre Przywara __u8 is_write; 252304dcb64SAndre Przywara } mmio; 25392ef2dcdSWill Deacon /* KVM_EXIT_LOONGARCH_IOCSR */ 25492ef2dcdSWill Deacon struct { 25592ef2dcdSWill Deacon __u64 phys_addr; 25692ef2dcdSWill Deacon __u8 data[8]; 25792ef2dcdSWill Deacon __u32 len; 25892ef2dcdSWill Deacon __u8 is_write; 25992ef2dcdSWill Deacon } iocsr_io; 260304dcb64SAndre Przywara /* KVM_EXIT_HYPERCALL */ 261304dcb64SAndre Przywara struct { 262304dcb64SAndre Przywara __u64 nr; 263304dcb64SAndre Przywara __u64 args[6]; 264304dcb64SAndre Przywara __u64 ret; 265be986824SAnup Patel 266be986824SAnup Patel union { 267be986824SAnup Patel #ifndef __KERNEL__ 268304dcb64SAndre Przywara __u32 longmode; 269be986824SAnup Patel #endif 270be986824SAnup Patel __u64 flags; 271be986824SAnup Patel }; 272304dcb64SAndre Przywara } hypercall; 273304dcb64SAndre Przywara /* KVM_EXIT_TPR_ACCESS */ 274304dcb64SAndre Przywara struct { 275304dcb64SAndre Przywara __u64 rip; 276304dcb64SAndre Przywara __u32 is_write; 277304dcb64SAndre Przywara __u32 pad; 278304dcb64SAndre Przywara } tpr_access; 279304dcb64SAndre Przywara /* KVM_EXIT_S390_SIEIC */ 280304dcb64SAndre Przywara struct { 281304dcb64SAndre Przywara __u8 icptcode; 282304dcb64SAndre Przywara __u16 ipa; 283304dcb64SAndre Przywara __u32 ipb; 284304dcb64SAndre Przywara } s390_sieic; 285304dcb64SAndre Przywara /* KVM_EXIT_S390_RESET */ 286304dcb64SAndre Przywara __u64 s390_reset_flags; 287304dcb64SAndre Przywara /* KVM_EXIT_S390_UCONTROL */ 288304dcb64SAndre Przywara struct { 289304dcb64SAndre Przywara __u64 trans_exc_code; 290304dcb64SAndre Przywara __u32 pgm_code; 291304dcb64SAndre Przywara } s390_ucontrol; 292304dcb64SAndre Przywara /* KVM_EXIT_DCR (deprecated) */ 293304dcb64SAndre Przywara struct { 294304dcb64SAndre Przywara __u32 dcrn; 295304dcb64SAndre Przywara __u32 data; 296304dcb64SAndre Przywara __u8 is_write; 297304dcb64SAndre Przywara } dcr; 298b3f606e1SMarc Zyngier /* KVM_EXIT_INTERNAL_ERROR */ 299304dcb64SAndre Przywara struct { 300304dcb64SAndre Przywara __u32 suberror; 301304dcb64SAndre Przywara /* Available with KVM_CAP_INTERNAL_ERROR_DATA: */ 302304dcb64SAndre Przywara __u32 ndata; 303304dcb64SAndre Przywara __u64 data[16]; 304304dcb64SAndre Przywara } internal; 3055968b5ffSAnup Patel /* 3065968b5ffSAnup Patel * KVM_INTERNAL_ERROR_EMULATION 3075968b5ffSAnup Patel * 3085968b5ffSAnup Patel * "struct emulation_failure" is an overlay of "struct internal" 3095968b5ffSAnup Patel * that is used for the KVM_INTERNAL_ERROR_EMULATION sub-type of 3105968b5ffSAnup Patel * KVM_EXIT_INTERNAL_ERROR. Note, unlike other internal error 3115968b5ffSAnup Patel * sub-types, this struct is ABI! It also needs to be backwards 3125968b5ffSAnup Patel * compatible with "struct internal". Take special care that 3135968b5ffSAnup Patel * "ndata" is correct, that new fields are enumerated in "flags", 3145968b5ffSAnup Patel * and that each flag enumerates fields that are 64-bit aligned 3155968b5ffSAnup Patel * and sized (so that ndata+internal.data[] is valid/accurate). 3165968b5ffSAnup Patel * 3175968b5ffSAnup Patel * Space beyond the defined fields may be used to store arbitrary 3185968b5ffSAnup Patel * debug information relating to the emulation failure. It is 3195968b5ffSAnup Patel * accounted for in "ndata" but the format is unspecified and is 3205968b5ffSAnup Patel * not represented in "flags". Any such information is *not* ABI! 3215968b5ffSAnup Patel */ 3225968b5ffSAnup Patel struct { 3235968b5ffSAnup Patel __u32 suberror; 3245968b5ffSAnup Patel __u32 ndata; 3255968b5ffSAnup Patel __u64 flags; 3265968b5ffSAnup Patel union { 3275968b5ffSAnup Patel struct { 3285968b5ffSAnup Patel __u8 insn_size; 3295968b5ffSAnup Patel __u8 insn_bytes[15]; 3305968b5ffSAnup Patel }; 3315968b5ffSAnup Patel }; 3325968b5ffSAnup Patel /* Arbitrary debug data may follow. */ 3335968b5ffSAnup Patel } emulation_failure; 334304dcb64SAndre Przywara /* KVM_EXIT_OSI */ 335304dcb64SAndre Przywara struct { 336304dcb64SAndre Przywara __u64 gprs[32]; 337304dcb64SAndre Przywara } osi; 338b3f606e1SMarc Zyngier /* KVM_EXIT_PAPR_HCALL */ 339304dcb64SAndre Przywara struct { 340304dcb64SAndre Przywara __u64 nr; 341304dcb64SAndre Przywara __u64 ret; 342304dcb64SAndre Przywara __u64 args[9]; 343304dcb64SAndre Przywara } papr_hcall; 344304dcb64SAndre Przywara /* KVM_EXIT_S390_TSCH */ 345304dcb64SAndre Przywara struct { 346304dcb64SAndre Przywara __u16 subchannel_id; 347304dcb64SAndre Przywara __u16 subchannel_nr; 348304dcb64SAndre Przywara __u32 io_int_parm; 349304dcb64SAndre Przywara __u32 io_int_word; 350304dcb64SAndre Przywara __u32 ipb; 351304dcb64SAndre Przywara __u8 dequeued; 352304dcb64SAndre Przywara } s390_tsch; 353304dcb64SAndre Przywara /* KVM_EXIT_EPR */ 354304dcb64SAndre Przywara struct { 355304dcb64SAndre Przywara __u32 epr; 356304dcb64SAndre Przywara } epr; 357304dcb64SAndre Przywara /* KVM_EXIT_SYSTEM_EVENT */ 358304dcb64SAndre Przywara struct { 359304dcb64SAndre Przywara #define KVM_SYSTEM_EVENT_SHUTDOWN 1 360304dcb64SAndre Przywara #define KVM_SYSTEM_EVENT_RESET 2 361b3f606e1SMarc Zyngier #define KVM_SYSTEM_EVENT_CRASH 3 3628d0facecSAnup Patel #define KVM_SYSTEM_EVENT_WAKEUP 4 3638d0facecSAnup Patel #define KVM_SYSTEM_EVENT_SUSPEND 5 3648d0facecSAnup Patel #define KVM_SYSTEM_EVENT_SEV_TERM 6 365304dcb64SAndre Przywara __u32 type; 3668d0facecSAnup Patel __u32 ndata; 3678d0facecSAnup Patel union { 3688d0facecSAnup Patel #ifndef __KERNEL__ 369304dcb64SAndre Przywara __u64 flags; 3708d0facecSAnup Patel #endif 3718d0facecSAnup Patel __u64 data[16]; 3728d0facecSAnup Patel }; 373304dcb64SAndre Przywara } system_event; 374304dcb64SAndre Przywara /* KVM_EXIT_S390_STSI */ 375304dcb64SAndre Przywara struct { 376304dcb64SAndre Przywara __u64 addr; 377304dcb64SAndre Przywara __u8 ar; 378304dcb64SAndre Przywara __u8 reserved; 379304dcb64SAndre Przywara __u8 fc; 380304dcb64SAndre Przywara __u8 sel1; 381304dcb64SAndre Przywara __u16 sel2; 382304dcb64SAndre Przywara } s390_stsi; 383b3f606e1SMarc Zyngier /* KVM_EXIT_IOAPIC_EOI */ 384b3f606e1SMarc Zyngier struct { 385b3f606e1SMarc Zyngier __u8 vector; 386b3f606e1SMarc Zyngier } eoi; 387b3f606e1SMarc Zyngier /* KVM_EXIT_HYPERV */ 388b3f606e1SMarc Zyngier struct kvm_hyperv_exit hyperv; 3895968b5ffSAnup Patel /* KVM_EXIT_ARM_NISV */ 3905968b5ffSAnup Patel struct { 3915968b5ffSAnup Patel __u64 esr_iss; 3925968b5ffSAnup Patel __u64 fault_ipa; 3935968b5ffSAnup Patel } arm_nisv; 3945968b5ffSAnup Patel /* KVM_EXIT_X86_RDMSR / KVM_EXIT_X86_WRMSR */ 3955968b5ffSAnup Patel struct { 3965968b5ffSAnup Patel __u8 error; /* user -> kernel */ 3975968b5ffSAnup Patel __u8 pad[7]; 3985968b5ffSAnup Patel #define KVM_MSR_EXIT_REASON_INVAL (1 << 0) 3995968b5ffSAnup Patel #define KVM_MSR_EXIT_REASON_UNKNOWN (1 << 1) 4005968b5ffSAnup Patel #define KVM_MSR_EXIT_REASON_FILTER (1 << 2) 401be986824SAnup Patel #define KVM_MSR_EXIT_REASON_VALID_MASK (KVM_MSR_EXIT_REASON_INVAL | \ 402be986824SAnup Patel KVM_MSR_EXIT_REASON_UNKNOWN | \ 403be986824SAnup Patel KVM_MSR_EXIT_REASON_FILTER) 4045968b5ffSAnup Patel __u32 reason; /* kernel -> user */ 4055968b5ffSAnup Patel __u32 index; /* kernel -> user */ 4065968b5ffSAnup Patel __u64 data; /* kernel <-> user */ 4075968b5ffSAnup Patel } msr; 4085968b5ffSAnup Patel /* KVM_EXIT_XEN */ 4095968b5ffSAnup Patel struct kvm_xen_exit xen; 4105968b5ffSAnup Patel /* KVM_EXIT_RISCV_SBI */ 4115968b5ffSAnup Patel struct { 4125968b5ffSAnup Patel unsigned long extension_id; 4135968b5ffSAnup Patel unsigned long function_id; 4145968b5ffSAnup Patel unsigned long args[6]; 4155968b5ffSAnup Patel unsigned long ret[2]; 4165968b5ffSAnup Patel } riscv_sbi; 4178d0facecSAnup Patel /* KVM_EXIT_RISCV_CSR */ 4188d0facecSAnup Patel struct { 4198d0facecSAnup Patel unsigned long csr_num; 4208d0facecSAnup Patel unsigned long new_value; 4218d0facecSAnup Patel unsigned long write_mask; 4228d0facecSAnup Patel unsigned long ret_value; 4238d0facecSAnup Patel } riscv_csr; 4248d0facecSAnup Patel /* KVM_EXIT_NOTIFY */ 4258d0facecSAnup Patel struct { 4268d0facecSAnup Patel #define KVM_NOTIFY_CONTEXT_INVALID (1 << 0) 4278d0facecSAnup Patel __u32 flags; 4288d0facecSAnup Patel } notify; 42999684681SAnup Patel /* KVM_EXIT_MEMORY_FAULT */ 43099684681SAnup Patel struct { 43199684681SAnup Patel #define KVM_MEMORY_EXIT_FLAG_PRIVATE (1ULL << 3) 43299684681SAnup Patel __u64 flags; 43399684681SAnup Patel __u64 gpa; 43499684681SAnup Patel __u64 size; 43599684681SAnup Patel } memory_fault; 436304dcb64SAndre Przywara /* Fix the size of the union. */ 437304dcb64SAndre Przywara char padding[256]; 438304dcb64SAndre Przywara }; 439304dcb64SAndre Przywara 4401bbe92f5SDave Martin /* 2048 is the size of the char array used to bound/pad the size 4411bbe92f5SDave Martin * of the union that holds sync regs. 4421bbe92f5SDave Martin */ 4431bbe92f5SDave Martin #define SYNC_REGS_SIZE_BYTES 2048 444304dcb64SAndre Przywara /* 445304dcb64SAndre Przywara * shared registers between kvm and userspace. 446304dcb64SAndre Przywara * kvm_valid_regs specifies the register classes set by the host 447304dcb64SAndre Przywara * kvm_dirty_regs specified the register classes dirtied by userspace 448304dcb64SAndre Przywara * struct kvm_sync_regs is architecture specific, as well as the 449304dcb64SAndre Przywara * bits for kvm_valid_regs and kvm_dirty_regs 450304dcb64SAndre Przywara */ 451304dcb64SAndre Przywara __u64 kvm_valid_regs; 452304dcb64SAndre Przywara __u64 kvm_dirty_regs; 453304dcb64SAndre Przywara union { 454304dcb64SAndre Przywara struct kvm_sync_regs regs; 4551bbe92f5SDave Martin char padding[SYNC_REGS_SIZE_BYTES]; 456304dcb64SAndre Przywara } s; 457304dcb64SAndre Przywara }; 458304dcb64SAndre Przywara 459304dcb64SAndre Przywara /* for KVM_REGISTER_COALESCED_MMIO / KVM_UNREGISTER_COALESCED_MMIO */ 460304dcb64SAndre Przywara 461304dcb64SAndre Przywara struct kvm_coalesced_mmio_zone { 462304dcb64SAndre Przywara __u64 addr; 463304dcb64SAndre Przywara __u32 size; 4641bbe92f5SDave Martin union { 465304dcb64SAndre Przywara __u32 pad; 4661bbe92f5SDave Martin __u32 pio; 4671bbe92f5SDave Martin }; 468304dcb64SAndre Przywara }; 469304dcb64SAndre Przywara 470304dcb64SAndre Przywara struct kvm_coalesced_mmio { 471304dcb64SAndre Przywara __u64 phys_addr; 472304dcb64SAndre Przywara __u32 len; 4731bbe92f5SDave Martin union { 474304dcb64SAndre Przywara __u32 pad; 4751bbe92f5SDave Martin __u32 pio; 4761bbe92f5SDave Martin }; 477304dcb64SAndre Przywara __u8 data[8]; 478304dcb64SAndre Przywara }; 479304dcb64SAndre Przywara 480304dcb64SAndre Przywara struct kvm_coalesced_mmio_ring { 481304dcb64SAndre Przywara __u32 first, last; 4828d0facecSAnup Patel struct kvm_coalesced_mmio coalesced_mmio[]; 483304dcb64SAndre Przywara }; 484304dcb64SAndre Przywara 485304dcb64SAndre Przywara #define KVM_COALESCED_MMIO_MAX \ 486304dcb64SAndre Przywara ((PAGE_SIZE - sizeof(struct kvm_coalesced_mmio_ring)) / \ 487304dcb64SAndre Przywara sizeof(struct kvm_coalesced_mmio)) 488304dcb64SAndre Przywara 489304dcb64SAndre Przywara /* for KVM_TRANSLATE */ 490304dcb64SAndre Przywara struct kvm_translation { 491304dcb64SAndre Przywara /* in */ 492304dcb64SAndre Przywara __u64 linear_address; 493304dcb64SAndre Przywara 494304dcb64SAndre Przywara /* out */ 495304dcb64SAndre Przywara __u64 physical_address; 496304dcb64SAndre Przywara __u8 valid; 497304dcb64SAndre Przywara __u8 writeable; 498304dcb64SAndre Przywara __u8 usermode; 499304dcb64SAndre Przywara __u8 pad[5]; 500304dcb64SAndre Przywara }; 501304dcb64SAndre Przywara 502304dcb64SAndre Przywara /* for KVM_INTERRUPT */ 503304dcb64SAndre Przywara struct kvm_interrupt { 504304dcb64SAndre Przywara /* in */ 505304dcb64SAndre Przywara __u32 irq; 506304dcb64SAndre Przywara }; 507304dcb64SAndre Przywara 508304dcb64SAndre Przywara /* for KVM_GET_DIRTY_LOG */ 509304dcb64SAndre Przywara struct kvm_dirty_log { 510304dcb64SAndre Przywara __u32 slot; 511304dcb64SAndre Przywara __u32 padding1; 512304dcb64SAndre Przywara union { 513304dcb64SAndre Przywara void __user *dirty_bitmap; /* one bit per page */ 514304dcb64SAndre Przywara __u64 padding2; 515304dcb64SAndre Przywara }; 516304dcb64SAndre Przywara }; 517304dcb64SAndre Przywara 5181bbe92f5SDave Martin /* for KVM_CLEAR_DIRTY_LOG */ 5191bbe92f5SDave Martin struct kvm_clear_dirty_log { 5201bbe92f5SDave Martin __u32 slot; 5211bbe92f5SDave Martin __u32 num_pages; 5221bbe92f5SDave Martin __u64 first_page; 5231bbe92f5SDave Martin union { 5241bbe92f5SDave Martin void __user *dirty_bitmap; /* one bit per page */ 5251bbe92f5SDave Martin __u64 padding2; 5261bbe92f5SDave Martin }; 5271bbe92f5SDave Martin }; 5281bbe92f5SDave Martin 529304dcb64SAndre Przywara /* for KVM_SET_SIGNAL_MASK */ 530304dcb64SAndre Przywara struct kvm_signal_mask { 531304dcb64SAndre Przywara __u32 len; 5328d0facecSAnup Patel __u8 sigset[]; 533304dcb64SAndre Przywara }; 534304dcb64SAndre Przywara 535304dcb64SAndre Przywara /* for KVM_TPR_ACCESS_REPORTING */ 536304dcb64SAndre Przywara struct kvm_tpr_access_ctl { 537304dcb64SAndre Przywara __u32 enabled; 538304dcb64SAndre Przywara __u32 flags; 539304dcb64SAndre Przywara __u32 reserved[8]; 540304dcb64SAndre Przywara }; 541304dcb64SAndre Przywara 542304dcb64SAndre Przywara /* for KVM_SET_VAPIC_ADDR */ 543304dcb64SAndre Przywara struct kvm_vapic_addr { 544304dcb64SAndre Przywara __u64 vapic_addr; 545304dcb64SAndre Przywara }; 546304dcb64SAndre Przywara 547304dcb64SAndre Przywara /* for KVM_SET_MP_STATE */ 548304dcb64SAndre Przywara 549304dcb64SAndre Przywara /* not all states are valid on all architectures */ 550304dcb64SAndre Przywara #define KVM_MP_STATE_RUNNABLE 0 551304dcb64SAndre Przywara #define KVM_MP_STATE_UNINITIALIZED 1 552304dcb64SAndre Przywara #define KVM_MP_STATE_INIT_RECEIVED 2 553304dcb64SAndre Przywara #define KVM_MP_STATE_HALTED 3 554304dcb64SAndre Przywara #define KVM_MP_STATE_SIPI_RECEIVED 4 555304dcb64SAndre Przywara #define KVM_MP_STATE_STOPPED 5 556304dcb64SAndre Przywara #define KVM_MP_STATE_CHECK_STOP 6 557304dcb64SAndre Przywara #define KVM_MP_STATE_OPERATING 7 558304dcb64SAndre Przywara #define KVM_MP_STATE_LOAD 8 5595968b5ffSAnup Patel #define KVM_MP_STATE_AP_RESET_HOLD 9 5608d0facecSAnup Patel #define KVM_MP_STATE_SUSPENDED 10 561304dcb64SAndre Przywara 562304dcb64SAndre Przywara struct kvm_mp_state { 563304dcb64SAndre Przywara __u32 mp_state; 564304dcb64SAndre Przywara }; 565304dcb64SAndre Przywara 566304dcb64SAndre Przywara /* for KVM_SET_GUEST_DEBUG */ 567304dcb64SAndre Przywara 568304dcb64SAndre Przywara #define KVM_GUESTDBG_ENABLE 0x00000001 569304dcb64SAndre Przywara #define KVM_GUESTDBG_SINGLESTEP 0x00000002 570304dcb64SAndre Przywara 571304dcb64SAndre Przywara struct kvm_guest_debug { 572304dcb64SAndre Przywara __u32 control; 573304dcb64SAndre Przywara __u32 pad; 574304dcb64SAndre Przywara struct kvm_guest_debug_arch arch; 575304dcb64SAndre Przywara }; 576304dcb64SAndre Przywara 577304dcb64SAndre Przywara enum { 578304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_datamatch, 579304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_pio, 580304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_deassign, 581304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_virtio_ccw_notify, 582304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_fast_mmio, 583304dcb64SAndre Przywara kvm_ioeventfd_flag_nr_max, 584304dcb64SAndre Przywara }; 585304dcb64SAndre Przywara 586304dcb64SAndre Przywara #define KVM_IOEVENTFD_FLAG_DATAMATCH (1 << kvm_ioeventfd_flag_nr_datamatch) 587304dcb64SAndre Przywara #define KVM_IOEVENTFD_FLAG_PIO (1 << kvm_ioeventfd_flag_nr_pio) 588304dcb64SAndre Przywara #define KVM_IOEVENTFD_FLAG_DEASSIGN (1 << kvm_ioeventfd_flag_nr_deassign) 589304dcb64SAndre Przywara #define KVM_IOEVENTFD_FLAG_VIRTIO_CCW_NOTIFY \ 590304dcb64SAndre Przywara (1 << kvm_ioeventfd_flag_nr_virtio_ccw_notify) 591304dcb64SAndre Przywara 592304dcb64SAndre Przywara #define KVM_IOEVENTFD_VALID_FLAG_MASK ((1 << kvm_ioeventfd_flag_nr_max) - 1) 593304dcb64SAndre Przywara 594304dcb64SAndre Przywara struct kvm_ioeventfd { 595304dcb64SAndre Przywara __u64 datamatch; 596304dcb64SAndre Przywara __u64 addr; /* legal pio/mmio address */ 597304dcb64SAndre Przywara __u32 len; /* 1, 2, 4, or 8 bytes; or 0 to ignore length */ 598304dcb64SAndre Przywara __s32 fd; 599304dcb64SAndre Przywara __u32 flags; 600304dcb64SAndre Przywara __u8 pad[36]; 601304dcb64SAndre Przywara }; 602304dcb64SAndre Przywara 6031bbe92f5SDave Martin #define KVM_X86_DISABLE_EXITS_MWAIT (1 << 0) 6041bbe92f5SDave Martin #define KVM_X86_DISABLE_EXITS_HLT (1 << 1) 6051bbe92f5SDave Martin #define KVM_X86_DISABLE_EXITS_PAUSE (1 << 2) 60666b24a33SWill Deacon #define KVM_X86_DISABLE_EXITS_CSTATE (1 << 3) 6071bbe92f5SDave Martin #define KVM_X86_DISABLE_VALID_EXITS (KVM_X86_DISABLE_EXITS_MWAIT | \ 6081bbe92f5SDave Martin KVM_X86_DISABLE_EXITS_HLT | \ 60966b24a33SWill Deacon KVM_X86_DISABLE_EXITS_PAUSE | \ 61066b24a33SWill Deacon KVM_X86_DISABLE_EXITS_CSTATE) 6111bbe92f5SDave Martin 612304dcb64SAndre Przywara /* for KVM_ENABLE_CAP */ 613304dcb64SAndre Przywara struct kvm_enable_cap { 614304dcb64SAndre Przywara /* in */ 615304dcb64SAndre Przywara __u32 cap; 616304dcb64SAndre Przywara __u32 flags; 617304dcb64SAndre Przywara __u64 args[4]; 618304dcb64SAndre Przywara __u8 pad[64]; 619304dcb64SAndre Przywara }; 620304dcb64SAndre Przywara 621304dcb64SAndre Przywara #define KVMIO 0xAE 622304dcb64SAndre Przywara 623304dcb64SAndre Przywara /* machine type bits, to be used as argument to KVM_CREATE_VM */ 624304dcb64SAndre Przywara #define KVM_VM_S390_UCONTROL 1 625304dcb64SAndre Przywara 626304dcb64SAndre Przywara /* on ppc, 0 indicate default, 1 should force HV and 2 PR */ 627304dcb64SAndre Przywara #define KVM_VM_PPC_HV 1 628304dcb64SAndre Przywara #define KVM_VM_PPC_PR 2 629304dcb64SAndre Przywara 6305968b5ffSAnup Patel /* on MIPS, 0 indicates auto, 1 forces VZ ASE, 2 forces trap & emulate */ 6315968b5ffSAnup Patel #define KVM_VM_MIPS_AUTO 0 6321bbe92f5SDave Martin #define KVM_VM_MIPS_VZ 1 6335968b5ffSAnup Patel #define KVM_VM_MIPS_TE 2 6341bbe92f5SDave Martin 635304dcb64SAndre Przywara #define KVM_S390_SIE_PAGE_OFFSET 1 636304dcb64SAndre Przywara 637304dcb64SAndre Przywara /* 6381bbe92f5SDave Martin * On arm64, machine type can be used to request the physical 6391bbe92f5SDave Martin * address size for the VM. Bits[7-0] are reserved for the guest 6401bbe92f5SDave Martin * PA size shift (i.e, log2(PA_Size)). For backward compatibility, 6411bbe92f5SDave Martin * value 0 implies the default IPA size, 40bits. 6421bbe92f5SDave Martin */ 6431bbe92f5SDave Martin #define KVM_VM_TYPE_ARM_IPA_SIZE_MASK 0xffULL 6441bbe92f5SDave Martin #define KVM_VM_TYPE_ARM_IPA_SIZE(x) \ 6451bbe92f5SDave Martin ((x) & KVM_VM_TYPE_ARM_IPA_SIZE_MASK) 6461bbe92f5SDave Martin /* 647304dcb64SAndre Przywara * ioctls for /dev/kvm fds: 648304dcb64SAndre Przywara */ 649304dcb64SAndre Przywara #define KVM_GET_API_VERSION _IO(KVMIO, 0x00) 650304dcb64SAndre Przywara #define KVM_CREATE_VM _IO(KVMIO, 0x01) /* returns a VM fd */ 651304dcb64SAndre Przywara #define KVM_GET_MSR_INDEX_LIST _IOWR(KVMIO, 0x02, struct kvm_msr_list) 652304dcb64SAndre Przywara 653304dcb64SAndre Przywara #define KVM_S390_ENABLE_SIE _IO(KVMIO, 0x06) 654304dcb64SAndre Przywara /* 655304dcb64SAndre Przywara * Check if a kvm extension is available. Argument is extension number, 656304dcb64SAndre Przywara * return is 1 (yes) or 0 (no, sorry). 657304dcb64SAndre Przywara */ 658304dcb64SAndre Przywara #define KVM_CHECK_EXTENSION _IO(KVMIO, 0x03) 659304dcb64SAndre Przywara /* 660304dcb64SAndre Przywara * Get size for mmap(vcpu_fd) 661304dcb64SAndre Przywara */ 662304dcb64SAndre Przywara #define KVM_GET_VCPU_MMAP_SIZE _IO(KVMIO, 0x04) /* in bytes */ 663304dcb64SAndre Przywara #define KVM_GET_SUPPORTED_CPUID _IOWR(KVMIO, 0x05, struct kvm_cpuid2) 664304dcb64SAndre Przywara #define KVM_GET_EMULATED_CPUID _IOWR(KVMIO, 0x09, struct kvm_cpuid2) 6651bbe92f5SDave Martin #define KVM_GET_MSR_FEATURE_INDEX_LIST _IOWR(KVMIO, 0x0a, struct kvm_msr_list) 666304dcb64SAndre Przywara 667304dcb64SAndre Przywara /* 668304dcb64SAndre Przywara * Extension capability list. 669304dcb64SAndre Przywara */ 670304dcb64SAndre Przywara #define KVM_CAP_IRQCHIP 0 671304dcb64SAndre Przywara #define KVM_CAP_HLT 1 672304dcb64SAndre Przywara #define KVM_CAP_MMU_SHADOW_CACHE_CONTROL 2 673304dcb64SAndre Przywara #define KVM_CAP_USER_MEMORY 3 674304dcb64SAndre Przywara #define KVM_CAP_SET_TSS_ADDR 4 675304dcb64SAndre Przywara #define KVM_CAP_VAPIC 6 676304dcb64SAndre Przywara #define KVM_CAP_EXT_CPUID 7 677304dcb64SAndre Przywara #define KVM_CAP_CLOCKSOURCE 8 678304dcb64SAndre Przywara #define KVM_CAP_NR_VCPUS 9 /* returns recommended max vcpus per vm */ 679304dcb64SAndre Przywara #define KVM_CAP_NR_MEMSLOTS 10 /* returns max memory slots per vm */ 680304dcb64SAndre Przywara #define KVM_CAP_PIT 11 681304dcb64SAndre Przywara #define KVM_CAP_NOP_IO_DELAY 12 682304dcb64SAndre Przywara #define KVM_CAP_PV_MMU 13 683304dcb64SAndre Przywara #define KVM_CAP_MP_STATE 14 684304dcb64SAndre Przywara #define KVM_CAP_COALESCED_MMIO 15 685304dcb64SAndre Przywara #define KVM_CAP_SYNC_MMU 16 /* Changes to host mmap are reflected in guest */ 686304dcb64SAndre Przywara #define KVM_CAP_IOMMU 18 687304dcb64SAndre Przywara /* Bug in KVM_SET_USER_MEMORY_REGION fixed: */ 688304dcb64SAndre Przywara #define KVM_CAP_DESTROY_MEMORY_REGION_WORKS 21 689304dcb64SAndre Przywara #define KVM_CAP_USER_NMI 22 690304dcb64SAndre Przywara #define KVM_CAP_SET_GUEST_DEBUG 23 691304dcb64SAndre Przywara #ifdef __KVM_HAVE_PIT 692304dcb64SAndre Przywara #define KVM_CAP_REINJECT_CONTROL 24 693304dcb64SAndre Przywara #endif 694304dcb64SAndre Przywara #define KVM_CAP_IRQ_ROUTING 25 695304dcb64SAndre Przywara #define KVM_CAP_IRQ_INJECT_STATUS 26 696304dcb64SAndre Przywara #define KVM_CAP_ASSIGN_DEV_IRQ 29 697304dcb64SAndre Przywara /* Another bug in KVM_SET_USER_MEMORY_REGION fixed: */ 698304dcb64SAndre Przywara #define KVM_CAP_JOIN_MEMORY_REGIONS_WORKS 30 699304dcb64SAndre Przywara #ifdef __KVM_HAVE_MCE 700304dcb64SAndre Przywara #define KVM_CAP_MCE 31 701304dcb64SAndre Przywara #endif 702304dcb64SAndre Przywara #define KVM_CAP_IRQFD 32 703304dcb64SAndre Przywara #ifdef __KVM_HAVE_PIT 704304dcb64SAndre Przywara #define KVM_CAP_PIT2 33 705304dcb64SAndre Przywara #endif 706304dcb64SAndre Przywara #define KVM_CAP_SET_BOOT_CPU_ID 34 707304dcb64SAndre Przywara #ifdef __KVM_HAVE_PIT_STATE2 708304dcb64SAndre Przywara #define KVM_CAP_PIT_STATE2 35 709304dcb64SAndre Przywara #endif 710304dcb64SAndre Przywara #define KVM_CAP_IOEVENTFD 36 711304dcb64SAndre Przywara #define KVM_CAP_SET_IDENTITY_MAP_ADDR 37 712304dcb64SAndre Przywara #ifdef __KVM_HAVE_XEN_HVM 713304dcb64SAndre Przywara #define KVM_CAP_XEN_HVM 38 714304dcb64SAndre Przywara #endif 715304dcb64SAndre Przywara #define KVM_CAP_ADJUST_CLOCK 39 716304dcb64SAndre Przywara #define KVM_CAP_INTERNAL_ERROR_DATA 40 717304dcb64SAndre Przywara #ifdef __KVM_HAVE_VCPU_EVENTS 718304dcb64SAndre Przywara #define KVM_CAP_VCPU_EVENTS 41 719304dcb64SAndre Przywara #endif 720304dcb64SAndre Przywara #define KVM_CAP_S390_PSW 42 721304dcb64SAndre Przywara #define KVM_CAP_PPC_SEGSTATE 43 722304dcb64SAndre Przywara #define KVM_CAP_HYPERV 44 723304dcb64SAndre Przywara #define KVM_CAP_HYPERV_VAPIC 45 724304dcb64SAndre Przywara #define KVM_CAP_HYPERV_SPIN 46 725304dcb64SAndre Przywara #define KVM_CAP_PCI_SEGMENT 47 726304dcb64SAndre Przywara #define KVM_CAP_PPC_PAIRED_SINGLES 48 727304dcb64SAndre Przywara #define KVM_CAP_INTR_SHADOW 49 728304dcb64SAndre Przywara #ifdef __KVM_HAVE_DEBUGREGS 729304dcb64SAndre Przywara #define KVM_CAP_DEBUGREGS 50 730304dcb64SAndre Przywara #endif 731304dcb64SAndre Przywara #define KVM_CAP_X86_ROBUST_SINGLESTEP 51 732304dcb64SAndre Przywara #define KVM_CAP_PPC_OSI 52 733304dcb64SAndre Przywara #define KVM_CAP_PPC_UNSET_IRQ 53 734304dcb64SAndre Przywara #define KVM_CAP_ENABLE_CAP 54 735304dcb64SAndre Przywara #ifdef __KVM_HAVE_XSAVE 736304dcb64SAndre Przywara #define KVM_CAP_XSAVE 55 737304dcb64SAndre Przywara #endif 738304dcb64SAndre Przywara #ifdef __KVM_HAVE_XCRS 739304dcb64SAndre Przywara #define KVM_CAP_XCRS 56 740304dcb64SAndre Przywara #endif 741304dcb64SAndre Przywara #define KVM_CAP_PPC_GET_PVINFO 57 742304dcb64SAndre Przywara #define KVM_CAP_PPC_IRQ_LEVEL 58 743304dcb64SAndre Przywara #define KVM_CAP_ASYNC_PF 59 744304dcb64SAndre Przywara #define KVM_CAP_TSC_CONTROL 60 745304dcb64SAndre Przywara #define KVM_CAP_GET_TSC_KHZ 61 746304dcb64SAndre Przywara #define KVM_CAP_PPC_BOOKE_SREGS 62 747304dcb64SAndre Przywara #define KVM_CAP_SPAPR_TCE 63 748304dcb64SAndre Przywara #define KVM_CAP_PPC_SMT 64 749304dcb64SAndre Przywara #define KVM_CAP_PPC_RMA 65 750304dcb64SAndre Przywara #define KVM_CAP_MAX_VCPUS 66 /* returns max vcpus per vm */ 751304dcb64SAndre Przywara #define KVM_CAP_PPC_HIOR 67 752304dcb64SAndre Przywara #define KVM_CAP_PPC_PAPR 68 753304dcb64SAndre Przywara #define KVM_CAP_SW_TLB 69 754304dcb64SAndre Przywara #define KVM_CAP_ONE_REG 70 755304dcb64SAndre Przywara #define KVM_CAP_S390_GMAP 71 756304dcb64SAndre Przywara #define KVM_CAP_TSC_DEADLINE_TIMER 72 757304dcb64SAndre Przywara #define KVM_CAP_S390_UCONTROL 73 758304dcb64SAndre Przywara #define KVM_CAP_SYNC_REGS 74 759304dcb64SAndre Przywara #define KVM_CAP_PCI_2_3 75 760304dcb64SAndre Przywara #define KVM_CAP_KVMCLOCK_CTRL 76 761304dcb64SAndre Przywara #define KVM_CAP_SIGNAL_MSI 77 762304dcb64SAndre Przywara #define KVM_CAP_PPC_GET_SMMU_INFO 78 763304dcb64SAndre Przywara #define KVM_CAP_S390_COW 79 764304dcb64SAndre Przywara #define KVM_CAP_PPC_ALLOC_HTAB 80 765304dcb64SAndre Przywara #define KVM_CAP_READONLY_MEM 81 766304dcb64SAndre Przywara #define KVM_CAP_IRQFD_RESAMPLE 82 767304dcb64SAndre Przywara #define KVM_CAP_PPC_BOOKE_WATCHDOG 83 768304dcb64SAndre Przywara #define KVM_CAP_PPC_HTAB_FD 84 769304dcb64SAndre Przywara #define KVM_CAP_S390_CSS_SUPPORT 85 770304dcb64SAndre Przywara #define KVM_CAP_PPC_EPR 86 771304dcb64SAndre Przywara #define KVM_CAP_ARM_PSCI 87 772304dcb64SAndre Przywara #define KVM_CAP_ARM_SET_DEVICE_ADDR 88 773304dcb64SAndre Przywara #define KVM_CAP_DEVICE_CTRL 89 774304dcb64SAndre Przywara #define KVM_CAP_IRQ_MPIC 90 775304dcb64SAndre Przywara #define KVM_CAP_PPC_RTAS 91 776304dcb64SAndre Przywara #define KVM_CAP_IRQ_XICS 92 777304dcb64SAndre Przywara #define KVM_CAP_ARM_EL1_32BIT 93 778304dcb64SAndre Przywara #define KVM_CAP_SPAPR_MULTITCE 94 779304dcb64SAndre Przywara #define KVM_CAP_EXT_EMUL_CPUID 95 780304dcb64SAndre Przywara #define KVM_CAP_HYPERV_TIME 96 781304dcb64SAndre Przywara #define KVM_CAP_IOAPIC_POLARITY_IGNORED 97 782304dcb64SAndre Przywara #define KVM_CAP_ENABLE_CAP_VM 98 783304dcb64SAndre Przywara #define KVM_CAP_S390_IRQCHIP 99 784304dcb64SAndre Przywara #define KVM_CAP_IOEVENTFD_NO_LENGTH 100 785304dcb64SAndre Przywara #define KVM_CAP_VM_ATTRIBUTES 101 786304dcb64SAndre Przywara #define KVM_CAP_ARM_PSCI_0_2 102 787304dcb64SAndre Przywara #define KVM_CAP_PPC_FIXUP_HCALL 103 788304dcb64SAndre Przywara #define KVM_CAP_PPC_ENABLE_HCALL 104 789304dcb64SAndre Przywara #define KVM_CAP_CHECK_EXTENSION_VM 105 790304dcb64SAndre Przywara #define KVM_CAP_S390_USER_SIGP 106 791304dcb64SAndre Przywara #define KVM_CAP_S390_VECTOR_REGISTERS 107 792304dcb64SAndre Przywara #define KVM_CAP_S390_MEM_OP 108 793304dcb64SAndre Przywara #define KVM_CAP_S390_USER_STSI 109 794304dcb64SAndre Przywara #define KVM_CAP_S390_SKEYS 110 795304dcb64SAndre Przywara #define KVM_CAP_MIPS_FPU 111 796304dcb64SAndre Przywara #define KVM_CAP_MIPS_MSA 112 797304dcb64SAndre Przywara #define KVM_CAP_S390_INJECT_IRQ 113 798304dcb64SAndre Przywara #define KVM_CAP_S390_IRQ_STATE 114 799304dcb64SAndre Przywara #define KVM_CAP_PPC_HWRNG 115 800b3f606e1SMarc Zyngier #define KVM_CAP_DISABLE_QUIRKS 116 801b3f606e1SMarc Zyngier #define KVM_CAP_X86_SMM 117 802b3f606e1SMarc Zyngier #define KVM_CAP_MULTI_ADDRESS_SPACE 118 803b3f606e1SMarc Zyngier #define KVM_CAP_GUEST_DEBUG_HW_BPS 119 804b3f606e1SMarc Zyngier #define KVM_CAP_GUEST_DEBUG_HW_WPS 120 805b3f606e1SMarc Zyngier #define KVM_CAP_SPLIT_IRQCHIP 121 806b3f606e1SMarc Zyngier #define KVM_CAP_IOEVENTFD_ANY_LENGTH 122 807b3f606e1SMarc Zyngier #define KVM_CAP_HYPERV_SYNIC 123 808b3f606e1SMarc Zyngier #define KVM_CAP_S390_RI 124 809b37ed70eSAndre Przywara #define KVM_CAP_SPAPR_TCE_64 125 810b37ed70eSAndre Przywara #define KVM_CAP_ARM_PMU_V3 126 811b37ed70eSAndre Przywara #define KVM_CAP_VCPU_ATTRIBUTES 127 812764dfba1SAndre Przywara #define KVM_CAP_MAX_VCPU_ID 128 813764dfba1SAndre Przywara #define KVM_CAP_X2APIC_API 129 814764dfba1SAndre Przywara #define KVM_CAP_S390_USER_INSTR0 130 815764dfba1SAndre Przywara #define KVM_CAP_MSI_DEVID 131 816764dfba1SAndre Przywara #define KVM_CAP_PPC_HTM 132 817764dfba1SAndre Przywara #define KVM_CAP_SPAPR_RESIZE_HPT 133 818764dfba1SAndre Przywara #define KVM_CAP_PPC_MMU_RADIX 134 819764dfba1SAndre Przywara #define KVM_CAP_PPC_MMU_HASH_V3 135 820764dfba1SAndre Przywara #define KVM_CAP_IMMEDIATE_EXIT 136 8211bbe92f5SDave Martin #define KVM_CAP_MIPS_VZ 137 8221bbe92f5SDave Martin #define KVM_CAP_MIPS_TE 138 8231bbe92f5SDave Martin #define KVM_CAP_MIPS_64BIT 139 8241bbe92f5SDave Martin #define KVM_CAP_S390_GS 140 8251bbe92f5SDave Martin #define KVM_CAP_S390_AIS 141 8261bbe92f5SDave Martin #define KVM_CAP_SPAPR_TCE_VFIO 142 8271bbe92f5SDave Martin #define KVM_CAP_X86_DISABLE_EXITS 143 8281bbe92f5SDave Martin #define KVM_CAP_ARM_USER_IRQ 144 8291bbe92f5SDave Martin #define KVM_CAP_S390_CMMA_MIGRATION 145 8301bbe92f5SDave Martin #define KVM_CAP_PPC_FWNMI 146 8311bbe92f5SDave Martin #define KVM_CAP_PPC_SMT_POSSIBLE 147 8321bbe92f5SDave Martin #define KVM_CAP_HYPERV_SYNIC2 148 8331bbe92f5SDave Martin #define KVM_CAP_HYPERV_VP_INDEX 149 8341bbe92f5SDave Martin #define KVM_CAP_S390_AIS_MIGRATION 150 8351bbe92f5SDave Martin #define KVM_CAP_PPC_GET_CPU_CHAR 151 8361bbe92f5SDave Martin #define KVM_CAP_S390_BPB 152 8371bbe92f5SDave Martin #define KVM_CAP_GET_MSR_FEATURES 153 8381bbe92f5SDave Martin #define KVM_CAP_HYPERV_EVENTFD 154 8391bbe92f5SDave Martin #define KVM_CAP_HYPERV_TLBFLUSH 155 8401bbe92f5SDave Martin #define KVM_CAP_S390_HPAGE_1M 156 8411bbe92f5SDave Martin #define KVM_CAP_NESTED_STATE 157 8421bbe92f5SDave Martin #define KVM_CAP_ARM_INJECT_SERROR_ESR 158 8431bbe92f5SDave Martin #define KVM_CAP_MSR_PLATFORM_INFO 159 8441bbe92f5SDave Martin #define KVM_CAP_PPC_NESTED_HV 160 8451bbe92f5SDave Martin #define KVM_CAP_HYPERV_SEND_IPI 161 8461bbe92f5SDave Martin #define KVM_CAP_COALESCED_PIO 162 8471bbe92f5SDave Martin #define KVM_CAP_HYPERV_ENLIGHTENED_VMCS 163 8481bbe92f5SDave Martin #define KVM_CAP_EXCEPTION_PAYLOAD 164 8491bbe92f5SDave Martin #define KVM_CAP_ARM_VM_IPA_SIZE 165 85066b24a33SWill Deacon #define KVM_CAP_MANUAL_DIRTY_LOG_PROTECT 166 /* Obsolete */ 8511bbe92f5SDave Martin #define KVM_CAP_HYPERV_CPUID 167 85266b24a33SWill Deacon #define KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2 168 85366b24a33SWill Deacon #define KVM_CAP_PPC_IRQ_XIVE 169 85466b24a33SWill Deacon #define KVM_CAP_ARM_SVE 170 85566b24a33SWill Deacon #define KVM_CAP_ARM_PTRAUTH_ADDRESS 171 85666b24a33SWill Deacon #define KVM_CAP_ARM_PTRAUTH_GENERIC 172 85766b24a33SWill Deacon #define KVM_CAP_PMU_EVENT_FILTER 173 8585968b5ffSAnup Patel #define KVM_CAP_ARM_IRQ_LINE_LAYOUT_2 174 8595968b5ffSAnup Patel #define KVM_CAP_HYPERV_DIRECT_TLBFLUSH 175 8605968b5ffSAnup Patel #define KVM_CAP_PPC_GUEST_DEBUG_SSTEP 176 8615968b5ffSAnup Patel #define KVM_CAP_ARM_NISV_TO_USER 177 8625968b5ffSAnup Patel #define KVM_CAP_ARM_INJECT_EXT_DABT 178 8635968b5ffSAnup Patel #define KVM_CAP_S390_VCPU_RESETS 179 8645968b5ffSAnup Patel #define KVM_CAP_S390_PROTECTED 180 8655968b5ffSAnup Patel #define KVM_CAP_PPC_SECURE_GUEST 181 8665968b5ffSAnup Patel #define KVM_CAP_HALT_POLL 182 8675968b5ffSAnup Patel #define KVM_CAP_ASYNC_PF_INT 183 8685968b5ffSAnup Patel #define KVM_CAP_LAST_CPU 184 8695968b5ffSAnup Patel #define KVM_CAP_SMALLER_MAXPHYADDR 185 8705968b5ffSAnup Patel #define KVM_CAP_S390_DIAG318 186 8715968b5ffSAnup Patel #define KVM_CAP_STEAL_TIME 187 8725968b5ffSAnup Patel #define KVM_CAP_X86_USER_SPACE_MSR 188 8735968b5ffSAnup Patel #define KVM_CAP_X86_MSR_FILTER 189 8745968b5ffSAnup Patel #define KVM_CAP_ENFORCE_PV_FEATURE_CPUID 190 8755968b5ffSAnup Patel #define KVM_CAP_SYS_HYPERV_CPUID 191 8765968b5ffSAnup Patel #define KVM_CAP_DIRTY_LOG_RING 192 8775968b5ffSAnup Patel #define KVM_CAP_X86_BUS_LOCK_EXIT 193 8785968b5ffSAnup Patel #define KVM_CAP_PPC_DAWR1 194 8795968b5ffSAnup Patel #define KVM_CAP_SET_GUEST_DEBUG2 195 8805968b5ffSAnup Patel #define KVM_CAP_SGX_ATTRIBUTE 196 8815968b5ffSAnup Patel #define KVM_CAP_VM_COPY_ENC_CONTEXT_FROM 197 8825968b5ffSAnup Patel #define KVM_CAP_PTP_KVM 198 8835968b5ffSAnup Patel #define KVM_CAP_HYPERV_ENFORCE_CPUID 199 8845968b5ffSAnup Patel #define KVM_CAP_SREGS2 200 8855968b5ffSAnup Patel #define KVM_CAP_EXIT_HYPERCALL 201 8865968b5ffSAnup Patel #define KVM_CAP_PPC_RPT_INVALIDATE 202 8875968b5ffSAnup Patel #define KVM_CAP_BINARY_STATS_FD 203 8885968b5ffSAnup Patel #define KVM_CAP_EXIT_ON_EMULATION_FAILURE 204 8895968b5ffSAnup Patel #define KVM_CAP_ARM_MTE 205 8905968b5ffSAnup Patel #define KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM 206 891af1b793cSAlexandru Elisei #define KVM_CAP_VM_GPA_BITS 207 892af1b793cSAlexandru Elisei #define KVM_CAP_XSAVE2 208 893af1b793cSAlexandru Elisei #define KVM_CAP_SYS_ATTRIBUTES 209 894af1b793cSAlexandru Elisei #define KVM_CAP_PPC_AIL_MODE_3 210 895083a976eSAlexandru Elisei #define KVM_CAP_S390_MEM_OP_EXTENSION 211 896083a976eSAlexandru Elisei #define KVM_CAP_PMU_CAPABILITY 212 897083a976eSAlexandru Elisei #define KVM_CAP_DISABLE_QUIRKS2 213 8988d0facecSAnup Patel #define KVM_CAP_VM_TSC_CONTROL 214 8998d0facecSAnup Patel #define KVM_CAP_SYSTEM_EVENT_DATA 215 9008d0facecSAnup Patel #define KVM_CAP_ARM_SYSTEM_SUSPEND 216 9018d0facecSAnup Patel #define KVM_CAP_S390_PROTECTED_DUMP 217 9028d0facecSAnup Patel #define KVM_CAP_X86_TRIPLE_FAULT_EVENT 218 9038d0facecSAnup Patel #define KVM_CAP_X86_NOTIFY_VMEXIT 219 9048d0facecSAnup Patel #define KVM_CAP_VM_DISABLE_NX_HUGE_PAGES 220 9058d0facecSAnup Patel #define KVM_CAP_S390_ZPCI_OP 221 9068d0facecSAnup Patel #define KVM_CAP_S390_CPU_TOPOLOGY 222 90776dfc0cfSAnup Patel #define KVM_CAP_DIRTY_LOG_RING_ACQ_REL 223 908be986824SAnup Patel #define KVM_CAP_S390_PROTECTED_ASYNC_DISABLE 224 909be986824SAnup Patel #define KVM_CAP_DIRTY_LOG_RING_WITH_BITMAP 225 910be986824SAnup Patel #define KVM_CAP_PMU_EVENT_MASKED_EVENTS 226 911be986824SAnup Patel #define KVM_CAP_COUNTER_OFFSET 227 91226c85896SAnup Patel #define KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE 228 91326c85896SAnup Patel #define KVM_CAP_ARM_SUPPORTED_BLOCK_SIZES 229 91492ef2dcdSWill Deacon #define KVM_CAP_ARM_SUPPORTED_REG_MASK_RANGES 230 91599684681SAnup Patel #define KVM_CAP_USER_MEMORY2 231 91699684681SAnup Patel #define KVM_CAP_MEMORY_FAULT_INFO 232 91799684681SAnup Patel #define KVM_CAP_MEMORY_ATTRIBUTES 233 91899684681SAnup Patel #define KVM_CAP_GUEST_MEMFD 234 91999684681SAnup Patel #define KVM_CAP_VM_TYPES 235 920304dcb64SAndre Przywara 921304dcb64SAndre Przywara struct kvm_irq_routing_irqchip { 922304dcb64SAndre Przywara __u32 irqchip; 923304dcb64SAndre Przywara __u32 pin; 924304dcb64SAndre Przywara }; 925304dcb64SAndre Przywara 926304dcb64SAndre Przywara struct kvm_irq_routing_msi { 927304dcb64SAndre Przywara __u32 address_lo; 928304dcb64SAndre Przywara __u32 address_hi; 929304dcb64SAndre Przywara __u32 data; 930764dfba1SAndre Przywara union { 931304dcb64SAndre Przywara __u32 pad; 932764dfba1SAndre Przywara __u32 devid; 933764dfba1SAndre Przywara }; 934304dcb64SAndre Przywara }; 935304dcb64SAndre Przywara 936304dcb64SAndre Przywara struct kvm_irq_routing_s390_adapter { 937304dcb64SAndre Przywara __u64 ind_addr; 938304dcb64SAndre Przywara __u64 summary_addr; 939304dcb64SAndre Przywara __u64 ind_offset; 940304dcb64SAndre Przywara __u32 summary_offset; 941304dcb64SAndre Przywara __u32 adapter_id; 942304dcb64SAndre Przywara }; 943304dcb64SAndre Przywara 944b3f606e1SMarc Zyngier struct kvm_irq_routing_hv_sint { 945b3f606e1SMarc Zyngier __u32 vcpu; 946b3f606e1SMarc Zyngier __u32 sint; 947b3f606e1SMarc Zyngier }; 948b3f606e1SMarc Zyngier 949af1b793cSAlexandru Elisei struct kvm_irq_routing_xen_evtchn { 950af1b793cSAlexandru Elisei __u32 port; 951af1b793cSAlexandru Elisei __u32 vcpu; 952af1b793cSAlexandru Elisei __u32 priority; 953af1b793cSAlexandru Elisei }; 954af1b793cSAlexandru Elisei 955af1b793cSAlexandru Elisei #define KVM_IRQ_ROUTING_XEN_EVTCHN_PRIO_2LEVEL ((__u32)(-1)) 956af1b793cSAlexandru Elisei 957304dcb64SAndre Przywara /* gsi routing entry types */ 958304dcb64SAndre Przywara #define KVM_IRQ_ROUTING_IRQCHIP 1 959304dcb64SAndre Przywara #define KVM_IRQ_ROUTING_MSI 2 960304dcb64SAndre Przywara #define KVM_IRQ_ROUTING_S390_ADAPTER 3 961b3f606e1SMarc Zyngier #define KVM_IRQ_ROUTING_HV_SINT 4 962af1b793cSAlexandru Elisei #define KVM_IRQ_ROUTING_XEN_EVTCHN 5 963304dcb64SAndre Przywara 964304dcb64SAndre Przywara struct kvm_irq_routing_entry { 965304dcb64SAndre Przywara __u32 gsi; 966304dcb64SAndre Przywara __u32 type; 967304dcb64SAndre Przywara __u32 flags; 968304dcb64SAndre Przywara __u32 pad; 969304dcb64SAndre Przywara union { 970304dcb64SAndre Przywara struct kvm_irq_routing_irqchip irqchip; 971304dcb64SAndre Przywara struct kvm_irq_routing_msi msi; 972304dcb64SAndre Przywara struct kvm_irq_routing_s390_adapter adapter; 973b3f606e1SMarc Zyngier struct kvm_irq_routing_hv_sint hv_sint; 974af1b793cSAlexandru Elisei struct kvm_irq_routing_xen_evtchn xen_evtchn; 975304dcb64SAndre Przywara __u32 pad[8]; 976304dcb64SAndre Przywara } u; 977304dcb64SAndre Przywara }; 978304dcb64SAndre Przywara 979304dcb64SAndre Przywara struct kvm_irq_routing { 980304dcb64SAndre Przywara __u32 nr; 981304dcb64SAndre Przywara __u32 flags; 9828d0facecSAnup Patel struct kvm_irq_routing_entry entries[]; 983304dcb64SAndre Przywara }; 984304dcb64SAndre Przywara 985304dcb64SAndre Przywara #define KVM_IRQFD_FLAG_DEASSIGN (1 << 0) 986304dcb64SAndre Przywara /* 987304dcb64SAndre Przywara * Available with KVM_CAP_IRQFD_RESAMPLE 988304dcb64SAndre Przywara * 989304dcb64SAndre Przywara * KVM_IRQFD_FLAG_RESAMPLE indicates resamplefd is valid and specifies 990304dcb64SAndre Przywara * the irqfd to operate in resampling mode for level triggered interrupt 9915968b5ffSAnup Patel * emulation. See Documentation/virt/kvm/api.rst. 992304dcb64SAndre Przywara */ 993304dcb64SAndre Przywara #define KVM_IRQFD_FLAG_RESAMPLE (1 << 1) 994304dcb64SAndre Przywara 995304dcb64SAndre Przywara struct kvm_irqfd { 996304dcb64SAndre Przywara __u32 fd; 997304dcb64SAndre Przywara __u32 gsi; 998304dcb64SAndre Przywara __u32 flags; 999304dcb64SAndre Przywara __u32 resamplefd; 1000304dcb64SAndre Przywara __u8 pad[16]; 1001304dcb64SAndre Przywara }; 1002304dcb64SAndre Przywara 1003764dfba1SAndre Przywara /* For KVM_CAP_ADJUST_CLOCK */ 1004764dfba1SAndre Przywara 1005764dfba1SAndre Przywara /* Do not use 1, KVM_CHECK_EXTENSION returned it before we had flags. */ 1006764dfba1SAndre Przywara #define KVM_CLOCK_TSC_STABLE 2 10075968b5ffSAnup Patel #define KVM_CLOCK_REALTIME (1 << 2) 10085968b5ffSAnup Patel #define KVM_CLOCK_HOST_TSC (1 << 3) 1009764dfba1SAndre Przywara 1010304dcb64SAndre Przywara struct kvm_clock_data { 1011304dcb64SAndre Przywara __u64 clock; 1012304dcb64SAndre Przywara __u32 flags; 10135968b5ffSAnup Patel __u32 pad0; 10145968b5ffSAnup Patel __u64 realtime; 10155968b5ffSAnup Patel __u64 host_tsc; 10165968b5ffSAnup Patel __u32 pad[4]; 1017304dcb64SAndre Przywara }; 1018304dcb64SAndre Przywara 1019764dfba1SAndre Przywara /* For KVM_CAP_SW_TLB */ 1020764dfba1SAndre Przywara 1021304dcb64SAndre Przywara #define KVM_MMU_FSL_BOOKE_NOHV 0 1022304dcb64SAndre Przywara #define KVM_MMU_FSL_BOOKE_HV 1 1023304dcb64SAndre Przywara 1024304dcb64SAndre Przywara struct kvm_config_tlb { 1025304dcb64SAndre Przywara __u64 params; 1026304dcb64SAndre Przywara __u64 array; 1027304dcb64SAndre Przywara __u32 mmu_type; 1028304dcb64SAndre Przywara __u32 array_len; 1029304dcb64SAndre Przywara }; 1030304dcb64SAndre Przywara 1031304dcb64SAndre Przywara struct kvm_dirty_tlb { 1032304dcb64SAndre Przywara __u64 bitmap; 1033304dcb64SAndre Przywara __u32 num_dirty; 1034304dcb64SAndre Przywara }; 1035304dcb64SAndre Przywara 1036304dcb64SAndre Przywara /* Available with KVM_CAP_ONE_REG */ 1037304dcb64SAndre Przywara 1038304dcb64SAndre Przywara #define KVM_REG_ARCH_MASK 0xff00000000000000ULL 1039304dcb64SAndre Przywara #define KVM_REG_GENERIC 0x0000000000000000ULL 1040304dcb64SAndre Przywara 1041304dcb64SAndre Przywara /* 1042304dcb64SAndre Przywara * Architecture specific registers are to be defined in arch headers and 1043304dcb64SAndre Przywara * ORed with the arch identifier. 1044304dcb64SAndre Przywara */ 1045304dcb64SAndre Przywara #define KVM_REG_PPC 0x1000000000000000ULL 1046304dcb64SAndre Przywara #define KVM_REG_X86 0x2000000000000000ULL 1047304dcb64SAndre Przywara #define KVM_REG_IA64 0x3000000000000000ULL 1048304dcb64SAndre Przywara #define KVM_REG_ARM 0x4000000000000000ULL 1049304dcb64SAndre Przywara #define KVM_REG_S390 0x5000000000000000ULL 1050304dcb64SAndre Przywara #define KVM_REG_ARM64 0x6000000000000000ULL 1051304dcb64SAndre Przywara #define KVM_REG_MIPS 0x7000000000000000ULL 10525968b5ffSAnup Patel #define KVM_REG_RISCV 0x8000000000000000ULL 105392ef2dcdSWill Deacon #define KVM_REG_LOONGARCH 0x9000000000000000ULL 1054304dcb64SAndre Przywara 1055304dcb64SAndre Przywara #define KVM_REG_SIZE_SHIFT 52 1056304dcb64SAndre Przywara #define KVM_REG_SIZE_MASK 0x00f0000000000000ULL 1057304dcb64SAndre Przywara #define KVM_REG_SIZE_U8 0x0000000000000000ULL 1058304dcb64SAndre Przywara #define KVM_REG_SIZE_U16 0x0010000000000000ULL 1059304dcb64SAndre Przywara #define KVM_REG_SIZE_U32 0x0020000000000000ULL 1060304dcb64SAndre Przywara #define KVM_REG_SIZE_U64 0x0030000000000000ULL 1061304dcb64SAndre Przywara #define KVM_REG_SIZE_U128 0x0040000000000000ULL 1062304dcb64SAndre Przywara #define KVM_REG_SIZE_U256 0x0050000000000000ULL 1063304dcb64SAndre Przywara #define KVM_REG_SIZE_U512 0x0060000000000000ULL 1064304dcb64SAndre Przywara #define KVM_REG_SIZE_U1024 0x0070000000000000ULL 106566b24a33SWill Deacon #define KVM_REG_SIZE_U2048 0x0080000000000000ULL 1066304dcb64SAndre Przywara 1067304dcb64SAndre Przywara struct kvm_reg_list { 1068304dcb64SAndre Przywara __u64 n; /* number of regs */ 10698d0facecSAnup Patel __u64 reg[]; 1070304dcb64SAndre Przywara }; 1071304dcb64SAndre Przywara 1072304dcb64SAndre Przywara struct kvm_one_reg { 1073304dcb64SAndre Przywara __u64 id; 1074304dcb64SAndre Przywara __u64 addr; 1075304dcb64SAndre Przywara }; 1076304dcb64SAndre Przywara 1077764dfba1SAndre Przywara #define KVM_MSI_VALID_DEVID (1U << 0) 1078304dcb64SAndre Przywara struct kvm_msi { 1079304dcb64SAndre Przywara __u32 address_lo; 1080304dcb64SAndre Przywara __u32 address_hi; 1081304dcb64SAndre Przywara __u32 data; 1082304dcb64SAndre Przywara __u32 flags; 1083764dfba1SAndre Przywara __u32 devid; 1084764dfba1SAndre Przywara __u8 pad[12]; 1085304dcb64SAndre Przywara }; 1086304dcb64SAndre Przywara 1087304dcb64SAndre Przywara struct kvm_arm_device_addr { 1088304dcb64SAndre Przywara __u64 id; 1089304dcb64SAndre Przywara __u64 addr; 1090304dcb64SAndre Przywara }; 1091304dcb64SAndre Przywara 1092304dcb64SAndre Przywara /* 1093304dcb64SAndre Przywara * Device control API, available with KVM_CAP_DEVICE_CTRL 1094304dcb64SAndre Przywara */ 1095304dcb64SAndre Przywara #define KVM_CREATE_DEVICE_TEST 1 1096304dcb64SAndre Przywara 1097304dcb64SAndre Przywara struct kvm_create_device { 1098304dcb64SAndre Przywara __u32 type; /* in: KVM_DEV_TYPE_xxx */ 1099304dcb64SAndre Przywara __u32 fd; /* out: device handle */ 1100304dcb64SAndre Przywara __u32 flags; /* in: KVM_CREATE_DEVICE_xxx */ 1101304dcb64SAndre Przywara }; 1102304dcb64SAndre Przywara 1103304dcb64SAndre Przywara struct kvm_device_attr { 1104304dcb64SAndre Przywara __u32 flags; /* no flags currently defined */ 1105304dcb64SAndre Przywara __u32 group; /* device-defined */ 1106304dcb64SAndre Przywara __u64 attr; /* group-defined */ 1107304dcb64SAndre Przywara __u64 addr; /* userspace address of attr data */ 1108304dcb64SAndre Przywara }; 1109304dcb64SAndre Przywara 111026c85896SAnup Patel #define KVM_DEV_VFIO_FILE 1 111126c85896SAnup Patel 111226c85896SAnup Patel #define KVM_DEV_VFIO_FILE_ADD 1 111326c85896SAnup Patel #define KVM_DEV_VFIO_FILE_DEL 2 111426c85896SAnup Patel 111526c85896SAnup Patel /* KVM_DEV_VFIO_GROUP aliases are for compile time uapi compatibility */ 111626c85896SAnup Patel #define KVM_DEV_VFIO_GROUP KVM_DEV_VFIO_FILE 111726c85896SAnup Patel 111826c85896SAnup Patel #define KVM_DEV_VFIO_GROUP_ADD KVM_DEV_VFIO_FILE_ADD 111926c85896SAnup Patel #define KVM_DEV_VFIO_GROUP_DEL KVM_DEV_VFIO_FILE_DEL 11201bbe92f5SDave Martin #define KVM_DEV_VFIO_GROUP_SET_SPAPR_TCE 3 1121304dcb64SAndre Przywara 1122304dcb64SAndre Przywara enum kvm_device_type { 1123304dcb64SAndre Przywara KVM_DEV_TYPE_FSL_MPIC_20 = 1, 1124304dcb64SAndre Przywara #define KVM_DEV_TYPE_FSL_MPIC_20 KVM_DEV_TYPE_FSL_MPIC_20 1125304dcb64SAndre Przywara KVM_DEV_TYPE_FSL_MPIC_42, 1126304dcb64SAndre Przywara #define KVM_DEV_TYPE_FSL_MPIC_42 KVM_DEV_TYPE_FSL_MPIC_42 1127304dcb64SAndre Przywara KVM_DEV_TYPE_XICS, 1128304dcb64SAndre Przywara #define KVM_DEV_TYPE_XICS KVM_DEV_TYPE_XICS 1129304dcb64SAndre Przywara KVM_DEV_TYPE_VFIO, 1130304dcb64SAndre Przywara #define KVM_DEV_TYPE_VFIO KVM_DEV_TYPE_VFIO 1131304dcb64SAndre Przywara KVM_DEV_TYPE_ARM_VGIC_V2, 1132304dcb64SAndre Przywara #define KVM_DEV_TYPE_ARM_VGIC_V2 KVM_DEV_TYPE_ARM_VGIC_V2 1133304dcb64SAndre Przywara KVM_DEV_TYPE_FLIC, 1134304dcb64SAndre Przywara #define KVM_DEV_TYPE_FLIC KVM_DEV_TYPE_FLIC 1135304dcb64SAndre Przywara KVM_DEV_TYPE_ARM_VGIC_V3, 1136304dcb64SAndre Przywara #define KVM_DEV_TYPE_ARM_VGIC_V3 KVM_DEV_TYPE_ARM_VGIC_V3 1137764dfba1SAndre Przywara KVM_DEV_TYPE_ARM_VGIC_ITS, 1138764dfba1SAndre Przywara #define KVM_DEV_TYPE_ARM_VGIC_ITS KVM_DEV_TYPE_ARM_VGIC_ITS 113966b24a33SWill Deacon KVM_DEV_TYPE_XIVE, 114066b24a33SWill Deacon #define KVM_DEV_TYPE_XIVE KVM_DEV_TYPE_XIVE 11415968b5ffSAnup Patel KVM_DEV_TYPE_ARM_PV_TIME, 11425968b5ffSAnup Patel #define KVM_DEV_TYPE_ARM_PV_TIME KVM_DEV_TYPE_ARM_PV_TIME 114326c85896SAnup Patel KVM_DEV_TYPE_RISCV_AIA, 114426c85896SAnup Patel #define KVM_DEV_TYPE_RISCV_AIA KVM_DEV_TYPE_RISCV_AIA 1145304dcb64SAndre Przywara KVM_DEV_TYPE_MAX, 1146304dcb64SAndre Przywara }; 1147304dcb64SAndre Przywara 11481bbe92f5SDave Martin struct kvm_vfio_spapr_tce { 11491bbe92f5SDave Martin __s32 groupfd; 11501bbe92f5SDave Martin __s32 tablefd; 11511bbe92f5SDave Martin }; 11521bbe92f5SDave Martin 1153304dcb64SAndre Przywara /* 1154304dcb64SAndre Przywara * KVM_CREATE_VCPU receives as a parameter the vcpu slot, and returns 1155304dcb64SAndre Przywara * a vcpu fd. 1156304dcb64SAndre Przywara */ 1157304dcb64SAndre Przywara #define KVM_CREATE_VCPU _IO(KVMIO, 0x41) 1158304dcb64SAndre Przywara #define KVM_GET_DIRTY_LOG _IOW(KVMIO, 0x42, struct kvm_dirty_log) 1159304dcb64SAndre Przywara #define KVM_SET_NR_MMU_PAGES _IO(KVMIO, 0x44) 1160be986824SAnup Patel #define KVM_GET_NR_MMU_PAGES _IO(KVMIO, 0x45) /* deprecated */ 1161304dcb64SAndre Przywara #define KVM_SET_USER_MEMORY_REGION _IOW(KVMIO, 0x46, \ 1162304dcb64SAndre Przywara struct kvm_userspace_memory_region) 1163304dcb64SAndre Przywara #define KVM_SET_TSS_ADDR _IO(KVMIO, 0x47) 1164304dcb64SAndre Przywara #define KVM_SET_IDENTITY_MAP_ADDR _IOW(KVMIO, 0x48, __u64) 116599684681SAnup Patel #define KVM_SET_USER_MEMORY_REGION2 _IOW(KVMIO, 0x49, \ 116699684681SAnup Patel struct kvm_userspace_memory_region2) 1167304dcb64SAndre Przywara 1168304dcb64SAndre Przywara /* enable ucontrol for s390 */ 1169304dcb64SAndre Przywara #define KVM_S390_UCAS_MAP _IOW(KVMIO, 0x50, struct kvm_s390_ucas_mapping) 1170304dcb64SAndre Przywara #define KVM_S390_UCAS_UNMAP _IOW(KVMIO, 0x51, struct kvm_s390_ucas_mapping) 1171304dcb64SAndre Przywara #define KVM_S390_VCPU_FAULT _IOW(KVMIO, 0x52, unsigned long) 1172304dcb64SAndre Przywara 1173304dcb64SAndre Przywara /* Device model IOC */ 1174304dcb64SAndre Przywara #define KVM_CREATE_IRQCHIP _IO(KVMIO, 0x60) 1175304dcb64SAndre Przywara #define KVM_IRQ_LINE _IOW(KVMIO, 0x61, struct kvm_irq_level) 1176304dcb64SAndre Przywara #define KVM_GET_IRQCHIP _IOWR(KVMIO, 0x62, struct kvm_irqchip) 1177304dcb64SAndre Przywara #define KVM_SET_IRQCHIP _IOR(KVMIO, 0x63, struct kvm_irqchip) 1178304dcb64SAndre Przywara #define KVM_CREATE_PIT _IO(KVMIO, 0x64) 1179304dcb64SAndre Przywara #define KVM_GET_PIT _IOWR(KVMIO, 0x65, struct kvm_pit_state) 1180304dcb64SAndre Przywara #define KVM_SET_PIT _IOR(KVMIO, 0x66, struct kvm_pit_state) 1181304dcb64SAndre Przywara #define KVM_IRQ_LINE_STATUS _IOWR(KVMIO, 0x67, struct kvm_irq_level) 1182304dcb64SAndre Przywara #define KVM_REGISTER_COALESCED_MMIO \ 1183304dcb64SAndre Przywara _IOW(KVMIO, 0x67, struct kvm_coalesced_mmio_zone) 1184304dcb64SAndre Przywara #define KVM_UNREGISTER_COALESCED_MMIO \ 1185304dcb64SAndre Przywara _IOW(KVMIO, 0x68, struct kvm_coalesced_mmio_zone) 1186304dcb64SAndre Przywara #define KVM_SET_GSI_ROUTING _IOW(KVMIO, 0x6a, struct kvm_irq_routing) 1187304dcb64SAndre Przywara #define KVM_REINJECT_CONTROL _IO(KVMIO, 0x71) 1188304dcb64SAndre Przywara #define KVM_IRQFD _IOW(KVMIO, 0x76, struct kvm_irqfd) 1189304dcb64SAndre Przywara #define KVM_CREATE_PIT2 _IOW(KVMIO, 0x77, struct kvm_pit_config) 1190304dcb64SAndre Przywara #define KVM_SET_BOOT_CPU_ID _IO(KVMIO, 0x78) 1191304dcb64SAndre Przywara #define KVM_IOEVENTFD _IOW(KVMIO, 0x79, struct kvm_ioeventfd) 1192304dcb64SAndre Przywara #define KVM_XEN_HVM_CONFIG _IOW(KVMIO, 0x7a, struct kvm_xen_hvm_config) 1193304dcb64SAndre Przywara #define KVM_SET_CLOCK _IOW(KVMIO, 0x7b, struct kvm_clock_data) 1194304dcb64SAndre Przywara #define KVM_GET_CLOCK _IOR(KVMIO, 0x7c, struct kvm_clock_data) 1195304dcb64SAndre Przywara /* Available with KVM_CAP_PIT_STATE2 */ 1196304dcb64SAndre Przywara #define KVM_GET_PIT2 _IOR(KVMIO, 0x9f, struct kvm_pit_state2) 1197304dcb64SAndre Przywara #define KVM_SET_PIT2 _IOW(KVMIO, 0xa0, struct kvm_pit_state2) 1198304dcb64SAndre Przywara /* Available with KVM_CAP_PPC_GET_PVINFO */ 1199304dcb64SAndre Przywara #define KVM_PPC_GET_PVINFO _IOW(KVMIO, 0xa1, struct kvm_ppc_pvinfo) 12008d0facecSAnup Patel /* Available with KVM_CAP_TSC_CONTROL for a vCPU, or with 12018d0facecSAnup Patel * KVM_CAP_VM_TSC_CONTROL to set defaults for a VM */ 1202304dcb64SAndre Przywara #define KVM_SET_TSC_KHZ _IO(KVMIO, 0xa2) 1203304dcb64SAndre Przywara #define KVM_GET_TSC_KHZ _IO(KVMIO, 0xa3) 1204304dcb64SAndre Przywara /* Available with KVM_CAP_SIGNAL_MSI */ 1205304dcb64SAndre Przywara #define KVM_SIGNAL_MSI _IOW(KVMIO, 0xa5, struct kvm_msi) 1206304dcb64SAndre Przywara /* Available with KVM_CAP_PPC_GET_SMMU_INFO */ 1207304dcb64SAndre Przywara #define KVM_PPC_GET_SMMU_INFO _IOR(KVMIO, 0xa6, struct kvm_ppc_smmu_info) 1208304dcb64SAndre Przywara /* Available with KVM_CAP_PPC_ALLOC_HTAB */ 1209304dcb64SAndre Przywara #define KVM_PPC_ALLOCATE_HTAB _IOWR(KVMIO, 0xa7, __u32) 1210304dcb64SAndre Przywara #define KVM_CREATE_SPAPR_TCE _IOW(KVMIO, 0xa8, struct kvm_create_spapr_tce) 1211b37ed70eSAndre Przywara #define KVM_CREATE_SPAPR_TCE_64 _IOW(KVMIO, 0xa8, \ 1212b37ed70eSAndre Przywara struct kvm_create_spapr_tce_64) 1213304dcb64SAndre Przywara /* Available with KVM_CAP_RMA */ 1214304dcb64SAndre Przywara #define KVM_ALLOCATE_RMA _IOR(KVMIO, 0xa9, struct kvm_allocate_rma) 1215304dcb64SAndre Przywara /* Available with KVM_CAP_PPC_HTAB_FD */ 1216304dcb64SAndre Przywara #define KVM_PPC_GET_HTAB_FD _IOW(KVMIO, 0xaa, struct kvm_get_htab_fd) 1217304dcb64SAndre Przywara /* Available with KVM_CAP_ARM_SET_DEVICE_ADDR */ 1218304dcb64SAndre Przywara #define KVM_ARM_SET_DEVICE_ADDR _IOW(KVMIO, 0xab, struct kvm_arm_device_addr) 1219304dcb64SAndre Przywara /* Available with KVM_CAP_PPC_RTAS */ 1220304dcb64SAndre Przywara #define KVM_PPC_RTAS_DEFINE_TOKEN _IOW(KVMIO, 0xac, struct kvm_rtas_token_args) 1221764dfba1SAndre Przywara /* Available with KVM_CAP_SPAPR_RESIZE_HPT */ 1222764dfba1SAndre Przywara #define KVM_PPC_RESIZE_HPT_PREPARE _IOR(KVMIO, 0xad, struct kvm_ppc_resize_hpt) 1223764dfba1SAndre Przywara #define KVM_PPC_RESIZE_HPT_COMMIT _IOR(KVMIO, 0xae, struct kvm_ppc_resize_hpt) 1224*01171537SAnup Patel /* Available with KVM_CAP_PPC_MMU_RADIX or KVM_CAP_PPC_MMU_HASH_V3 */ 1225764dfba1SAndre Przywara #define KVM_PPC_CONFIGURE_V3_MMU _IOW(KVMIO, 0xaf, struct kvm_ppc_mmuv3_cfg) 1226*01171537SAnup Patel /* Available with KVM_CAP_PPC_MMU_RADIX */ 1227764dfba1SAndre Przywara #define KVM_PPC_GET_RMMU_INFO _IOW(KVMIO, 0xb0, struct kvm_ppc_rmmu_info) 12281bbe92f5SDave Martin /* Available with KVM_CAP_PPC_GET_CPU_CHAR */ 12291bbe92f5SDave Martin #define KVM_PPC_GET_CPU_CHAR _IOR(KVMIO, 0xb1, struct kvm_ppc_cpu_char) 123066b24a33SWill Deacon /* Available with KVM_CAP_PMU_EVENT_FILTER */ 123166b24a33SWill Deacon #define KVM_SET_PMU_EVENT_FILTER _IOW(KVMIO, 0xb2, struct kvm_pmu_event_filter) 12325968b5ffSAnup Patel #define KVM_PPC_SVM_OFF _IO(KVMIO, 0xb3) 12335968b5ffSAnup Patel #define KVM_ARM_MTE_COPY_TAGS _IOR(KVMIO, 0xb4, struct kvm_arm_copy_mte_tags) 1234be986824SAnup Patel /* Available with KVM_CAP_COUNTER_OFFSET */ 1235be986824SAnup Patel #define KVM_ARM_SET_COUNTER_OFFSET _IOW(KVMIO, 0xb5, struct kvm_arm_counter_offset) 123692ef2dcdSWill Deacon #define KVM_ARM_GET_REG_WRITABLE_MASKS _IOR(KVMIO, 0xb6, struct reg_mask_range) 1237304dcb64SAndre Przywara 1238304dcb64SAndre Przywara /* ioctl for vm fd */ 1239304dcb64SAndre Przywara #define KVM_CREATE_DEVICE _IOWR(KVMIO, 0xe0, struct kvm_create_device) 1240304dcb64SAndre Przywara 1241304dcb64SAndre Przywara /* ioctls for fds returned by KVM_CREATE_DEVICE */ 1242304dcb64SAndre Przywara #define KVM_SET_DEVICE_ATTR _IOW(KVMIO, 0xe1, struct kvm_device_attr) 1243304dcb64SAndre Przywara #define KVM_GET_DEVICE_ATTR _IOW(KVMIO, 0xe2, struct kvm_device_attr) 1244304dcb64SAndre Przywara #define KVM_HAS_DEVICE_ATTR _IOW(KVMIO, 0xe3, struct kvm_device_attr) 1245304dcb64SAndre Przywara 1246304dcb64SAndre Przywara /* 1247304dcb64SAndre Przywara * ioctls for vcpu fds 1248304dcb64SAndre Przywara */ 1249304dcb64SAndre Przywara #define KVM_RUN _IO(KVMIO, 0x80) 1250304dcb64SAndre Przywara #define KVM_GET_REGS _IOR(KVMIO, 0x81, struct kvm_regs) 1251304dcb64SAndre Przywara #define KVM_SET_REGS _IOW(KVMIO, 0x82, struct kvm_regs) 1252304dcb64SAndre Przywara #define KVM_GET_SREGS _IOR(KVMIO, 0x83, struct kvm_sregs) 1253304dcb64SAndre Przywara #define KVM_SET_SREGS _IOW(KVMIO, 0x84, struct kvm_sregs) 1254304dcb64SAndre Przywara #define KVM_TRANSLATE _IOWR(KVMIO, 0x85, struct kvm_translation) 1255304dcb64SAndre Przywara #define KVM_INTERRUPT _IOW(KVMIO, 0x86, struct kvm_interrupt) 1256304dcb64SAndre Przywara #define KVM_GET_MSRS _IOWR(KVMIO, 0x88, struct kvm_msrs) 1257304dcb64SAndre Przywara #define KVM_SET_MSRS _IOW(KVMIO, 0x89, struct kvm_msrs) 1258304dcb64SAndre Przywara #define KVM_SET_CPUID _IOW(KVMIO, 0x8a, struct kvm_cpuid) 1259304dcb64SAndre Przywara #define KVM_SET_SIGNAL_MASK _IOW(KVMIO, 0x8b, struct kvm_signal_mask) 1260304dcb64SAndre Przywara #define KVM_GET_FPU _IOR(KVMIO, 0x8c, struct kvm_fpu) 1261304dcb64SAndre Przywara #define KVM_SET_FPU _IOW(KVMIO, 0x8d, struct kvm_fpu) 1262304dcb64SAndre Przywara #define KVM_GET_LAPIC _IOR(KVMIO, 0x8e, struct kvm_lapic_state) 1263304dcb64SAndre Przywara #define KVM_SET_LAPIC _IOW(KVMIO, 0x8f, struct kvm_lapic_state) 1264304dcb64SAndre Przywara #define KVM_SET_CPUID2 _IOW(KVMIO, 0x90, struct kvm_cpuid2) 1265304dcb64SAndre Przywara #define KVM_GET_CPUID2 _IOWR(KVMIO, 0x91, struct kvm_cpuid2) 1266304dcb64SAndre Przywara /* Available with KVM_CAP_VAPIC */ 1267304dcb64SAndre Przywara #define KVM_TPR_ACCESS_REPORTING _IOWR(KVMIO, 0x92, struct kvm_tpr_access_ctl) 1268304dcb64SAndre Przywara /* Available with KVM_CAP_VAPIC */ 1269304dcb64SAndre Przywara #define KVM_SET_VAPIC_ADDR _IOW(KVMIO, 0x93, struct kvm_vapic_addr) 1270304dcb64SAndre Przywara /* valid for virtual machine (for floating interrupt)_and_ vcpu */ 1271304dcb64SAndre Przywara #define KVM_S390_INTERRUPT _IOW(KVMIO, 0x94, struct kvm_s390_interrupt) 1272304dcb64SAndre Przywara /* store status for s390 */ 1273304dcb64SAndre Przywara #define KVM_S390_STORE_STATUS_NOADDR (-1ul) 1274304dcb64SAndre Przywara #define KVM_S390_STORE_STATUS_PREFIXED (-2ul) 1275304dcb64SAndre Przywara #define KVM_S390_STORE_STATUS _IOW(KVMIO, 0x95, unsigned long) 1276304dcb64SAndre Przywara /* initial ipl psw for s390 */ 1277304dcb64SAndre Przywara #define KVM_S390_SET_INITIAL_PSW _IOW(KVMIO, 0x96, struct kvm_s390_psw) 1278304dcb64SAndre Przywara /* initial reset for s390 */ 1279304dcb64SAndre Przywara #define KVM_S390_INITIAL_RESET _IO(KVMIO, 0x97) 1280304dcb64SAndre Przywara #define KVM_GET_MP_STATE _IOR(KVMIO, 0x98, struct kvm_mp_state) 1281304dcb64SAndre Przywara #define KVM_SET_MP_STATE _IOW(KVMIO, 0x99, struct kvm_mp_state) 1282304dcb64SAndre Przywara /* Available with KVM_CAP_USER_NMI */ 1283304dcb64SAndre Przywara #define KVM_NMI _IO(KVMIO, 0x9a) 1284304dcb64SAndre Przywara /* Available with KVM_CAP_SET_GUEST_DEBUG */ 1285304dcb64SAndre Przywara #define KVM_SET_GUEST_DEBUG _IOW(KVMIO, 0x9b, struct kvm_guest_debug) 1286304dcb64SAndre Przywara /* MCE for x86 */ 1287304dcb64SAndre Przywara #define KVM_X86_SETUP_MCE _IOW(KVMIO, 0x9c, __u64) 1288304dcb64SAndre Przywara #define KVM_X86_GET_MCE_CAP_SUPPORTED _IOR(KVMIO, 0x9d, __u64) 1289304dcb64SAndre Przywara #define KVM_X86_SET_MCE _IOW(KVMIO, 0x9e, struct kvm_x86_mce) 1290304dcb64SAndre Przywara /* Available with KVM_CAP_VCPU_EVENTS */ 1291304dcb64SAndre Przywara #define KVM_GET_VCPU_EVENTS _IOR(KVMIO, 0x9f, struct kvm_vcpu_events) 1292304dcb64SAndre Przywara #define KVM_SET_VCPU_EVENTS _IOW(KVMIO, 0xa0, struct kvm_vcpu_events) 1293304dcb64SAndre Przywara /* Available with KVM_CAP_DEBUGREGS */ 1294304dcb64SAndre Przywara #define KVM_GET_DEBUGREGS _IOR(KVMIO, 0xa1, struct kvm_debugregs) 1295304dcb64SAndre Przywara #define KVM_SET_DEBUGREGS _IOW(KVMIO, 0xa2, struct kvm_debugregs) 1296304dcb64SAndre Przywara /* 129726c85896SAnup Patel * vcpu version available with KVM_CAP_ENABLE_CAP 1298304dcb64SAndre Przywara * vm version available with KVM_CAP_ENABLE_CAP_VM 1299304dcb64SAndre Przywara */ 1300304dcb64SAndre Przywara #define KVM_ENABLE_CAP _IOW(KVMIO, 0xa3, struct kvm_enable_cap) 1301304dcb64SAndre Przywara /* Available with KVM_CAP_XSAVE */ 1302304dcb64SAndre Przywara #define KVM_GET_XSAVE _IOR(KVMIO, 0xa4, struct kvm_xsave) 1303304dcb64SAndre Przywara #define KVM_SET_XSAVE _IOW(KVMIO, 0xa5, struct kvm_xsave) 1304304dcb64SAndre Przywara /* Available with KVM_CAP_XCRS */ 1305304dcb64SAndre Przywara #define KVM_GET_XCRS _IOR(KVMIO, 0xa6, struct kvm_xcrs) 1306304dcb64SAndre Przywara #define KVM_SET_XCRS _IOW(KVMIO, 0xa7, struct kvm_xcrs) 1307304dcb64SAndre Przywara /* Available with KVM_CAP_SW_TLB */ 1308304dcb64SAndre Przywara #define KVM_DIRTY_TLB _IOW(KVMIO, 0xaa, struct kvm_dirty_tlb) 1309304dcb64SAndre Przywara /* Available with KVM_CAP_ONE_REG */ 1310304dcb64SAndre Przywara #define KVM_GET_ONE_REG _IOW(KVMIO, 0xab, struct kvm_one_reg) 1311304dcb64SAndre Przywara #define KVM_SET_ONE_REG _IOW(KVMIO, 0xac, struct kvm_one_reg) 1312304dcb64SAndre Przywara /* VM is being stopped by host */ 1313304dcb64SAndre Przywara #define KVM_KVMCLOCK_CTRL _IO(KVMIO, 0xad) 1314304dcb64SAndre Przywara #define KVM_ARM_VCPU_INIT _IOW(KVMIO, 0xae, struct kvm_vcpu_init) 1315304dcb64SAndre Przywara #define KVM_ARM_PREFERRED_TARGET _IOR(KVMIO, 0xaf, struct kvm_vcpu_init) 1316304dcb64SAndre Przywara #define KVM_GET_REG_LIST _IOWR(KVMIO, 0xb0, struct kvm_reg_list) 1317304dcb64SAndre Przywara /* Available with KVM_CAP_S390_MEM_OP */ 1318304dcb64SAndre Przywara #define KVM_S390_MEM_OP _IOW(KVMIO, 0xb1, struct kvm_s390_mem_op) 1319304dcb64SAndre Przywara /* Available with KVM_CAP_S390_SKEYS */ 1320304dcb64SAndre Przywara #define KVM_S390_GET_SKEYS _IOW(KVMIO, 0xb2, struct kvm_s390_skeys) 1321304dcb64SAndre Przywara #define KVM_S390_SET_SKEYS _IOW(KVMIO, 0xb3, struct kvm_s390_skeys) 1322304dcb64SAndre Przywara /* Available with KVM_CAP_S390_INJECT_IRQ */ 1323304dcb64SAndre Przywara #define KVM_S390_IRQ _IOW(KVMIO, 0xb4, struct kvm_s390_irq) 1324304dcb64SAndre Przywara /* Available with KVM_CAP_S390_IRQ_STATE */ 1325304dcb64SAndre Przywara #define KVM_S390_SET_IRQ_STATE _IOW(KVMIO, 0xb5, struct kvm_s390_irq_state) 1326304dcb64SAndre Przywara #define KVM_S390_GET_IRQ_STATE _IOW(KVMIO, 0xb6, struct kvm_s390_irq_state) 1327b3f606e1SMarc Zyngier /* Available with KVM_CAP_X86_SMM */ 1328b3f606e1SMarc Zyngier #define KVM_SMI _IO(KVMIO, 0xb7) 13291bbe92f5SDave Martin /* Available with KVM_CAP_S390_CMMA_MIGRATION */ 13301bbe92f5SDave Martin #define KVM_S390_GET_CMMA_BITS _IOWR(KVMIO, 0xb8, struct kvm_s390_cmma_log) 13311bbe92f5SDave Martin #define KVM_S390_SET_CMMA_BITS _IOW(KVMIO, 0xb9, struct kvm_s390_cmma_log) 13321bbe92f5SDave Martin /* Memory Encryption Commands */ 13331bbe92f5SDave Martin #define KVM_MEMORY_ENCRYPT_OP _IOWR(KVMIO, 0xba, unsigned long) 13341bbe92f5SDave Martin 13351bbe92f5SDave Martin struct kvm_enc_region { 13361bbe92f5SDave Martin __u64 addr; 13371bbe92f5SDave Martin __u64 size; 13381bbe92f5SDave Martin }; 13391bbe92f5SDave Martin 13401bbe92f5SDave Martin #define KVM_MEMORY_ENCRYPT_REG_REGION _IOR(KVMIO, 0xbb, struct kvm_enc_region) 13411bbe92f5SDave Martin #define KVM_MEMORY_ENCRYPT_UNREG_REGION _IOR(KVMIO, 0xbc, struct kvm_enc_region) 13421bbe92f5SDave Martin 13431bbe92f5SDave Martin /* Available with KVM_CAP_HYPERV_EVENTFD */ 13441bbe92f5SDave Martin #define KVM_HYPERV_EVENTFD _IOW(KVMIO, 0xbd, struct kvm_hyperv_eventfd) 13451bbe92f5SDave Martin 13461bbe92f5SDave Martin /* Available with KVM_CAP_NESTED_STATE */ 13471bbe92f5SDave Martin #define KVM_GET_NESTED_STATE _IOWR(KVMIO, 0xbe, struct kvm_nested_state) 13481bbe92f5SDave Martin #define KVM_SET_NESTED_STATE _IOW(KVMIO, 0xbf, struct kvm_nested_state) 13491bbe92f5SDave Martin 135066b24a33SWill Deacon /* Available with KVM_CAP_MANUAL_DIRTY_LOG_PROTECT_2 */ 13511bbe92f5SDave Martin #define KVM_CLEAR_DIRTY_LOG _IOWR(KVMIO, 0xc0, struct kvm_clear_dirty_log) 13521bbe92f5SDave Martin 13535968b5ffSAnup Patel /* Available with KVM_CAP_HYPERV_CPUID (vcpu) / KVM_CAP_SYS_HYPERV_CPUID (system) */ 13541bbe92f5SDave Martin #define KVM_GET_SUPPORTED_HV_CPUID _IOWR(KVMIO, 0xc1, struct kvm_cpuid2) 13551bbe92f5SDave Martin 135666b24a33SWill Deacon /* Available with KVM_CAP_ARM_SVE */ 135766b24a33SWill Deacon #define KVM_ARM_VCPU_FINALIZE _IOW(KVMIO, 0xc2, int) 135866b24a33SWill Deacon 13595968b5ffSAnup Patel /* Available with KVM_CAP_S390_VCPU_RESETS */ 13605968b5ffSAnup Patel #define KVM_S390_NORMAL_RESET _IO(KVMIO, 0xc3) 13615968b5ffSAnup Patel #define KVM_S390_CLEAR_RESET _IO(KVMIO, 0xc4) 13625968b5ffSAnup Patel 13635968b5ffSAnup Patel /* Available with KVM_CAP_S390_PROTECTED */ 13645968b5ffSAnup Patel #define KVM_S390_PV_COMMAND _IOWR(KVMIO, 0xc5, struct kvm_pv_cmd) 13655968b5ffSAnup Patel 13665968b5ffSAnup Patel /* Available with KVM_CAP_X86_MSR_FILTER */ 13675968b5ffSAnup Patel #define KVM_X86_SET_MSR_FILTER _IOW(KVMIO, 0xc6, struct kvm_msr_filter) 13685968b5ffSAnup Patel 13695968b5ffSAnup Patel /* Available with KVM_CAP_DIRTY_LOG_RING */ 13705968b5ffSAnup Patel #define KVM_RESET_DIRTY_RINGS _IO(KVMIO, 0xc7) 13715968b5ffSAnup Patel 13725968b5ffSAnup Patel /* Per-VM Xen attributes */ 13735968b5ffSAnup Patel #define KVM_XEN_HVM_GET_ATTR _IOWR(KVMIO, 0xc8, struct kvm_xen_hvm_attr) 13745968b5ffSAnup Patel #define KVM_XEN_HVM_SET_ATTR _IOW(KVMIO, 0xc9, struct kvm_xen_hvm_attr) 13755968b5ffSAnup Patel 13765968b5ffSAnup Patel /* Per-vCPU Xen attributes */ 13775968b5ffSAnup Patel #define KVM_XEN_VCPU_GET_ATTR _IOWR(KVMIO, 0xca, struct kvm_xen_vcpu_attr) 13785968b5ffSAnup Patel #define KVM_XEN_VCPU_SET_ATTR _IOW(KVMIO, 0xcb, struct kvm_xen_vcpu_attr) 13795968b5ffSAnup Patel 13808d0facecSAnup Patel /* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */ 13818d0facecSAnup Patel #define KVM_XEN_HVM_EVTCHN_SEND _IOW(KVMIO, 0xd0, struct kvm_irq_routing_xen_evtchn) 13828d0facecSAnup Patel 13835968b5ffSAnup Patel #define KVM_GET_SREGS2 _IOR(KVMIO, 0xcc, struct kvm_sregs2) 13845968b5ffSAnup Patel #define KVM_SET_SREGS2 _IOW(KVMIO, 0xcd, struct kvm_sregs2) 13855968b5ffSAnup Patel 13865968b5ffSAnup Patel #define KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE (1 << 0) 13875968b5ffSAnup Patel #define KVM_DIRTY_LOG_INITIALLY_SET (1 << 1) 13885968b5ffSAnup Patel 13895968b5ffSAnup Patel /* 13905968b5ffSAnup Patel * Arch needs to define the macro after implementing the dirty ring 13915968b5ffSAnup Patel * feature. KVM_DIRTY_LOG_PAGE_OFFSET should be defined as the 13925968b5ffSAnup Patel * starting page offset of the dirty ring structures. 13935968b5ffSAnup Patel */ 13945968b5ffSAnup Patel #ifndef KVM_DIRTY_LOG_PAGE_OFFSET 13955968b5ffSAnup Patel #define KVM_DIRTY_LOG_PAGE_OFFSET 0 13965968b5ffSAnup Patel #endif 13975968b5ffSAnup Patel 13985968b5ffSAnup Patel /* 13995968b5ffSAnup Patel * KVM dirty GFN flags, defined as: 14005968b5ffSAnup Patel * 14015968b5ffSAnup Patel * |---------------+---------------+--------------| 14025968b5ffSAnup Patel * | bit 1 (reset) | bit 0 (dirty) | Status | 14035968b5ffSAnup Patel * |---------------+---------------+--------------| 14045968b5ffSAnup Patel * | 0 | 0 | Invalid GFN | 14055968b5ffSAnup Patel * | 0 | 1 | Dirty GFN | 14065968b5ffSAnup Patel * | 1 | X | GFN to reset | 14075968b5ffSAnup Patel * |---------------+---------------+--------------| 14085968b5ffSAnup Patel * 14095968b5ffSAnup Patel * Lifecycle of a dirty GFN goes like: 14105968b5ffSAnup Patel * 14115968b5ffSAnup Patel * dirtied harvested reset 14125968b5ffSAnup Patel * 00 -----------> 01 -------------> 1X -------+ 14135968b5ffSAnup Patel * ^ | 14145968b5ffSAnup Patel * | | 14155968b5ffSAnup Patel * +------------------------------------------+ 14165968b5ffSAnup Patel * 14175968b5ffSAnup Patel * The userspace program is only responsible for the 01->1X state 14185968b5ffSAnup Patel * conversion after harvesting an entry. Also, it must not skip any 14195968b5ffSAnup Patel * dirty bits, so that dirty bits are always harvested in sequence. 14205968b5ffSAnup Patel */ 14215968b5ffSAnup Patel #define KVM_DIRTY_GFN_F_DIRTY _BITUL(0) 14225968b5ffSAnup Patel #define KVM_DIRTY_GFN_F_RESET _BITUL(1) 14235968b5ffSAnup Patel #define KVM_DIRTY_GFN_F_MASK 0x3 14245968b5ffSAnup Patel 14255968b5ffSAnup Patel /* 14265968b5ffSAnup Patel * KVM dirty rings should be mapped at KVM_DIRTY_LOG_PAGE_OFFSET of 14275968b5ffSAnup Patel * per-vcpu mmaped regions as an array of struct kvm_dirty_gfn. The 14285968b5ffSAnup Patel * size of the gfn buffer is decided by the first argument when 14295968b5ffSAnup Patel * enabling KVM_CAP_DIRTY_LOG_RING. 14305968b5ffSAnup Patel */ 14315968b5ffSAnup Patel struct kvm_dirty_gfn { 14325968b5ffSAnup Patel __u32 flags; 14335968b5ffSAnup Patel __u32 slot; 14345968b5ffSAnup Patel __u64 offset; 14355968b5ffSAnup Patel }; 14365968b5ffSAnup Patel 14375968b5ffSAnup Patel #define KVM_BUS_LOCK_DETECTION_OFF (1 << 0) 14385968b5ffSAnup Patel #define KVM_BUS_LOCK_DETECTION_EXIT (1 << 1) 14395968b5ffSAnup Patel 1440083a976eSAlexandru Elisei #define KVM_PMU_CAP_DISABLE (1 << 0) 1441083a976eSAlexandru Elisei 14425968b5ffSAnup Patel /** 14435968b5ffSAnup Patel * struct kvm_stats_header - Header of per vm/vcpu binary statistics data. 14445968b5ffSAnup Patel * @flags: Some extra information for header, always 0 for now. 14455968b5ffSAnup Patel * @name_size: The size in bytes of the memory which contains statistics 14465968b5ffSAnup Patel * name string including trailing '\0'. The memory is allocated 14475968b5ffSAnup Patel * at the send of statistics descriptor. 14485968b5ffSAnup Patel * @num_desc: The number of statistics the vm or vcpu has. 14495968b5ffSAnup Patel * @id_offset: The offset of the vm/vcpu stats' id string in the file pointed 14505968b5ffSAnup Patel * by vm/vcpu stats fd. 14515968b5ffSAnup Patel * @desc_offset: The offset of the vm/vcpu stats' descriptor block in the file 14525968b5ffSAnup Patel * pointd by vm/vcpu stats fd. 14535968b5ffSAnup Patel * @data_offset: The offset of the vm/vcpu stats' data block in the file 14545968b5ffSAnup Patel * pointed by vm/vcpu stats fd. 14555968b5ffSAnup Patel * 14565968b5ffSAnup Patel * This is the header userspace needs to read from stats fd before any other 14575968b5ffSAnup Patel * readings. It is used by userspace to discover all the information about the 14585968b5ffSAnup Patel * vm/vcpu's binary statistics. 14595968b5ffSAnup Patel * Userspace reads this header from the start of the vm/vcpu's stats fd. 14605968b5ffSAnup Patel */ 14615968b5ffSAnup Patel struct kvm_stats_header { 14625968b5ffSAnup Patel __u32 flags; 14635968b5ffSAnup Patel __u32 name_size; 14645968b5ffSAnup Patel __u32 num_desc; 14655968b5ffSAnup Patel __u32 id_offset; 14665968b5ffSAnup Patel __u32 desc_offset; 14675968b5ffSAnup Patel __u32 data_offset; 14685968b5ffSAnup Patel }; 14695968b5ffSAnup Patel 14705968b5ffSAnup Patel #define KVM_STATS_TYPE_SHIFT 0 14715968b5ffSAnup Patel #define KVM_STATS_TYPE_MASK (0xF << KVM_STATS_TYPE_SHIFT) 14725968b5ffSAnup Patel #define KVM_STATS_TYPE_CUMULATIVE (0x0 << KVM_STATS_TYPE_SHIFT) 14735968b5ffSAnup Patel #define KVM_STATS_TYPE_INSTANT (0x1 << KVM_STATS_TYPE_SHIFT) 14745968b5ffSAnup Patel #define KVM_STATS_TYPE_PEAK (0x2 << KVM_STATS_TYPE_SHIFT) 14755968b5ffSAnup Patel #define KVM_STATS_TYPE_LINEAR_HIST (0x3 << KVM_STATS_TYPE_SHIFT) 14765968b5ffSAnup Patel #define KVM_STATS_TYPE_LOG_HIST (0x4 << KVM_STATS_TYPE_SHIFT) 14775968b5ffSAnup Patel #define KVM_STATS_TYPE_MAX KVM_STATS_TYPE_LOG_HIST 14785968b5ffSAnup Patel 14795968b5ffSAnup Patel #define KVM_STATS_UNIT_SHIFT 4 14805968b5ffSAnup Patel #define KVM_STATS_UNIT_MASK (0xF << KVM_STATS_UNIT_SHIFT) 14815968b5ffSAnup Patel #define KVM_STATS_UNIT_NONE (0x0 << KVM_STATS_UNIT_SHIFT) 14825968b5ffSAnup Patel #define KVM_STATS_UNIT_BYTES (0x1 << KVM_STATS_UNIT_SHIFT) 14835968b5ffSAnup Patel #define KVM_STATS_UNIT_SECONDS (0x2 << KVM_STATS_UNIT_SHIFT) 14845968b5ffSAnup Patel #define KVM_STATS_UNIT_CYCLES (0x3 << KVM_STATS_UNIT_SHIFT) 14858d0facecSAnup Patel #define KVM_STATS_UNIT_BOOLEAN (0x4 << KVM_STATS_UNIT_SHIFT) 14868d0facecSAnup Patel #define KVM_STATS_UNIT_MAX KVM_STATS_UNIT_BOOLEAN 14875968b5ffSAnup Patel 14885968b5ffSAnup Patel #define KVM_STATS_BASE_SHIFT 8 14895968b5ffSAnup Patel #define KVM_STATS_BASE_MASK (0xF << KVM_STATS_BASE_SHIFT) 14905968b5ffSAnup Patel #define KVM_STATS_BASE_POW10 (0x0 << KVM_STATS_BASE_SHIFT) 14915968b5ffSAnup Patel #define KVM_STATS_BASE_POW2 (0x1 << KVM_STATS_BASE_SHIFT) 14925968b5ffSAnup Patel #define KVM_STATS_BASE_MAX KVM_STATS_BASE_POW2 14935968b5ffSAnup Patel 14945968b5ffSAnup Patel /** 14955968b5ffSAnup Patel * struct kvm_stats_desc - Descriptor of a KVM statistics. 14965968b5ffSAnup Patel * @flags: Annotations of the stats, like type, unit, etc. 14975968b5ffSAnup Patel * @exponent: Used together with @flags to determine the unit. 14985968b5ffSAnup Patel * @size: The number of data items for this stats. 14995968b5ffSAnup Patel * Every data item is of type __u64. 15005968b5ffSAnup Patel * @offset: The offset of the stats to the start of stat structure in 15015968b5ffSAnup Patel * structure kvm or kvm_vcpu. 15025968b5ffSAnup Patel * @bucket_size: A parameter value used for histogram stats. It is only used 15035968b5ffSAnup Patel * for linear histogram stats, specifying the size of the bucket; 15045968b5ffSAnup Patel * @name: The name string for the stats. Its size is indicated by the 15055968b5ffSAnup Patel * &kvm_stats_header->name_size. 15065968b5ffSAnup Patel */ 15075968b5ffSAnup Patel struct kvm_stats_desc { 15085968b5ffSAnup Patel __u32 flags; 15095968b5ffSAnup Patel __s16 exponent; 15105968b5ffSAnup Patel __u16 size; 15115968b5ffSAnup Patel __u32 offset; 15125968b5ffSAnup Patel __u32 bucket_size; 15135968b5ffSAnup Patel char name[]; 15145968b5ffSAnup Patel }; 15155968b5ffSAnup Patel 15165968b5ffSAnup Patel #define KVM_GET_STATS_FD _IO(KVMIO, 0xce) 15175968b5ffSAnup Patel 1518af1b793cSAlexandru Elisei /* Available with KVM_CAP_XSAVE2 */ 1519af1b793cSAlexandru Elisei #define KVM_GET_XSAVE2 _IOR(KVMIO, 0xcf, struct kvm_xsave) 1520af1b793cSAlexandru Elisei 15218d0facecSAnup Patel /* Available with KVM_CAP_S390_PROTECTED_DUMP */ 15228d0facecSAnup Patel #define KVM_S390_PV_CPU_COMMAND _IOWR(KVMIO, 0xd0, struct kvm_pv_cmd) 15238d0facecSAnup Patel 15248d0facecSAnup Patel /* Available with KVM_CAP_X86_NOTIFY_VMEXIT */ 15258d0facecSAnup Patel #define KVM_X86_NOTIFY_VMEXIT_ENABLED (1ULL << 0) 15268d0facecSAnup Patel #define KVM_X86_NOTIFY_VMEXIT_USER (1ULL << 1) 15278d0facecSAnup Patel 15288d0facecSAnup Patel /* Available with KVM_CAP_S390_ZPCI_OP */ 15298d0facecSAnup Patel #define KVM_S390_ZPCI_OP _IOW(KVMIO, 0xd1, struct kvm_s390_zpci_op) 15308d0facecSAnup Patel 153199684681SAnup Patel /* Available with KVM_CAP_MEMORY_ATTRIBUTES */ 153299684681SAnup Patel #define KVM_SET_MEMORY_ATTRIBUTES _IOW(KVMIO, 0xd2, struct kvm_memory_attributes) 153399684681SAnup Patel 153499684681SAnup Patel struct kvm_memory_attributes { 153599684681SAnup Patel __u64 address; 153699684681SAnup Patel __u64 size; 153799684681SAnup Patel __u64 attributes; 153899684681SAnup Patel __u64 flags; 153999684681SAnup Patel }; 154099684681SAnup Patel 154199684681SAnup Patel #define KVM_MEMORY_ATTRIBUTE_PRIVATE (1ULL << 3) 154299684681SAnup Patel 154399684681SAnup Patel #define KVM_CREATE_GUEST_MEMFD _IOWR(KVMIO, 0xd4, struct kvm_create_guest_memfd) 154499684681SAnup Patel 154599684681SAnup Patel struct kvm_create_guest_memfd { 154699684681SAnup Patel __u64 size; 154799684681SAnup Patel __u64 flags; 154899684681SAnup Patel __u64 reserved[6]; 154999684681SAnup Patel }; 155099684681SAnup Patel 1551304dcb64SAndre Przywara #endif /* __LINUX_KVM_H */ 1552