160742802SPekka Enberg #ifndef KVM__PCI_H 260742802SPekka Enberg #define KVM__PCI_H 360742802SPekka Enberg 4*76f9c841SCyrill Gorcunov #include <inttypes.h> 5*76f9c841SCyrill Gorcunov 6*76f9c841SCyrill Gorcunov #include "pci_regs.h" 7*76f9c841SCyrill Gorcunov 84402a581SPekka Enberg /* 94402a581SPekka Enberg * PCI Configuration Mechanism #1 I/O ports. See Section 3.7.4.1. 104402a581SPekka Enberg * ("Configuration Mechanism #1") of the PCI Local Bus Specification 2.1 for 114402a581SPekka Enberg * details. 124402a581SPekka Enberg */ 13305b72ceSCyrill Gorcunov #define PCI_CONFIG_ADDRESS 0xcf8 14305b72ceSCyrill Gorcunov #define PCI_CONFIG_DATA 0xcfc 15305b72ceSCyrill Gorcunov 164402a581SPekka Enberg struct pci_config_address { 174402a581SPekka Enberg unsigned zeros : 2; /* 1 .. 0 */ 184402a581SPekka Enberg unsigned register_number : 6; /* 7 .. 2 */ 194402a581SPekka Enberg unsigned function_number : 3; /* 10 .. 8 */ 204402a581SPekka Enberg unsigned device_number : 5; /* 15 .. 11 */ 214402a581SPekka Enberg unsigned bus_number : 8; /* 23 .. 16 */ 224402a581SPekka Enberg unsigned reserved : 7; /* 30 .. 24 */ 234402a581SPekka Enberg unsigned enable_bit : 1; /* 31 */ 244402a581SPekka Enberg }; 254402a581SPekka Enberg 26*76f9c841SCyrill Gorcunov struct pci_device_header { 27*76f9c841SCyrill Gorcunov uint16_t vendor_id; 28*76f9c841SCyrill Gorcunov uint16_t device_id; 29*76f9c841SCyrill Gorcunov uint16_t command; 30*76f9c841SCyrill Gorcunov uint16_t status; 31*76f9c841SCyrill Gorcunov uint16_t revision_id : 8; 32*76f9c841SCyrill Gorcunov uint32_t class : 24; 33*76f9c841SCyrill Gorcunov uint8_t cacheline_size; 34*76f9c841SCyrill Gorcunov uint8_t latency_timer; 35*76f9c841SCyrill Gorcunov uint8_t header_type; 36*76f9c841SCyrill Gorcunov uint8_t BIST; 37*76f9c841SCyrill Gorcunov uint32_t BAR[6]; 38*76f9c841SCyrill Gorcunov uint32_t card_bus; 39*76f9c841SCyrill Gorcunov uint16_t subsys_vendor_id; 40*76f9c841SCyrill Gorcunov uint16_t subsys_id; 41*76f9c841SCyrill Gorcunov uint32_t exp_rom_bar; 42*76f9c841SCyrill Gorcunov uint32_t capabilities : 8; 43*76f9c841SCyrill Gorcunov uint32_t reserved1 : 24; 44*76f9c841SCyrill Gorcunov uint32_t reserved2; 45*76f9c841SCyrill Gorcunov uint8_t irq_line; 46*76f9c841SCyrill Gorcunov uint8_t irq_pin; 47*76f9c841SCyrill Gorcunov uint8_t min_gnt; 48*76f9c841SCyrill Gorcunov uint8_t max_lat; 49*76f9c841SCyrill Gorcunov }; 50*76f9c841SCyrill Gorcunov 5160742802SPekka Enberg void pci__init(void); 5260742802SPekka Enberg 5360742802SPekka Enberg #endif /* KVM__PCI_H */ 54