160742802SPekka Enberg #ifndef KVM__PCI_H 260742802SPekka Enberg #define KVM__PCI_H 360742802SPekka Enberg 4*3fdf659dSSasha Levin #include <linux/types.h> 576f9c841SCyrill Gorcunov 620c64ecaSPekka Enberg #include <linux/pci_regs.h> 776f9c841SCyrill Gorcunov 84402a581SPekka Enberg /* 94402a581SPekka Enberg * PCI Configuration Mechanism #1 I/O ports. See Section 3.7.4.1. 104402a581SPekka Enberg * ("Configuration Mechanism #1") of the PCI Local Bus Specification 2.1 for 114402a581SPekka Enberg * details. 124402a581SPekka Enberg */ 13305b72ceSCyrill Gorcunov #define PCI_CONFIG_ADDRESS 0xcf8 14305b72ceSCyrill Gorcunov #define PCI_CONFIG_DATA 0xcfc 152b9e4709SCyrill Gorcunov #define PCI_CONFIG_BUS_FORWARD 0xcfa 16305b72ceSCyrill Gorcunov 174402a581SPekka Enberg struct pci_config_address { 184402a581SPekka Enberg unsigned zeros : 2; /* 1 .. 0 */ 194402a581SPekka Enberg unsigned register_number : 6; /* 7 .. 2 */ 204402a581SPekka Enberg unsigned function_number : 3; /* 10 .. 8 */ 214402a581SPekka Enberg unsigned device_number : 5; /* 15 .. 11 */ 224402a581SPekka Enberg unsigned bus_number : 8; /* 23 .. 16 */ 234402a581SPekka Enberg unsigned reserved : 7; /* 30 .. 24 */ 244402a581SPekka Enberg unsigned enable_bit : 1; /* 31 */ 254402a581SPekka Enberg }; 264402a581SPekka Enberg 2776f9c841SCyrill Gorcunov struct pci_device_header { 28*3fdf659dSSasha Levin u16 vendor_id; 29*3fdf659dSSasha Levin u16 device_id; 30*3fdf659dSSasha Levin u16 command; 31*3fdf659dSSasha Levin u16 status; 32*3fdf659dSSasha Levin u16 revision_id : 8; 33*3fdf659dSSasha Levin u32 class : 24; 34*3fdf659dSSasha Levin u8 cacheline_size; 35*3fdf659dSSasha Levin u8 latency_timer; 36*3fdf659dSSasha Levin u8 header_type; 37*3fdf659dSSasha Levin u8 bist; 38*3fdf659dSSasha Levin u32 bar[6]; 39*3fdf659dSSasha Levin u32 card_bus; 40*3fdf659dSSasha Levin u16 subsys_vendor_id; 41*3fdf659dSSasha Levin u16 subsys_id; 42*3fdf659dSSasha Levin u32 exp_rom_bar; 43*3fdf659dSSasha Levin u32 capabilities : 8; 44*3fdf659dSSasha Levin u32 reserved1 : 24; 45*3fdf659dSSasha Levin u32 reserved2; 46*3fdf659dSSasha Levin u8 irq_line; 47*3fdf659dSSasha Levin u8 irq_pin; 48*3fdf659dSSasha Levin u8 min_gnt; 49*3fdf659dSSasha Levin u8 max_lat; 5076f9c841SCyrill Gorcunov }; 5176f9c841SCyrill Gorcunov 5260742802SPekka Enberg void pci__init(void); 53*3fdf659dSSasha Levin void pci__register(struct pci_device_header *dev, u8 dev_num); 5460742802SPekka Enberg 5560742802SPekka Enberg #endif /* KVM__PCI_H */ 56