160742802SPekka Enberg #ifndef KVM__PCI_H 260742802SPekka Enberg #define KVM__PCI_H 360742802SPekka Enberg 476f9c841SCyrill Gorcunov #include <inttypes.h> 576f9c841SCyrill Gorcunov 6*20c64ecaSPekka Enberg #include <linux/pci_regs.h> 776f9c841SCyrill Gorcunov 84402a581SPekka Enberg /* 94402a581SPekka Enberg * PCI Configuration Mechanism #1 I/O ports. See Section 3.7.4.1. 104402a581SPekka Enberg * ("Configuration Mechanism #1") of the PCI Local Bus Specification 2.1 for 114402a581SPekka Enberg * details. 124402a581SPekka Enberg */ 13305b72ceSCyrill Gorcunov #define PCI_CONFIG_ADDRESS 0xcf8 14305b72ceSCyrill Gorcunov #define PCI_CONFIG_DATA 0xcfc 152b9e4709SCyrill Gorcunov #define PCI_CONFIG_BUS_FORWARD 0xcfa 16305b72ceSCyrill Gorcunov 174402a581SPekka Enberg struct pci_config_address { 184402a581SPekka Enberg unsigned zeros : 2; /* 1 .. 0 */ 194402a581SPekka Enberg unsigned register_number : 6; /* 7 .. 2 */ 204402a581SPekka Enberg unsigned function_number : 3; /* 10 .. 8 */ 214402a581SPekka Enberg unsigned device_number : 5; /* 15 .. 11 */ 224402a581SPekka Enberg unsigned bus_number : 8; /* 23 .. 16 */ 234402a581SPekka Enberg unsigned reserved : 7; /* 30 .. 24 */ 244402a581SPekka Enberg unsigned enable_bit : 1; /* 31 */ 254402a581SPekka Enberg }; 264402a581SPekka Enberg 2776f9c841SCyrill Gorcunov struct pci_device_header { 2876f9c841SCyrill Gorcunov uint16_t vendor_id; 2976f9c841SCyrill Gorcunov uint16_t device_id; 3076f9c841SCyrill Gorcunov uint16_t command; 3176f9c841SCyrill Gorcunov uint16_t status; 3276f9c841SCyrill Gorcunov uint16_t revision_id : 8; 3376f9c841SCyrill Gorcunov uint32_t class : 24; 3476f9c841SCyrill Gorcunov uint8_t cacheline_size; 3576f9c841SCyrill Gorcunov uint8_t latency_timer; 3676f9c841SCyrill Gorcunov uint8_t header_type; 37beb095ebSCyrill Gorcunov uint8_t bist; 38beb095ebSCyrill Gorcunov uint32_t bar[6]; 3976f9c841SCyrill Gorcunov uint32_t card_bus; 4076f9c841SCyrill Gorcunov uint16_t subsys_vendor_id; 4176f9c841SCyrill Gorcunov uint16_t subsys_id; 4276f9c841SCyrill Gorcunov uint32_t exp_rom_bar; 4376f9c841SCyrill Gorcunov uint32_t capabilities : 8; 4476f9c841SCyrill Gorcunov uint32_t reserved1 : 24; 4576f9c841SCyrill Gorcunov uint32_t reserved2; 4676f9c841SCyrill Gorcunov uint8_t irq_line; 4776f9c841SCyrill Gorcunov uint8_t irq_pin; 4876f9c841SCyrill Gorcunov uint8_t min_gnt; 4976f9c841SCyrill Gorcunov uint8_t max_lat; 5076f9c841SCyrill Gorcunov }; 5176f9c841SCyrill Gorcunov 5260742802SPekka Enberg void pci__init(void); 53b30d05adSPekka Enberg void pci__register(struct pci_device_header *dev, uint8_t dev_num); 5460742802SPekka Enberg 5560742802SPekka Enberg #endif /* KVM__PCI_H */ 56