1899fe063SPekka Enberg #include "kvm/8250-serial.h" 213a7760fSPekka Enberg 38eb47d29SSasha Levin #include "kvm/read-write.h" 413a7760fSPekka Enberg #include "kvm/ioport.h" 54ef0f4d6SPekka Enberg #include "kvm/mutex.h" 646aa8d69SPekka Enberg #include "kvm/util.h" 705d1a2a6SAsias He #include "kvm/term.h" 8e557eef9SPekka Enberg #include "kvm/kvm.h" 9*d28abb58SWill Deacon #include "kvm/fdt.h" 1013a7760fSPekka Enberg 113fdf659dSSasha Levin #include <linux/types.h> 124e49b05bSCyrill Gorcunov #include <linux/serial_reg.h> 134e49b05bSCyrill Gorcunov 142932c9ebSPekka Enberg #include <pthread.h> 1513a7760fSPekka Enberg 16d4b02a37SThomas Gleixner /* 17d4b02a37SThomas Gleixner * This fakes a U6_16550A. The fifo len needs to be 64 as the kernel 18d4b02a37SThomas Gleixner * expects that for autodetection. 19d4b02a37SThomas Gleixner */ 20d4b02a37SThomas Gleixner #define FIFO_LEN 64 21d4b02a37SThomas Gleixner #define FIFO_MASK (FIFO_LEN - 1) 22d4b02a37SThomas Gleixner 23d4b02a37SThomas Gleixner #define UART_IIR_TYPE_BITS 0xc0 24d4b02a37SThomas Gleixner 2546aa8d69SPekka Enberg struct serial8250_device { 26d3476f7dSSasha Levin struct mutex mutex; 271add4b76SSasha Levin u8 id; 282932c9ebSPekka Enberg 293fdf659dSSasha Levin u16 iobase; 303fdf659dSSasha Levin u8 irq; 31f6b8ccc1SThomas Gleixner u8 irq_state; 328dfae8beSThomas Gleixner int txcnt; 33d4b02a37SThomas Gleixner int rxcnt; 34d4b02a37SThomas Gleixner int rxdone; 35d4b02a37SThomas Gleixner char txbuf[FIFO_LEN]; 36d4b02a37SThomas Gleixner char rxbuf[FIFO_LEN]; 3776b4a122SPekka Enberg 383fdf659dSSasha Levin u8 dll; 393fdf659dSSasha Levin u8 dlm; 403fdf659dSSasha Levin u8 iir; 413fdf659dSSasha Levin u8 ier; 423fdf659dSSasha Levin u8 fcr; 433fdf659dSSasha Levin u8 lcr; 443fdf659dSSasha Levin u8 mcr; 453fdf659dSSasha Levin u8 lsr; 463fdf659dSSasha Levin u8 msr; 473fdf659dSSasha Levin u8 scr; 4846aa8d69SPekka Enberg }; 4946aa8d69SPekka Enberg 50f3efa592SLiming Wang #define SERIAL_REGS_SETTING \ 51f3efa592SLiming Wang .iir = UART_IIR_NO_INT, \ 52f3efa592SLiming Wang .lsr = UART_LSR_TEMT | UART_LSR_THRE, \ 53f3efa592SLiming Wang .msr = UART_MSR_DCD | UART_MSR_DSR | UART_MSR_CTS, \ 54f3efa592SLiming Wang .mcr = UART_MCR_OUT2, 55f3efa592SLiming Wang 56e62c18deSPekka Enberg static struct serial8250_device devices[] = { 57c6a69c61SPekka Enberg /* ttyS0 */ 58c6a69c61SPekka Enberg [0] = { 59d3476f7dSSasha Levin .mutex = MUTEX_INITIALIZER, 602932c9ebSPekka Enberg 611add4b76SSasha Levin .id = 0, 62c6a69c61SPekka Enberg .iobase = 0x3f8, 63e557eef9SPekka Enberg .irq = 4, 64e557eef9SPekka Enberg 65f3efa592SLiming Wang SERIAL_REGS_SETTING 66c6a69c61SPekka Enberg }, 67e62c18deSPekka Enberg /* ttyS1 */ 68e62c18deSPekka Enberg [1] = { 69d3476f7dSSasha Levin .mutex = MUTEX_INITIALIZER, 702932c9ebSPekka Enberg 711add4b76SSasha Levin .id = 1, 72e62c18deSPekka Enberg .iobase = 0x2f8, 73e62c18deSPekka Enberg .irq = 3, 74133bedc1SPekka Enberg 75f3efa592SLiming Wang SERIAL_REGS_SETTING 76e62c18deSPekka Enberg }, 77e62c18deSPekka Enberg /* ttyS2 */ 78e62c18deSPekka Enberg [2] = { 79d3476f7dSSasha Levin .mutex = MUTEX_INITIALIZER, 802932c9ebSPekka Enberg 811add4b76SSasha Levin .id = 2, 82e62c18deSPekka Enberg .iobase = 0x3e8, 83e62c18deSPekka Enberg .irq = 4, 84133bedc1SPekka Enberg 85f3efa592SLiming Wang SERIAL_REGS_SETTING 86e62c18deSPekka Enberg }, 87bf459c83SPekka Enberg /* ttyS3 */ 88bf459c83SPekka Enberg [3] = { 89d3476f7dSSasha Levin .mutex = MUTEX_INITIALIZER, 90bf459c83SPekka Enberg 911add4b76SSasha Levin .id = 3, 92bf459c83SPekka Enberg .iobase = 0x2e8, 93bf459c83SPekka Enberg .irq = 3, 94bf459c83SPekka Enberg 95f3efa592SLiming Wang SERIAL_REGS_SETTING 96bf459c83SPekka Enberg }, 9746aa8d69SPekka Enberg }; 9846aa8d69SPekka Enberg 992651ea58SSasha Levin static void serial8250_flush_tx(struct kvm *kvm, struct serial8250_device *dev) 100d4b02a37SThomas Gleixner { 101d4b02a37SThomas Gleixner dev->lsr |= UART_LSR_TEMT | UART_LSR_THRE; 102d4b02a37SThomas Gleixner 103d4b02a37SThomas Gleixner if (dev->txcnt) { 1042651ea58SSasha Levin term_putc(dev->txbuf, dev->txcnt, dev->id); 105d4b02a37SThomas Gleixner dev->txcnt = 0; 106d4b02a37SThomas Gleixner } 107d4b02a37SThomas Gleixner } 108d4b02a37SThomas Gleixner 109f6b8ccc1SThomas Gleixner static void serial8250_update_irq(struct kvm *kvm, struct serial8250_device *dev) 110f6b8ccc1SThomas Gleixner { 111f6b8ccc1SThomas Gleixner u8 iir = 0; 112f6b8ccc1SThomas Gleixner 113d4b02a37SThomas Gleixner /* Handle clear rx */ 114d4b02a37SThomas Gleixner if (dev->lcr & UART_FCR_CLEAR_RCVR) { 115d4b02a37SThomas Gleixner dev->lcr &= ~UART_FCR_CLEAR_RCVR; 116d4b02a37SThomas Gleixner dev->rxcnt = dev->rxdone = 0; 117d4b02a37SThomas Gleixner dev->lsr &= ~UART_LSR_DR; 118d4b02a37SThomas Gleixner } 119d4b02a37SThomas Gleixner 120d4b02a37SThomas Gleixner /* Handle clear tx */ 121d4b02a37SThomas Gleixner if (dev->lcr & UART_FCR_CLEAR_XMIT) { 122d4b02a37SThomas Gleixner dev->lcr &= ~UART_FCR_CLEAR_XMIT; 123d4b02a37SThomas Gleixner dev->txcnt = 0; 124d4b02a37SThomas Gleixner dev->lsr |= UART_LSR_TEMT | UART_LSR_THRE; 125d4b02a37SThomas Gleixner } 126d4b02a37SThomas Gleixner 127f6b8ccc1SThomas Gleixner /* Data ready and rcv interrupt enabled ? */ 128f6b8ccc1SThomas Gleixner if ((dev->ier & UART_IER_RDI) && (dev->lsr & UART_LSR_DR)) 129f6b8ccc1SThomas Gleixner iir |= UART_IIR_RDI; 130f6b8ccc1SThomas Gleixner 131f6b8ccc1SThomas Gleixner /* Transmitter empty and interrupt enabled ? */ 132f6b8ccc1SThomas Gleixner if ((dev->ier & UART_IER_THRI) && (dev->lsr & UART_LSR_TEMT)) 133f6b8ccc1SThomas Gleixner iir |= UART_IIR_THRI; 134f6b8ccc1SThomas Gleixner 135f6b8ccc1SThomas Gleixner /* Now update the irq line, if necessary */ 136f6b8ccc1SThomas Gleixner if (!iir) { 137f6b8ccc1SThomas Gleixner dev->iir = UART_IIR_NO_INT; 138f6b8ccc1SThomas Gleixner if (dev->irq_state) 139f6b8ccc1SThomas Gleixner kvm__irq_line(kvm, dev->irq, 0); 140f6b8ccc1SThomas Gleixner } else { 141f6b8ccc1SThomas Gleixner dev->iir = iir; 142f6b8ccc1SThomas Gleixner if (!dev->irq_state) 143f6b8ccc1SThomas Gleixner kvm__irq_line(kvm, dev->irq, 1); 144f6b8ccc1SThomas Gleixner } 145f6b8ccc1SThomas Gleixner dev->irq_state = iir; 1468dfae8beSThomas Gleixner 1478dfae8beSThomas Gleixner /* 1488dfae8beSThomas Gleixner * If the kernel disabled the tx interrupt, we know that there 1498dfae8beSThomas Gleixner * is nothing more to transmit, so we can reset our tx logic 1508dfae8beSThomas Gleixner * here. 1518dfae8beSThomas Gleixner */ 152d4b02a37SThomas Gleixner if (!(dev->ier & UART_IER_THRI)) 1532651ea58SSasha Levin serial8250_flush_tx(kvm, dev); 154f6b8ccc1SThomas Gleixner } 155f6b8ccc1SThomas Gleixner 156a428f72eSPekka Enberg #define SYSRQ_PENDING_NONE 0 157a428f72eSPekka Enberg 158a428f72eSPekka Enberg static int sysrq_pending; 159a428f72eSPekka Enberg 16043835ac9SSasha Levin static void serial8250__sysrq(struct kvm *kvm, struct serial8250_device *dev) 161a428f72eSPekka Enberg { 162a428f72eSPekka Enberg dev->lsr |= UART_LSR_DR | UART_LSR_BI; 163226e727bSSasha Levin dev->rxbuf[dev->rxcnt++] = sysrq_pending; 164a428f72eSPekka Enberg sysrq_pending = SYSRQ_PENDING_NONE; 165a428f72eSPekka Enberg } 166a428f72eSPekka Enberg 167d4b02a37SThomas Gleixner static void serial8250__receive(struct kvm *kvm, struct serial8250_device *dev, 168d4b02a37SThomas Gleixner bool handle_sysrq) 169251cf9a6SPekka Enberg { 170251cf9a6SPekka Enberg int c; 171251cf9a6SPekka Enberg 1728dfae8beSThomas Gleixner /* 173d4b02a37SThomas Gleixner * If the guest transmitted a full fifo, we clear the 1748dfae8beSThomas Gleixner * TEMT/THRE bits to let the kernel escape from the 8250 1758dfae8beSThomas Gleixner * interrupt handler. We come here only once a ms, so that 176d4b02a37SThomas Gleixner * should give the kernel the desired pause. That also flushes 177d4b02a37SThomas Gleixner * the tx fifo to the terminal. 1788dfae8beSThomas Gleixner */ 1792651ea58SSasha Levin serial8250_flush_tx(kvm, dev); 1808dfae8beSThomas Gleixner 181d4b02a37SThomas Gleixner if (dev->mcr & UART_MCR_LOOP) 182db34045cSPekka Enberg return; 183db34045cSPekka Enberg 184d4b02a37SThomas Gleixner if ((dev->lsr & UART_LSR_DR) || dev->rxcnt) 185d4b02a37SThomas Gleixner return; 186d4b02a37SThomas Gleixner 187d4b02a37SThomas Gleixner if (handle_sysrq && sysrq_pending) { 18843835ac9SSasha Levin serial8250__sysrq(kvm, dev); 189a428f72eSPekka Enberg return; 190a428f72eSPekka Enberg } 191a428f72eSPekka Enberg 1922651ea58SSasha Levin if (kvm->cfg.active_console != CONSOLE_8250) 1932651ea58SSasha Levin return; 1942651ea58SSasha Levin 1952651ea58SSasha Levin while (term_readable(dev->id) && 196d4b02a37SThomas Gleixner dev->rxcnt < FIFO_LEN) { 197251cf9a6SPekka Enberg 1984346fd8fSSasha Levin c = term_getc(kvm, dev->id); 19905d1a2a6SAsias He 200251cf9a6SPekka Enberg if (c < 0) 201d4b02a37SThomas Gleixner break; 202d4b02a37SThomas Gleixner dev->rxbuf[dev->rxcnt++] = c; 203251cf9a6SPekka Enberg dev->lsr |= UART_LSR_DR; 204251cf9a6SPekka Enberg } 205d4b02a37SThomas Gleixner } 206251cf9a6SPekka Enberg 207f6b8ccc1SThomas Gleixner void serial8250__update_consoles(struct kvm *kvm) 2088bb34e0dSPekka Enberg { 209479de16fSCyrill Gorcunov unsigned int i; 2101add4b76SSasha Levin 211479de16fSCyrill Gorcunov for (i = 0; i < ARRAY_SIZE(devices); i++) { 2121add4b76SSasha Levin struct serial8250_device *dev = &devices[i]; 213934c193bSPekka Enberg 2144ef0f4d6SPekka Enberg mutex_lock(&dev->mutex); 2152932c9ebSPekka Enberg 216d4b02a37SThomas Gleixner /* Restrict sysrq injection to the first port */ 217d4b02a37SThomas Gleixner serial8250__receive(kvm, dev, i == 0); 218251cf9a6SPekka Enberg 219f6b8ccc1SThomas Gleixner serial8250_update_irq(kvm, dev); 2202932c9ebSPekka Enberg 2214ef0f4d6SPekka Enberg mutex_unlock(&dev->mutex); 2228bb34e0dSPekka Enberg } 2231add4b76SSasha Levin } 2248bb34e0dSPekka Enberg 225226e727bSSasha Levin void serial8250__inject_sysrq(struct kvm *kvm, char sysrq) 226a428f72eSPekka Enberg { 227226e727bSSasha Levin sysrq_pending = sysrq; 228a428f72eSPekka Enberg } 229a428f72eSPekka Enberg 230d4b02a37SThomas Gleixner static bool serial8250_out(struct ioport *ioport, struct kvm *kvm, u16 port, 231d4b02a37SThomas Gleixner void *data, int size) 23213a7760fSPekka Enberg { 233*d28abb58SWill Deacon struct serial8250_device *dev = ioport->priv; 2343fdf659dSSasha Levin u16 offset; 2352932c9ebSPekka Enberg bool ret = true; 236d4b02a37SThomas Gleixner char *addr = data; 23746aa8d69SPekka Enberg 2384ef0f4d6SPekka Enberg mutex_lock(&dev->mutex); 2392932c9ebSPekka Enberg 240c6a69c61SPekka Enberg offset = port - dev->iobase; 241c6a69c61SPekka Enberg 24246aa8d69SPekka Enberg switch (offset) { 243c59fa0c4SThomas Gleixner case UART_TX: 244d4b02a37SThomas Gleixner if (dev->lcr & UART_LCR_DLAB) { 245c59fa0c4SThomas Gleixner dev->dll = ioport__read8(data); 246d4b02a37SThomas Gleixner break; 247d4b02a37SThomas Gleixner } 248d4b02a37SThomas Gleixner 249d4b02a37SThomas Gleixner /* Loopback mode */ 250d4b02a37SThomas Gleixner if (dev->mcr & UART_MCR_LOOP) { 251d4b02a37SThomas Gleixner if (dev->rxcnt < FIFO_LEN) { 252d4b02a37SThomas Gleixner dev->rxbuf[dev->rxcnt++] = *addr; 253d4b02a37SThomas Gleixner dev->lsr |= UART_LSR_DR; 254d4b02a37SThomas Gleixner } 255d4b02a37SThomas Gleixner break; 256d4b02a37SThomas Gleixner } 257d4b02a37SThomas Gleixner 258d4b02a37SThomas Gleixner if (dev->txcnt < FIFO_LEN) { 259d4b02a37SThomas Gleixner dev->txbuf[dev->txcnt++] = *addr; 260d4b02a37SThomas Gleixner dev->lsr &= ~UART_LSR_TEMT; 261d4b02a37SThomas Gleixner if (dev->txcnt == FIFO_LEN / 2) 262d4b02a37SThomas Gleixner dev->lsr &= ~UART_LSR_THRE; 263d4b02a37SThomas Gleixner } else { 264d4b02a37SThomas Gleixner /* Should never happpen */ 265d4b02a37SThomas Gleixner dev->lsr &= ~(UART_LSR_TEMT | UART_LSR_THRE); 26646aa8d69SPekka Enberg } 267369c01c0SPekka Enberg break; 2684e49b05bSCyrill Gorcunov case UART_IER: 269f6b8ccc1SThomas Gleixner if (!(dev->lcr & UART_LCR_DLAB)) 270d4b02a37SThomas Gleixner dev->ier = ioport__read8(data) & 0x0f; 271f6b8ccc1SThomas Gleixner else 272c59fa0c4SThomas Gleixner dev->dlm = ioport__read8(data); 273c59fa0c4SThomas Gleixner break; 274c59fa0c4SThomas Gleixner case UART_FCR: 275c59fa0c4SThomas Gleixner dev->fcr = ioport__read8(data); 27646aa8d69SPekka Enberg break; 277369c01c0SPekka Enberg case UART_LCR: 278369c01c0SPekka Enberg dev->lcr = ioport__read8(data); 279369c01c0SPekka Enberg break; 280369c01c0SPekka Enberg case UART_MCR: 281369c01c0SPekka Enberg dev->mcr = ioport__read8(data); 282369c01c0SPekka Enberg break; 283369c01c0SPekka Enberg case UART_LSR: 284369c01c0SPekka Enberg /* Factory test */ 285369c01c0SPekka Enberg break; 286369c01c0SPekka Enberg case UART_MSR: 287369c01c0SPekka Enberg /* Not used */ 288369c01c0SPekka Enberg break; 289369c01c0SPekka Enberg case UART_SCR: 290369c01c0SPekka Enberg dev->scr = ioport__read8(data); 291369c01c0SPekka Enberg break; 292369c01c0SPekka Enberg default: 2932932c9ebSPekka Enberg ret = false; 294d2ea115dSThomas Gleixner break; 29546aa8d69SPekka Enberg } 2962932c9ebSPekka Enberg 297f6b8ccc1SThomas Gleixner serial8250_update_irq(kvm, dev); 298f6b8ccc1SThomas Gleixner 2994ef0f4d6SPekka Enberg mutex_unlock(&dev->mutex); 3002932c9ebSPekka Enberg 3012932c9ebSPekka Enberg return ret; 30213a7760fSPekka Enberg } 30313a7760fSPekka Enberg 304d4b02a37SThomas Gleixner static void serial8250_rx(struct serial8250_device *dev, void *data) 305d4b02a37SThomas Gleixner { 306d4b02a37SThomas Gleixner if (dev->rxdone == dev->rxcnt) 307d4b02a37SThomas Gleixner return; 308d4b02a37SThomas Gleixner 309d4b02a37SThomas Gleixner /* Break issued ? */ 310d4b02a37SThomas Gleixner if (dev->lsr & UART_LSR_BI) { 311d4b02a37SThomas Gleixner dev->lsr &= ~UART_LSR_BI; 312d4b02a37SThomas Gleixner ioport__write8(data, 0); 313d4b02a37SThomas Gleixner return; 314d4b02a37SThomas Gleixner } 315d4b02a37SThomas Gleixner 316d4b02a37SThomas Gleixner ioport__write8(data, dev->rxbuf[dev->rxdone++]); 317d4b02a37SThomas Gleixner if (dev->rxcnt == dev->rxdone) { 318d4b02a37SThomas Gleixner dev->lsr &= ~UART_LSR_DR; 319d4b02a37SThomas Gleixner dev->rxcnt = dev->rxdone = 0; 320d4b02a37SThomas Gleixner } 321d4b02a37SThomas Gleixner } 322d4b02a37SThomas Gleixner 323c9f6a037SXiao Guangrong static bool serial8250_in(struct ioport *ioport, struct kvm *kvm, u16 port, void *data, int size) 32425af6674SPekka Enberg { 325*d28abb58SWill Deacon struct serial8250_device *dev = ioport->priv; 3263fdf659dSSasha Levin u16 offset; 3272932c9ebSPekka Enberg bool ret = true; 32846aa8d69SPekka Enberg 3294ef0f4d6SPekka Enberg mutex_lock(&dev->mutex); 3302932c9ebSPekka Enberg 331c6a69c61SPekka Enberg offset = port - dev->iobase; 332c6a69c61SPekka Enberg 33346aa8d69SPekka Enberg switch (offset) { 334251cf9a6SPekka Enberg case UART_RX: 335d4b02a37SThomas Gleixner if (dev->lcr & UART_LCR_DLAB) 336c59fa0c4SThomas Gleixner ioport__write8(data, dev->dll); 337d4b02a37SThomas Gleixner else 338d4b02a37SThomas Gleixner serial8250_rx(dev, data); 339369c01c0SPekka Enberg break; 340c59fa0c4SThomas Gleixner case UART_IER: 341c59fa0c4SThomas Gleixner if (dev->lcr & UART_LCR_DLAB) 342c59fa0c4SThomas Gleixner ioport__write8(data, dev->dlm); 343c59fa0c4SThomas Gleixner else 344c59fa0c4SThomas Gleixner ioport__write8(data, dev->ier); 345c59fa0c4SThomas Gleixner break; 346f6b8ccc1SThomas Gleixner case UART_IIR: 347d4b02a37SThomas Gleixner ioport__write8(data, dev->iir | UART_IIR_TYPE_BITS); 34846aa8d69SPekka Enberg break; 3494e49b05bSCyrill Gorcunov case UART_LCR: 350c6a69c61SPekka Enberg ioport__write8(data, dev->lcr); 35146aa8d69SPekka Enberg break; 3524e49b05bSCyrill Gorcunov case UART_MCR: 353c6a69c61SPekka Enberg ioport__write8(data, dev->mcr); 35446aa8d69SPekka Enberg break; 3554e49b05bSCyrill Gorcunov case UART_LSR: 356c6a69c61SPekka Enberg ioport__write8(data, dev->lsr); 35746aa8d69SPekka Enberg break; 3584e49b05bSCyrill Gorcunov case UART_MSR: 359369c01c0SPekka Enberg ioport__write8(data, dev->msr); 36046aa8d69SPekka Enberg break; 3614e49b05bSCyrill Gorcunov case UART_SCR: 362369c01c0SPekka Enberg ioport__write8(data, dev->scr); 36346aa8d69SPekka Enberg break; 364369c01c0SPekka Enberg default: 3652932c9ebSPekka Enberg ret = false; 366c59fa0c4SThomas Gleixner break; 36725af6674SPekka Enberg } 368f6b8ccc1SThomas Gleixner 369f6b8ccc1SThomas Gleixner serial8250_update_irq(kvm, dev); 370f6b8ccc1SThomas Gleixner 3714ef0f4d6SPekka Enberg mutex_unlock(&dev->mutex); 3722932c9ebSPekka Enberg 3732932c9ebSPekka Enberg return ret; 37413a7760fSPekka Enberg } 37513a7760fSPekka Enberg 376*d28abb58SWill Deacon #ifdef CONFIG_HAS_LIBFDT 377*d28abb58SWill Deacon static void serial8250_generate_fdt_node(struct ioport *ioport, void *fdt, 378*d28abb58SWill Deacon void (*generate_irq_prop)(void *fdt, 379*d28abb58SWill Deacon u8 irq)) 380*d28abb58SWill Deacon { 381*d28abb58SWill Deacon struct serial8250_device *dev = ioport->priv; 382*d28abb58SWill Deacon u64 reg_prop[] = { 383*d28abb58SWill Deacon cpu_to_fdt64(KVM_IOPORT_AREA + dev->iobase), 384*d28abb58SWill Deacon cpu_to_fdt64(8), 385*d28abb58SWill Deacon }; 386*d28abb58SWill Deacon 387*d28abb58SWill Deacon _FDT(fdt_begin_node(fdt, "U6_16550A")); 388*d28abb58SWill Deacon _FDT(fdt_property_string(fdt, "compatible", "ns16550a")); 389*d28abb58SWill Deacon _FDT(fdt_property(fdt, "reg", reg_prop, sizeof(reg_prop))); 390*d28abb58SWill Deacon generate_irq_prop(fdt, dev->irq); 391*d28abb58SWill Deacon _FDT(fdt_property_cell(fdt, "clock-frequency", 1843200)); 392*d28abb58SWill Deacon _FDT(fdt_end_node(fdt)); 393*d28abb58SWill Deacon } 394*d28abb58SWill Deacon #else 395*d28abb58SWill Deacon #define serial8250_generate_fdt_node NULL 396*d28abb58SWill Deacon #endif 397*d28abb58SWill Deacon 39846aa8d69SPekka Enberg static struct ioport_operations serial8250_ops = { 39946aa8d69SPekka Enberg .io_in = serial8250_in, 40046aa8d69SPekka Enberg .io_out = serial8250_out, 401*d28abb58SWill Deacon .generate_fdt_node = serial8250_generate_fdt_node, 402a93ec68bSPekka Enberg }; 403a93ec68bSPekka Enberg 40420715a22SSasha Levin static int serial8250__device_init(struct kvm *kvm, struct serial8250_device *dev) 405bc4b0ffeSPekka Enberg { 40620715a22SSasha Levin int r; 40720715a22SSasha Levin 408206c41f4SWill Deacon ioport__map_irq(&dev->irq); 409*d28abb58SWill Deacon r = ioport__register(kvm, dev->iobase, &serial8250_ops, 8, dev); 410bc4b0ffeSPekka Enberg kvm__irq_line(kvm, dev->irq, 0); 41120715a22SSasha Levin 41220715a22SSasha Levin return r; 413bc4b0ffeSPekka Enberg } 414bc4b0ffeSPekka Enberg 41520715a22SSasha Levin int serial8250__init(struct kvm *kvm) 41613a7760fSPekka Enberg { 41720715a22SSasha Levin unsigned int i, j; 41820715a22SSasha Levin int r = 0; 419c6a69c61SPekka Enberg 420c6a69c61SPekka Enberg for (i = 0; i < ARRAY_SIZE(devices); i++) { 421c6a69c61SPekka Enberg struct serial8250_device *dev = &devices[i]; 422c6a69c61SPekka Enberg 42320715a22SSasha Levin r = serial8250__device_init(kvm, dev); 42420715a22SSasha Levin if (r < 0) 42520715a22SSasha Levin goto cleanup; 426c6a69c61SPekka Enberg } 42720715a22SSasha Levin 42820715a22SSasha Levin return r; 42920715a22SSasha Levin cleanup: 43020715a22SSasha Levin for (j = 0; j <= i; j++) { 43120715a22SSasha Levin struct serial8250_device *dev = &devices[j]; 43220715a22SSasha Levin 4334346fd8fSSasha Levin ioport__unregister(kvm, dev->iobase); 43420715a22SSasha Levin } 43520715a22SSasha Levin 43620715a22SSasha Levin return r; 43720715a22SSasha Levin } 43849a8afd1SSasha Levin dev_init(serial8250__init); 43920715a22SSasha Levin 44020715a22SSasha Levin int serial8250__exit(struct kvm *kvm) 44120715a22SSasha Levin { 44220715a22SSasha Levin unsigned int i; 44320715a22SSasha Levin int r; 44420715a22SSasha Levin 44520715a22SSasha Levin for (i = 0; i < ARRAY_SIZE(devices); i++) { 44620715a22SSasha Levin struct serial8250_device *dev = &devices[i]; 44720715a22SSasha Levin 4484346fd8fSSasha Levin r = ioport__unregister(kvm, dev->iobase); 44920715a22SSasha Levin if (r < 0) 45020715a22SSasha Levin return r; 45120715a22SSasha Levin } 45220715a22SSasha Levin 45320715a22SSasha Levin return 0; 45413a7760fSPekka Enberg } 45549a8afd1SSasha Levin dev_exit(serial8250__exit); 456