1 /* 2 * x86/vmx.c : Framework for testing nested virtualization 3 * This is a framework to test nested VMX for KVM, which 4 * started as a project of GSoC 2013. All test cases should 5 * be located in x86/vmx_tests.c and framework related 6 * functions should be in this file. 7 * 8 * How to write test cases? 9 * Add callbacks of test suite in variant "vmx_tests". You can 10 * write: 11 * 1. init function used for initializing test suite 12 * 2. main function for codes running in L2 guest, 13 * 3. exit_handler to handle vmexit of L2 to L1 14 * 4. syscall handler to handle L2 syscall vmexit 15 * 5. vmenter fail handler to handle direct failure of vmenter 16 * 6. guest_regs is loaded when vmenter and saved when 17 * vmexit, you can read and set it in exit_handler 18 * If no special function is needed for a test suite, use 19 * coressponding basic_* functions as callback. More handlers 20 * can be added to "vmx_tests", see details of "struct vmx_test" 21 * and function test_run(). 22 * 23 * Currently, vmx test framework only set up one VCPU and one 24 * concurrent guest test environment with same paging for L2 and 25 * L1. For usage of EPT, only 1:1 mapped paging is used from VFN 26 * to PFN. 27 * 28 * Author : Arthur Chunqi Li <yzt356@gmail.com> 29 */ 30 31 #include "libcflat.h" 32 #include "processor.h" 33 #include "alloc_page.h" 34 #include "vm.h" 35 #include "vmalloc.h" 36 #include "desc.h" 37 #include "vmx.h" 38 #include "msr.h" 39 #include "smp.h" 40 #include "apic.h" 41 42 u64 *bsp_vmxon_region; 43 struct vmcs *vmcs_root; 44 u32 vpid_cnt; 45 void *guest_stack, *guest_syscall_stack; 46 u32 ctrl_pin, ctrl_enter, ctrl_exit, ctrl_cpu[2]; 47 struct regs regs; 48 49 struct vmx_test *current; 50 51 #define MAX_TEST_TEARDOWN_STEPS 10 52 53 struct test_teardown_step { 54 test_teardown_func func; 55 void *data; 56 }; 57 58 static int teardown_count; 59 static struct test_teardown_step teardown_steps[MAX_TEST_TEARDOWN_STEPS]; 60 61 static test_guest_func v2_guest_main; 62 63 u64 hypercall_field; 64 bool launched; 65 static int matched; 66 static int guest_finished; 67 static int in_guest; 68 69 union vmx_basic basic; 70 union vmx_ctrl_msr ctrl_pin_rev; 71 union vmx_ctrl_msr ctrl_cpu_rev[2]; 72 union vmx_ctrl_msr ctrl_exit_rev; 73 union vmx_ctrl_msr ctrl_enter_rev; 74 union vmx_ept_vpid ept_vpid; 75 76 extern struct descriptor_table_ptr gdt_descr; 77 extern struct descriptor_table_ptr idt_descr; 78 extern void *vmx_return; 79 extern void *entry_sysenter; 80 extern void *guest_entry; 81 82 static volatile u32 stage; 83 84 static jmp_buf abort_target; 85 86 struct vmcs_field { 87 u64 mask; 88 u64 encoding; 89 }; 90 91 #define MASK(_bits) GENMASK_ULL((_bits) - 1, 0) 92 #define MASK_NATURAL MASK(sizeof(unsigned long) * 8) 93 94 static struct vmcs_field vmcs_fields[] = { 95 { MASK(16), VPID }, 96 { MASK(16), PINV }, 97 { MASK(16), EPTP_IDX }, 98 99 { MASK(16), GUEST_SEL_ES }, 100 { MASK(16), GUEST_SEL_CS }, 101 { MASK(16), GUEST_SEL_SS }, 102 { MASK(16), GUEST_SEL_DS }, 103 { MASK(16), GUEST_SEL_FS }, 104 { MASK(16), GUEST_SEL_GS }, 105 { MASK(16), GUEST_SEL_LDTR }, 106 { MASK(16), GUEST_SEL_TR }, 107 { MASK(16), GUEST_INT_STATUS }, 108 109 { MASK(16), HOST_SEL_ES }, 110 { MASK(16), HOST_SEL_CS }, 111 { MASK(16), HOST_SEL_SS }, 112 { MASK(16), HOST_SEL_DS }, 113 { MASK(16), HOST_SEL_FS }, 114 { MASK(16), HOST_SEL_GS }, 115 { MASK(16), HOST_SEL_TR }, 116 117 { MASK(64), IO_BITMAP_A }, 118 { MASK(64), IO_BITMAP_B }, 119 { MASK(64), MSR_BITMAP }, 120 { MASK(64), EXIT_MSR_ST_ADDR }, 121 { MASK(64), EXIT_MSR_LD_ADDR }, 122 { MASK(64), ENTER_MSR_LD_ADDR }, 123 { MASK(64), VMCS_EXEC_PTR }, 124 { MASK(64), TSC_OFFSET }, 125 { MASK(64), APIC_VIRT_ADDR }, 126 { MASK(64), APIC_ACCS_ADDR }, 127 { MASK(64), EPTP }, 128 129 { MASK(64), INFO_PHYS_ADDR }, 130 131 { MASK(64), VMCS_LINK_PTR }, 132 { MASK(64), GUEST_DEBUGCTL }, 133 { MASK(64), GUEST_EFER }, 134 { MASK(64), GUEST_PAT }, 135 { MASK(64), GUEST_PERF_GLOBAL_CTRL }, 136 { MASK(64), GUEST_PDPTE }, 137 138 { MASK(64), HOST_PAT }, 139 { MASK(64), HOST_EFER }, 140 { MASK(64), HOST_PERF_GLOBAL_CTRL }, 141 142 { MASK(32), PIN_CONTROLS }, 143 { MASK(32), CPU_EXEC_CTRL0 }, 144 { MASK(32), EXC_BITMAP }, 145 { MASK(32), PF_ERROR_MASK }, 146 { MASK(32), PF_ERROR_MATCH }, 147 { MASK(32), CR3_TARGET_COUNT }, 148 { MASK(32), EXI_CONTROLS }, 149 { MASK(32), EXI_MSR_ST_CNT }, 150 { MASK(32), EXI_MSR_LD_CNT }, 151 { MASK(32), ENT_CONTROLS }, 152 { MASK(32), ENT_MSR_LD_CNT }, 153 { MASK(32), ENT_INTR_INFO }, 154 { MASK(32), ENT_INTR_ERROR }, 155 { MASK(32), ENT_INST_LEN }, 156 { MASK(32), TPR_THRESHOLD }, 157 { MASK(32), CPU_EXEC_CTRL1 }, 158 159 { MASK(32), VMX_INST_ERROR }, 160 { MASK(32), EXI_REASON }, 161 { MASK(32), EXI_INTR_INFO }, 162 { MASK(32), EXI_INTR_ERROR }, 163 { MASK(32), IDT_VECT_INFO }, 164 { MASK(32), IDT_VECT_ERROR }, 165 { MASK(32), EXI_INST_LEN }, 166 { MASK(32), EXI_INST_INFO }, 167 168 { MASK(32), GUEST_LIMIT_ES }, 169 { MASK(32), GUEST_LIMIT_CS }, 170 { MASK(32), GUEST_LIMIT_SS }, 171 { MASK(32), GUEST_LIMIT_DS }, 172 { MASK(32), GUEST_LIMIT_FS }, 173 { MASK(32), GUEST_LIMIT_GS }, 174 { MASK(32), GUEST_LIMIT_LDTR }, 175 { MASK(32), GUEST_LIMIT_TR }, 176 { MASK(32), GUEST_LIMIT_GDTR }, 177 { MASK(32), GUEST_LIMIT_IDTR }, 178 { 0x1d0ff, GUEST_AR_ES }, 179 { 0x1f0ff, GUEST_AR_CS }, 180 { 0x1d0ff, GUEST_AR_SS }, 181 { 0x1d0ff, GUEST_AR_DS }, 182 { 0x1d0ff, GUEST_AR_FS }, 183 { 0x1d0ff, GUEST_AR_GS }, 184 { 0x1d0ff, GUEST_AR_LDTR }, 185 { 0x1d0ff, GUEST_AR_TR }, 186 { MASK(32), GUEST_INTR_STATE }, 187 { MASK(32), GUEST_ACTV_STATE }, 188 { MASK(32), GUEST_SMBASE }, 189 { MASK(32), GUEST_SYSENTER_CS }, 190 { MASK(32), PREEMPT_TIMER_VALUE }, 191 192 { MASK(32), HOST_SYSENTER_CS }, 193 194 { MASK_NATURAL, CR0_MASK }, 195 { MASK_NATURAL, CR4_MASK }, 196 { MASK_NATURAL, CR0_READ_SHADOW }, 197 { MASK_NATURAL, CR4_READ_SHADOW }, 198 { MASK_NATURAL, CR3_TARGET_0 }, 199 { MASK_NATURAL, CR3_TARGET_1 }, 200 { MASK_NATURAL, CR3_TARGET_2 }, 201 { MASK_NATURAL, CR3_TARGET_3 }, 202 203 { MASK_NATURAL, EXI_QUALIFICATION }, 204 { MASK_NATURAL, IO_RCX }, 205 { MASK_NATURAL, IO_RSI }, 206 { MASK_NATURAL, IO_RDI }, 207 { MASK_NATURAL, IO_RIP }, 208 { MASK_NATURAL, GUEST_LINEAR_ADDRESS }, 209 210 { MASK_NATURAL, GUEST_CR0 }, 211 { MASK_NATURAL, GUEST_CR3 }, 212 { MASK_NATURAL, GUEST_CR4 }, 213 { MASK_NATURAL, GUEST_BASE_ES }, 214 { MASK_NATURAL, GUEST_BASE_CS }, 215 { MASK_NATURAL, GUEST_BASE_SS }, 216 { MASK_NATURAL, GUEST_BASE_DS }, 217 { MASK_NATURAL, GUEST_BASE_FS }, 218 { MASK_NATURAL, GUEST_BASE_GS }, 219 { MASK_NATURAL, GUEST_BASE_LDTR }, 220 { MASK_NATURAL, GUEST_BASE_TR }, 221 { MASK_NATURAL, GUEST_BASE_GDTR }, 222 { MASK_NATURAL, GUEST_BASE_IDTR }, 223 { MASK_NATURAL, GUEST_DR7 }, 224 { MASK_NATURAL, GUEST_RSP }, 225 { MASK_NATURAL, GUEST_RIP }, 226 { MASK_NATURAL, GUEST_RFLAGS }, 227 { MASK_NATURAL, GUEST_PENDING_DEBUG }, 228 { MASK_NATURAL, GUEST_SYSENTER_ESP }, 229 { MASK_NATURAL, GUEST_SYSENTER_EIP }, 230 231 { MASK_NATURAL, HOST_CR0 }, 232 { MASK_NATURAL, HOST_CR3 }, 233 { MASK_NATURAL, HOST_CR4 }, 234 { MASK_NATURAL, HOST_BASE_FS }, 235 { MASK_NATURAL, HOST_BASE_GS }, 236 { MASK_NATURAL, HOST_BASE_TR }, 237 { MASK_NATURAL, HOST_BASE_GDTR }, 238 { MASK_NATURAL, HOST_BASE_IDTR }, 239 { MASK_NATURAL, HOST_SYSENTER_ESP }, 240 { MASK_NATURAL, HOST_SYSENTER_EIP }, 241 { MASK_NATURAL, HOST_RSP }, 242 { MASK_NATURAL, HOST_RIP }, 243 }; 244 245 enum vmcs_field_type { 246 VMCS_FIELD_TYPE_CONTROL = 0, 247 VMCS_FIELD_TYPE_READ_ONLY_DATA = 1, 248 VMCS_FIELD_TYPE_GUEST = 2, 249 VMCS_FIELD_TYPE_HOST = 3, 250 VMCS_FIELD_TYPES, 251 }; 252 253 static inline int vmcs_field_type(struct vmcs_field *f) 254 { 255 return (f->encoding >> VMCS_FIELD_TYPE_SHIFT) & 0x3; 256 } 257 258 static int vmcs_field_readonly(struct vmcs_field *f) 259 { 260 u64 ia32_vmx_misc; 261 262 ia32_vmx_misc = rdmsr(MSR_IA32_VMX_MISC); 263 return !(ia32_vmx_misc & MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS) && 264 (vmcs_field_type(f) == VMCS_FIELD_TYPE_READ_ONLY_DATA); 265 } 266 267 static inline u64 vmcs_field_value(struct vmcs_field *f, u8 cookie) 268 { 269 u64 value; 270 271 /* Incorporate the cookie and the field encoding into the value. */ 272 value = cookie; 273 value |= (f->encoding << 8); 274 value |= 0xdeadbeefull << 32; 275 276 return value & f->mask; 277 } 278 279 static void set_vmcs_field(struct vmcs_field *f, u8 cookie) 280 { 281 vmcs_write(f->encoding, vmcs_field_value(f, cookie)); 282 } 283 284 static bool check_vmcs_field(struct vmcs_field *f, u8 cookie) 285 { 286 u64 expected; 287 u64 actual; 288 int ret; 289 290 if (f->encoding == VMX_INST_ERROR) { 291 printf("Skipping volatile field %lx\n", f->encoding); 292 return true; 293 } 294 295 ret = vmcs_read_checking(f->encoding, &actual); 296 assert(!(ret & X86_EFLAGS_CF)); 297 /* Skip VMCS fields that aren't recognized by the CPU */ 298 if (ret & X86_EFLAGS_ZF) 299 return true; 300 301 if (vmcs_field_readonly(f)) { 302 printf("Skipping read-only field %lx\n", f->encoding); 303 return true; 304 } 305 306 expected = vmcs_field_value(f, cookie); 307 actual &= f->mask; 308 309 if (expected == actual) 310 return true; 311 312 printf("FAIL: VMWRITE/VMREAD %lx (expected: %lx, actual: %lx)\n", 313 f->encoding, (unsigned long) expected, (unsigned long) actual); 314 315 return false; 316 } 317 318 static void set_all_vmcs_fields(u8 cookie) 319 { 320 int i; 321 322 for (i = 0; i < ARRAY_SIZE(vmcs_fields); i++) 323 set_vmcs_field(&vmcs_fields[i], cookie); 324 } 325 326 static bool check_all_vmcs_fields(u8 cookie) 327 { 328 bool pass = true; 329 int i; 330 331 for (i = 0; i < ARRAY_SIZE(vmcs_fields); i++) { 332 if (!check_vmcs_field(&vmcs_fields[i], cookie)) 333 pass = false; 334 } 335 336 return pass; 337 } 338 339 static u32 find_vmcs_max_index(void) 340 { 341 u32 idx, width, type, enc; 342 u64 actual; 343 int ret; 344 345 /* scan backwards and stop when found */ 346 for (idx = (1 << 9) - 1; idx >= 0; idx--) { 347 348 /* try all combinations of width and type */ 349 for (type = 0; type < (1 << 2); type++) { 350 for (width = 0; width < (1 << 2) ; width++) { 351 enc = (idx << VMCS_FIELD_INDEX_SHIFT) | 352 (type << VMCS_FIELD_TYPE_SHIFT) | 353 (width << VMCS_FIELD_WIDTH_SHIFT); 354 355 ret = vmcs_read_checking(enc, &actual); 356 assert(!(ret & X86_EFLAGS_CF)); 357 if (!(ret & X86_EFLAGS_ZF)) 358 return idx; 359 } 360 } 361 } 362 /* some VMCS fields should exist */ 363 assert(0); 364 return 0; 365 } 366 367 static void test_vmwrite_vmread(void) 368 { 369 struct vmcs *vmcs = alloc_page(); 370 u32 vmcs_enum_max, max_index = 0; 371 372 vmcs->hdr.revision_id = basic.revision; 373 assert(!vmcs_clear(vmcs)); 374 assert(!make_vmcs_current(vmcs)); 375 376 set_all_vmcs_fields(0x42); 377 report(check_all_vmcs_fields(0x42), "VMWRITE/VMREAD"); 378 379 vmcs_enum_max = (rdmsr(MSR_IA32_VMX_VMCS_ENUM) & VMCS_FIELD_INDEX_MASK) 380 >> VMCS_FIELD_INDEX_SHIFT; 381 max_index = find_vmcs_max_index(); 382 report(vmcs_enum_max == max_index, 383 "VMX_VMCS_ENUM.MAX_INDEX expected: %x, actual: %x", 384 max_index, vmcs_enum_max); 385 386 assert(!vmcs_clear(vmcs)); 387 free_page(vmcs); 388 } 389 390 ulong finish_fault; 391 u8 sentinel; 392 bool handler_called; 393 394 static void pf_handler(struct ex_regs *regs) 395 { 396 /* 397 * check that RIP was not improperly advanced and that the 398 * flags value was preserved. 399 */ 400 report(regs->rip < finish_fault, "RIP has not been advanced!"); 401 report(((u8)regs->rflags == ((sentinel | 2) & 0xd7)), 402 "The low byte of RFLAGS was preserved!"); 403 regs->rip = finish_fault; 404 handler_called = true; 405 406 } 407 408 static void prep_flags_test_env(void **vpage, struct vmcs **vmcs, handler *old) 409 { 410 /* 411 * get an unbacked address that will cause a #PF 412 */ 413 *vpage = alloc_vpage(); 414 415 /* 416 * set up VMCS so we have something to read from 417 */ 418 *vmcs = alloc_page(); 419 420 memset(*vmcs, 0, PAGE_SIZE); 421 (*vmcs)->hdr.revision_id = basic.revision; 422 assert(!vmcs_clear(*vmcs)); 423 assert(!make_vmcs_current(*vmcs)); 424 425 *old = handle_exception(PF_VECTOR, &pf_handler); 426 } 427 428 static noinline void test_read_sentinel(void) 429 { 430 void *vpage; 431 struct vmcs *vmcs; 432 handler old; 433 434 prep_flags_test_env(&vpage, &vmcs, &old); 435 436 /* 437 * set the proper label 438 */ 439 extern char finish_read_fault; 440 441 finish_fault = (ulong)&finish_read_fault; 442 443 /* 444 * execute the vmread instruction that will cause a #PF 445 */ 446 handler_called = false; 447 asm volatile ("movb %[byte], %%ah\n\t" 448 "sahf\n\t" 449 "vmread %[enc], %[val]; finish_read_fault:" 450 : [val] "=m" (*(u64 *)vpage) 451 : [byte] "Krm" (sentinel), 452 [enc] "r" ((u64)GUEST_SEL_SS) 453 : "cc", "ah"); 454 report(handler_called, "The #PF handler was invoked"); 455 456 /* 457 * restore the old #PF handler 458 */ 459 handle_exception(PF_VECTOR, old); 460 } 461 462 static void test_vmread_flags_touch(void) 463 { 464 /* 465 * set up the sentinel value in the flags register. we 466 * choose these two values because they candy-stripe 467 * the 5 flags that sahf sets. 468 */ 469 sentinel = 0x91; 470 test_read_sentinel(); 471 472 sentinel = 0x45; 473 test_read_sentinel(); 474 } 475 476 static noinline void test_write_sentinel(void) 477 { 478 void *vpage; 479 struct vmcs *vmcs; 480 handler old; 481 482 prep_flags_test_env(&vpage, &vmcs, &old); 483 484 /* 485 * set the proper label 486 */ 487 extern char finish_write_fault; 488 489 finish_fault = (ulong)&finish_write_fault; 490 491 /* 492 * execute the vmwrite instruction that will cause a #PF 493 */ 494 handler_called = false; 495 asm volatile ("movb %[byte], %%ah\n\t" 496 "sahf\n\t" 497 "vmwrite %[val], %[enc]; finish_write_fault:" 498 : [val] "=m" (*(u64 *)vpage) 499 : [byte] "Krm" (sentinel), 500 [enc] "r" ((u64)GUEST_SEL_SS) 501 : "cc", "ah"); 502 report(handler_called, "The #PF handler was invoked"); 503 504 /* 505 * restore the old #PF handler 506 */ 507 handle_exception(PF_VECTOR, old); 508 } 509 510 static void test_vmwrite_flags_touch(void) 511 { 512 /* 513 * set up the sentinel value in the flags register. we 514 * choose these two values because they candy-stripe 515 * the 5 flags that sahf sets. 516 */ 517 sentinel = 0x91; 518 test_write_sentinel(); 519 520 sentinel = 0x45; 521 test_write_sentinel(); 522 } 523 524 525 static void test_vmcs_high(void) 526 { 527 struct vmcs *vmcs = alloc_page(); 528 529 vmcs->hdr.revision_id = basic.revision; 530 assert(!vmcs_clear(vmcs)); 531 assert(!make_vmcs_current(vmcs)); 532 533 vmcs_write(TSC_OFFSET, 0x0123456789ABCDEFull); 534 report(vmcs_read(TSC_OFFSET) == 0x0123456789ABCDEFull, 535 "VMREAD TSC_OFFSET after VMWRITE TSC_OFFSET"); 536 report(vmcs_read(TSC_OFFSET_HI) == 0x01234567ull, 537 "VMREAD TSC_OFFSET_HI after VMWRITE TSC_OFFSET"); 538 vmcs_write(TSC_OFFSET_HI, 0x76543210ul); 539 report(vmcs_read(TSC_OFFSET_HI) == 0x76543210ul, 540 "VMREAD TSC_OFFSET_HI after VMWRITE TSC_OFFSET_HI"); 541 report(vmcs_read(TSC_OFFSET) == 0x7654321089ABCDEFull, 542 "VMREAD TSC_OFFSET after VMWRITE TSC_OFFSET_HI"); 543 544 assert(!vmcs_clear(vmcs)); 545 free_page(vmcs); 546 } 547 548 static void test_vmcs_lifecycle(void) 549 { 550 struct vmcs *vmcs[2] = {}; 551 int i; 552 553 for (i = 0; i < ARRAY_SIZE(vmcs); i++) { 554 vmcs[i] = alloc_page(); 555 vmcs[i]->hdr.revision_id = basic.revision; 556 } 557 558 #define VMPTRLD(_i) do { \ 559 assert(_i < ARRAY_SIZE(vmcs)); \ 560 assert(!make_vmcs_current(vmcs[_i])); \ 561 printf("VMPTRLD VMCS%d\n", (_i)); \ 562 } while (0) 563 564 #define VMCLEAR(_i) do { \ 565 assert(_i < ARRAY_SIZE(vmcs)); \ 566 assert(!vmcs_clear(vmcs[_i])); \ 567 printf("VMCLEAR VMCS%d\n", (_i)); \ 568 } while (0) 569 570 VMCLEAR(0); 571 VMPTRLD(0); 572 set_all_vmcs_fields(0); 573 report(check_all_vmcs_fields(0), "current:VMCS0 active:[VMCS0]"); 574 575 VMCLEAR(0); 576 VMPTRLD(0); 577 report(check_all_vmcs_fields(0), "current:VMCS0 active:[VMCS0]"); 578 579 VMCLEAR(1); 580 report(check_all_vmcs_fields(0), "current:VMCS0 active:[VMCS0]"); 581 582 VMPTRLD(1); 583 set_all_vmcs_fields(1); 584 report(check_all_vmcs_fields(1), "current:VMCS1 active:[VMCS0,VCMS1]"); 585 586 VMPTRLD(0); 587 report(check_all_vmcs_fields(0), "current:VMCS0 active:[VMCS0,VCMS1]"); 588 VMPTRLD(1); 589 report(check_all_vmcs_fields(1), "current:VMCS1 active:[VMCS0,VCMS1]"); 590 VMPTRLD(1); 591 report(check_all_vmcs_fields(1), "current:VMCS1 active:[VMCS0,VCMS1]"); 592 593 VMCLEAR(0); 594 report(check_all_vmcs_fields(1), "current:VMCS1 active:[VCMS1]"); 595 596 /* VMPTRLD should not erase VMWRITEs to the current VMCS */ 597 set_all_vmcs_fields(2); 598 VMPTRLD(1); 599 report(check_all_vmcs_fields(2), "current:VMCS1 active:[VCMS1]"); 600 601 for (i = 0; i < ARRAY_SIZE(vmcs); i++) { 602 VMCLEAR(i); 603 free_page(vmcs[i]); 604 } 605 606 #undef VMPTRLD 607 #undef VMCLEAR 608 } 609 610 void vmx_set_test_stage(u32 s) 611 { 612 barrier(); 613 stage = s; 614 barrier(); 615 } 616 617 u32 vmx_get_test_stage(void) 618 { 619 u32 s; 620 621 barrier(); 622 s = stage; 623 barrier(); 624 return s; 625 } 626 627 void vmx_inc_test_stage(void) 628 { 629 barrier(); 630 stage++; 631 barrier(); 632 } 633 634 /* entry_sysenter */ 635 asm( 636 ".align 4, 0x90\n\t" 637 ".globl entry_sysenter\n\t" 638 "entry_sysenter:\n\t" 639 SAVE_GPR 640 " and $0xf, %rax\n\t" 641 " mov %rax, %rdi\n\t" 642 " call syscall_handler\n\t" 643 LOAD_GPR 644 " vmresume\n\t" 645 ); 646 647 static void __attribute__((__used__)) syscall_handler(u64 syscall_no) 648 { 649 if (current->syscall_handler) 650 current->syscall_handler(syscall_no); 651 } 652 653 static const char * const exit_reason_descriptions[] = { 654 [VMX_EXC_NMI] = "VMX_EXC_NMI", 655 [VMX_EXTINT] = "VMX_EXTINT", 656 [VMX_TRIPLE_FAULT] = "VMX_TRIPLE_FAULT", 657 [VMX_INIT] = "VMX_INIT", 658 [VMX_SIPI] = "VMX_SIPI", 659 [VMX_SMI_IO] = "VMX_SMI_IO", 660 [VMX_SMI_OTHER] = "VMX_SMI_OTHER", 661 [VMX_INTR_WINDOW] = "VMX_INTR_WINDOW", 662 [VMX_NMI_WINDOW] = "VMX_NMI_WINDOW", 663 [VMX_TASK_SWITCH] = "VMX_TASK_SWITCH", 664 [VMX_CPUID] = "VMX_CPUID", 665 [VMX_GETSEC] = "VMX_GETSEC", 666 [VMX_HLT] = "VMX_HLT", 667 [VMX_INVD] = "VMX_INVD", 668 [VMX_INVLPG] = "VMX_INVLPG", 669 [VMX_RDPMC] = "VMX_RDPMC", 670 [VMX_RDTSC] = "VMX_RDTSC", 671 [VMX_RSM] = "VMX_RSM", 672 [VMX_VMCALL] = "VMX_VMCALL", 673 [VMX_VMCLEAR] = "VMX_VMCLEAR", 674 [VMX_VMLAUNCH] = "VMX_VMLAUNCH", 675 [VMX_VMPTRLD] = "VMX_VMPTRLD", 676 [VMX_VMPTRST] = "VMX_VMPTRST", 677 [VMX_VMREAD] = "VMX_VMREAD", 678 [VMX_VMRESUME] = "VMX_VMRESUME", 679 [VMX_VMWRITE] = "VMX_VMWRITE", 680 [VMX_VMXOFF] = "VMX_VMXOFF", 681 [VMX_VMXON] = "VMX_VMXON", 682 [VMX_CR] = "VMX_CR", 683 [VMX_DR] = "VMX_DR", 684 [VMX_IO] = "VMX_IO", 685 [VMX_RDMSR] = "VMX_RDMSR", 686 [VMX_WRMSR] = "VMX_WRMSR", 687 [VMX_FAIL_STATE] = "VMX_FAIL_STATE", 688 [VMX_FAIL_MSR] = "VMX_FAIL_MSR", 689 [VMX_MWAIT] = "VMX_MWAIT", 690 [VMX_MTF] = "VMX_MTF", 691 [VMX_MONITOR] = "VMX_MONITOR", 692 [VMX_PAUSE] = "VMX_PAUSE", 693 [VMX_FAIL_MCHECK] = "VMX_FAIL_MCHECK", 694 [VMX_TPR_THRESHOLD] = "VMX_TPR_THRESHOLD", 695 [VMX_APIC_ACCESS] = "VMX_APIC_ACCESS", 696 [VMX_EOI_INDUCED] = "VMX_EOI_INDUCED", 697 [VMX_GDTR_IDTR] = "VMX_GDTR_IDTR", 698 [VMX_LDTR_TR] = "VMX_LDTR_TR", 699 [VMX_EPT_VIOLATION] = "VMX_EPT_VIOLATION", 700 [VMX_EPT_MISCONFIG] = "VMX_EPT_MISCONFIG", 701 [VMX_INVEPT] = "VMX_INVEPT", 702 [VMX_PREEMPT] = "VMX_PREEMPT", 703 [VMX_INVVPID] = "VMX_INVVPID", 704 [VMX_WBINVD] = "VMX_WBINVD", 705 [VMX_XSETBV] = "VMX_XSETBV", 706 [VMX_APIC_WRITE] = "VMX_APIC_WRITE", 707 [VMX_RDRAND] = "VMX_RDRAND", 708 [VMX_INVPCID] = "VMX_INVPCID", 709 [VMX_VMFUNC] = "VMX_VMFUNC", 710 [VMX_RDSEED] = "VMX_RDSEED", 711 [VMX_PML_FULL] = "VMX_PML_FULL", 712 [VMX_XSAVES] = "VMX_XSAVES", 713 [VMX_XRSTORS] = "VMX_XRSTORS", 714 }; 715 716 const char *exit_reason_description(u64 reason) 717 { 718 if (reason >= ARRAY_SIZE(exit_reason_descriptions)) 719 return "(unknown)"; 720 return exit_reason_descriptions[reason] ? : "(unused)"; 721 } 722 723 void print_vmexit_info(union exit_reason exit_reason) 724 { 725 u64 guest_rip, guest_rsp; 726 ulong exit_qual = vmcs_read(EXI_QUALIFICATION); 727 guest_rip = vmcs_read(GUEST_RIP); 728 guest_rsp = vmcs_read(GUEST_RSP); 729 printf("VMEXIT info:\n"); 730 printf("\tvmexit reason = %u\n", exit_reason.basic); 731 printf("\tfailed vmentry = %u\n", !!exit_reason.failed_vmentry); 732 printf("\texit qualification = %#lx\n", exit_qual); 733 printf("\tguest_rip = %#lx\n", guest_rip); 734 printf("\tRAX=%#lx RBX=%#lx RCX=%#lx RDX=%#lx\n", 735 regs.rax, regs.rbx, regs.rcx, regs.rdx); 736 printf("\tRSP=%#lx RBP=%#lx RSI=%#lx RDI=%#lx\n", 737 guest_rsp, regs.rbp, regs.rsi, regs.rdi); 738 printf("\tR8 =%#lx R9 =%#lx R10=%#lx R11=%#lx\n", 739 regs.r8, regs.r9, regs.r10, regs.r11); 740 printf("\tR12=%#lx R13=%#lx R14=%#lx R15=%#lx\n", 741 regs.r12, regs.r13, regs.r14, regs.r15); 742 } 743 744 void print_vmentry_failure_info(struct vmentry_result *result) 745 { 746 if (result->entered) 747 return; 748 749 if (result->vm_fail) { 750 printf("VM-Fail on %s: ", result->instr); 751 switch (result->flags & VMX_ENTRY_FLAGS) { 752 case X86_EFLAGS_CF: 753 printf("current-VMCS pointer is not valid.\n"); 754 break; 755 case X86_EFLAGS_ZF: 756 printf("error number is %ld. See Intel 30.4.\n", 757 vmcs_read(VMX_INST_ERROR)); 758 break; 759 default: 760 printf("unexpected flags %lx!\n", result->flags); 761 } 762 } else { 763 u64 qual = vmcs_read(EXI_QUALIFICATION); 764 765 printf("VM-Exit failure on %s (reason=%#x, qual=%#lx): ", 766 result->instr, result->exit_reason.full, qual); 767 768 switch (result->exit_reason.basic) { 769 case VMX_FAIL_STATE: 770 printf("invalid guest state\n"); 771 break; 772 case VMX_FAIL_MSR: 773 printf("MSR loading\n"); 774 break; 775 case VMX_FAIL_MCHECK: 776 printf("machine-check event\n"); 777 break; 778 default: 779 printf("unexpected basic exit reason %u\n", 780 result->exit_reason.basic); 781 } 782 783 if (!result->exit_reason.failed_vmentry) 784 printf("\tVMX_ENTRY_FAILURE BIT NOT SET!\n"); 785 786 if (result->exit_reason.full & 0x7fff0000) 787 printf("\tRESERVED BITS SET!\n"); 788 } 789 } 790 791 /* 792 * VMCLEAR should ensures all VMCS state is flushed to the VMCS 793 * region in memory. 794 */ 795 static void test_vmclear_flushing(void) 796 { 797 struct vmcs *vmcs[3] = {}; 798 int i; 799 800 for (i = 0; i < ARRAY_SIZE(vmcs); i++) { 801 vmcs[i] = alloc_page(); 802 } 803 804 vmcs[0]->hdr.revision_id = basic.revision; 805 assert(!vmcs_clear(vmcs[0])); 806 assert(!make_vmcs_current(vmcs[0])); 807 set_all_vmcs_fields(0x86); 808 809 assert(!vmcs_clear(vmcs[0])); 810 memcpy(vmcs[1], vmcs[0], basic.size); 811 assert(!make_vmcs_current(vmcs[1])); 812 report(check_all_vmcs_fields(0x86), 813 "test vmclear flush (current VMCS)"); 814 815 set_all_vmcs_fields(0x87); 816 assert(!make_vmcs_current(vmcs[0])); 817 assert(!vmcs_clear(vmcs[1])); 818 memcpy(vmcs[2], vmcs[1], basic.size); 819 assert(!make_vmcs_current(vmcs[2])); 820 report(check_all_vmcs_fields(0x87), 821 "test vmclear flush (!current VMCS)"); 822 823 for (i = 0; i < ARRAY_SIZE(vmcs); i++) { 824 assert(!vmcs_clear(vmcs[i])); 825 free_page(vmcs[i]); 826 } 827 } 828 829 static void test_vmclear(void) 830 { 831 struct vmcs *tmp_root; 832 int width = cpuid_maxphyaddr(); 833 834 /* 835 * Note- The tests below do not necessarily have a 836 * valid VMCS, but that's ok since the invalid vmcs 837 * is only used for a specific test and is discarded 838 * without touching its contents 839 */ 840 841 /* Unaligned page access */ 842 tmp_root = (struct vmcs *)((intptr_t)vmcs_root + 1); 843 report(vmcs_clear(tmp_root) == 1, "test vmclear with unaligned vmcs"); 844 845 /* gpa bits beyond physical address width are set*/ 846 tmp_root = (struct vmcs *)((intptr_t)vmcs_root | 847 ((u64)1 << (width+1))); 848 report(vmcs_clear(tmp_root) == 1, 849 "test vmclear with vmcs address bits set beyond physical address width"); 850 851 /* Pass VMXON region */ 852 tmp_root = (struct vmcs *)bsp_vmxon_region; 853 report(vmcs_clear(tmp_root) == 1, "test vmclear with vmxon region"); 854 855 /* Valid VMCS */ 856 report(vmcs_clear(vmcs_root) == 0, 857 "test vmclear with valid vmcs region"); 858 859 test_vmclear_flushing(); 860 } 861 862 static void __attribute__((__used__)) guest_main(void) 863 { 864 if (current->v2) 865 v2_guest_main(); 866 else 867 current->guest_main(); 868 } 869 870 /* guest_entry */ 871 asm( 872 ".align 4, 0x90\n\t" 873 ".globl entry_guest\n\t" 874 "guest_entry:\n\t" 875 " call guest_main\n\t" 876 " mov $1, %edi\n\t" 877 " call hypercall\n\t" 878 ); 879 880 /* EPT paging structure related functions */ 881 /* split_large_ept_entry: Split a 2M/1G large page into 512 smaller PTEs. 882 @ptep : large page table entry to split 883 @level : level of ptep (2 or 3) 884 */ 885 static void split_large_ept_entry(unsigned long *ptep, int level) 886 { 887 unsigned long *new_pt; 888 unsigned long gpa; 889 unsigned long pte; 890 unsigned long prototype; 891 int i; 892 893 pte = *ptep; 894 assert(pte & EPT_PRESENT); 895 assert(pte & EPT_LARGE_PAGE); 896 assert(level == 2 || level == 3); 897 898 new_pt = alloc_page(); 899 assert(new_pt); 900 901 prototype = pte & ~EPT_ADDR_MASK; 902 if (level == 2) 903 prototype &= ~EPT_LARGE_PAGE; 904 905 gpa = pte & EPT_ADDR_MASK; 906 for (i = 0; i < EPT_PGDIR_ENTRIES; i++) { 907 new_pt[i] = prototype | gpa; 908 gpa += 1ul << EPT_LEVEL_SHIFT(level - 1); 909 } 910 911 pte &= ~EPT_LARGE_PAGE; 912 pte &= ~EPT_ADDR_MASK; 913 pte |= virt_to_phys(new_pt); 914 915 *ptep = pte; 916 } 917 918 /* install_ept_entry : Install a page to a given level in EPT 919 @pml4 : addr of pml4 table 920 @pte_level : level of PTE to set 921 @guest_addr : physical address of guest 922 @pte : pte value to set 923 @pt_page : address of page table, NULL for a new page 924 */ 925 void install_ept_entry(unsigned long *pml4, 926 int pte_level, 927 unsigned long guest_addr, 928 unsigned long pte, 929 unsigned long *pt_page) 930 { 931 int level; 932 unsigned long *pt = pml4; 933 unsigned offset; 934 935 /* EPT only uses 48 bits of GPA. */ 936 assert(guest_addr < (1ul << 48)); 937 938 for (level = EPT_PAGE_LEVEL; level > pte_level; --level) { 939 offset = (guest_addr >> EPT_LEVEL_SHIFT(level)) 940 & EPT_PGDIR_MASK; 941 if (!(pt[offset] & (EPT_PRESENT))) { 942 unsigned long *new_pt = pt_page; 943 if (!new_pt) 944 new_pt = alloc_page(); 945 else 946 pt_page = 0; 947 memset(new_pt, 0, PAGE_SIZE); 948 pt[offset] = virt_to_phys(new_pt) 949 | EPT_RA | EPT_WA | EPT_EA; 950 } else if (pt[offset] & EPT_LARGE_PAGE) 951 split_large_ept_entry(&pt[offset], level); 952 pt = phys_to_virt(pt[offset] & EPT_ADDR_MASK); 953 } 954 offset = (guest_addr >> EPT_LEVEL_SHIFT(level)) & EPT_PGDIR_MASK; 955 pt[offset] = pte; 956 } 957 958 /* Map a page, @perm is the permission of the page */ 959 void install_ept(unsigned long *pml4, 960 unsigned long phys, 961 unsigned long guest_addr, 962 u64 perm) 963 { 964 install_ept_entry(pml4, 1, guest_addr, (phys & PAGE_MASK) | perm, 0); 965 } 966 967 /* Map a 1G-size page */ 968 void install_1g_ept(unsigned long *pml4, 969 unsigned long phys, 970 unsigned long guest_addr, 971 u64 perm) 972 { 973 install_ept_entry(pml4, 3, guest_addr, 974 (phys & PAGE_MASK) | perm | EPT_LARGE_PAGE, 0); 975 } 976 977 /* Map a 2M-size page */ 978 void install_2m_ept(unsigned long *pml4, 979 unsigned long phys, 980 unsigned long guest_addr, 981 u64 perm) 982 { 983 install_ept_entry(pml4, 2, guest_addr, 984 (phys & PAGE_MASK) | perm | EPT_LARGE_PAGE, 0); 985 } 986 987 /* setup_ept_range : Setup a range of 1:1 mapped page to EPT paging structure. 988 @start : start address of guest page 989 @len : length of address to be mapped 990 @map_1g : whether 1G page map is used 991 @map_2m : whether 2M page map is used 992 @perm : permission for every page 993 */ 994 void setup_ept_range(unsigned long *pml4, unsigned long start, 995 unsigned long len, int map_1g, int map_2m, u64 perm) 996 { 997 u64 phys = start; 998 u64 max = (u64)len + (u64)start; 999 1000 if (map_1g) { 1001 while (phys + PAGE_SIZE_1G <= max) { 1002 install_1g_ept(pml4, phys, phys, perm); 1003 phys += PAGE_SIZE_1G; 1004 } 1005 } 1006 if (map_2m) { 1007 while (phys + PAGE_SIZE_2M <= max) { 1008 install_2m_ept(pml4, phys, phys, perm); 1009 phys += PAGE_SIZE_2M; 1010 } 1011 } 1012 while (phys + PAGE_SIZE <= max) { 1013 install_ept(pml4, phys, phys, perm); 1014 phys += PAGE_SIZE; 1015 } 1016 } 1017 1018 /* get_ept_pte : Get the PTE of a given level in EPT, 1019 @level == 1 means get the latest level*/ 1020 bool get_ept_pte(unsigned long *pml4, unsigned long guest_addr, int level, 1021 unsigned long *pte) 1022 { 1023 int l; 1024 unsigned long *pt = pml4, iter_pte; 1025 unsigned offset; 1026 1027 assert(level >= 1 && level <= 4); 1028 1029 for (l = EPT_PAGE_LEVEL; ; --l) { 1030 offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 1031 iter_pte = pt[offset]; 1032 if (l == level) 1033 break; 1034 if (l < 4 && (iter_pte & EPT_LARGE_PAGE)) 1035 return false; 1036 if (!(iter_pte & (EPT_PRESENT))) 1037 return false; 1038 pt = (unsigned long *)(iter_pte & EPT_ADDR_MASK); 1039 } 1040 offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 1041 if (pte) 1042 *pte = pt[offset]; 1043 return true; 1044 } 1045 1046 static void clear_ept_ad_pte(unsigned long *pml4, unsigned long guest_addr) 1047 { 1048 int l; 1049 unsigned long *pt = pml4; 1050 u64 pte; 1051 unsigned offset; 1052 1053 for (l = EPT_PAGE_LEVEL; ; --l) { 1054 offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 1055 pt[offset] &= ~(EPT_ACCESS_FLAG|EPT_DIRTY_FLAG); 1056 pte = pt[offset]; 1057 if (l == 1 || (l < 4 && (pte & EPT_LARGE_PAGE))) 1058 break; 1059 pt = (unsigned long *)(pte & EPT_ADDR_MASK); 1060 } 1061 } 1062 1063 /* clear_ept_ad : Clear EPT A/D bits for the page table walk and the 1064 final GPA of a guest address. */ 1065 void clear_ept_ad(unsigned long *pml4, u64 guest_cr3, 1066 unsigned long guest_addr) 1067 { 1068 int l; 1069 unsigned long *pt = (unsigned long *)guest_cr3, gpa; 1070 u64 pte, offset_in_page; 1071 unsigned offset; 1072 1073 for (l = EPT_PAGE_LEVEL; ; --l) { 1074 offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 1075 1076 clear_ept_ad_pte(pml4, (u64) &pt[offset]); 1077 pte = pt[offset]; 1078 if (l == 1 || (l < 4 && (pte & PT_PAGE_SIZE_MASK))) 1079 break; 1080 if (!(pte & PT_PRESENT_MASK)) 1081 return; 1082 pt = (unsigned long *)(pte & PT_ADDR_MASK); 1083 } 1084 1085 offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 1086 offset_in_page = guest_addr & ((1 << EPT_LEVEL_SHIFT(l)) - 1); 1087 gpa = (pt[offset] & PT_ADDR_MASK) | (guest_addr & offset_in_page); 1088 clear_ept_ad_pte(pml4, gpa); 1089 } 1090 1091 /* check_ept_ad : Check the content of EPT A/D bits for the page table 1092 walk and the final GPA of a guest address. */ 1093 void check_ept_ad(unsigned long *pml4, u64 guest_cr3, 1094 unsigned long guest_addr, int expected_gpa_ad, 1095 int expected_pt_ad) 1096 { 1097 int l; 1098 unsigned long *pt = (unsigned long *)guest_cr3, gpa; 1099 u64 ept_pte, pte, offset_in_page; 1100 unsigned offset; 1101 bool bad_pt_ad = false; 1102 1103 for (l = EPT_PAGE_LEVEL; ; --l) { 1104 offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 1105 1106 if (!get_ept_pte(pml4, (u64) &pt[offset], 1, &ept_pte)) { 1107 printf("EPT - guest level %d page table is not mapped.\n", l); 1108 return; 1109 } 1110 1111 if (!bad_pt_ad) { 1112 bad_pt_ad |= (ept_pte & (EPT_ACCESS_FLAG|EPT_DIRTY_FLAG)) != expected_pt_ad; 1113 if (bad_pt_ad) 1114 report_fail("EPT - guest level %d page table A=%d/D=%d", 1115 l, 1116 !!(expected_pt_ad & EPT_ACCESS_FLAG), 1117 !!(expected_pt_ad & EPT_DIRTY_FLAG)); 1118 } 1119 1120 pte = pt[offset]; 1121 if (l == 1 || (l < 4 && (pte & PT_PAGE_SIZE_MASK))) 1122 break; 1123 if (!(pte & PT_PRESENT_MASK)) 1124 return; 1125 pt = (unsigned long *)(pte & PT_ADDR_MASK); 1126 } 1127 1128 if (!bad_pt_ad) 1129 report_pass("EPT - guest page table structures A=%d/D=%d", 1130 !!(expected_pt_ad & EPT_ACCESS_FLAG), 1131 !!(expected_pt_ad & EPT_DIRTY_FLAG)); 1132 1133 offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 1134 offset_in_page = guest_addr & ((1 << EPT_LEVEL_SHIFT(l)) - 1); 1135 gpa = (pt[offset] & PT_ADDR_MASK) | (guest_addr & offset_in_page); 1136 1137 if (!get_ept_pte(pml4, gpa, 1, &ept_pte)) { 1138 report_fail("EPT - guest physical address is not mapped"); 1139 return; 1140 } 1141 report((ept_pte & (EPT_ACCESS_FLAG | EPT_DIRTY_FLAG)) == expected_gpa_ad, 1142 "EPT - guest physical address A=%d/D=%d", 1143 !!(expected_gpa_ad & EPT_ACCESS_FLAG), 1144 !!(expected_gpa_ad & EPT_DIRTY_FLAG)); 1145 } 1146 1147 1148 void ept_sync(int type, u64 eptp) 1149 { 1150 switch (type) { 1151 case INVEPT_SINGLE: 1152 if (ept_vpid.val & EPT_CAP_INVEPT_SINGLE) { 1153 invept(INVEPT_SINGLE, eptp); 1154 break; 1155 } 1156 /* else fall through */ 1157 case INVEPT_GLOBAL: 1158 if (ept_vpid.val & EPT_CAP_INVEPT_ALL) { 1159 invept(INVEPT_GLOBAL, eptp); 1160 break; 1161 } 1162 /* else fall through */ 1163 default: 1164 printf("WARNING: invept is not supported!\n"); 1165 } 1166 } 1167 1168 void set_ept_pte(unsigned long *pml4, unsigned long guest_addr, 1169 int level, u64 pte_val) 1170 { 1171 int l; 1172 unsigned long *pt = pml4; 1173 unsigned offset; 1174 1175 assert(level >= 1 && level <= 4); 1176 1177 for (l = EPT_PAGE_LEVEL; ; --l) { 1178 offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 1179 if (l == level) 1180 break; 1181 assert(pt[offset] & EPT_PRESENT); 1182 pt = (unsigned long *)(pt[offset] & EPT_ADDR_MASK); 1183 } 1184 offset = (guest_addr >> EPT_LEVEL_SHIFT(l)) & EPT_PGDIR_MASK; 1185 pt[offset] = pte_val; 1186 } 1187 1188 bool ept_2m_supported(void) 1189 { 1190 return ept_vpid.val & EPT_CAP_2M_PAGE; 1191 } 1192 1193 bool ept_1g_supported(void) 1194 { 1195 return ept_vpid.val & EPT_CAP_1G_PAGE; 1196 } 1197 1198 bool ept_huge_pages_supported(int level) 1199 { 1200 if (level == 2) 1201 return ept_2m_supported(); 1202 else if (level == 3) 1203 return ept_1g_supported(); 1204 else 1205 return false; 1206 } 1207 1208 bool ept_execute_only_supported(void) 1209 { 1210 return ept_vpid.val & EPT_CAP_WT; 1211 } 1212 1213 bool ept_ad_bits_supported(void) 1214 { 1215 return ept_vpid.val & EPT_CAP_AD_FLAG; 1216 } 1217 1218 void vpid_sync(int type, u16 vpid) 1219 { 1220 switch(type) { 1221 case INVVPID_CONTEXT_GLOBAL: 1222 if (ept_vpid.val & VPID_CAP_INVVPID_CXTGLB) { 1223 invvpid(INVVPID_CONTEXT_GLOBAL, vpid, 0); 1224 break; 1225 } 1226 case INVVPID_ALL: 1227 if (ept_vpid.val & VPID_CAP_INVVPID_ALL) { 1228 invvpid(INVVPID_ALL, vpid, 0); 1229 break; 1230 } 1231 default: 1232 printf("WARNING: invvpid is not supported\n"); 1233 } 1234 } 1235 1236 static void init_vmcs_ctrl(void) 1237 { 1238 /* 26.2 CHECKS ON VMX CONTROLS AND HOST-STATE AREA */ 1239 /* 26.2.1.1 */ 1240 vmcs_write(PIN_CONTROLS, ctrl_pin); 1241 /* Disable VMEXIT of IO instruction */ 1242 vmcs_write(CPU_EXEC_CTRL0, ctrl_cpu[0]); 1243 if (ctrl_cpu_rev[0].set & CPU_SECONDARY) { 1244 ctrl_cpu[1] = (ctrl_cpu[1] | ctrl_cpu_rev[1].set) & 1245 ctrl_cpu_rev[1].clr; 1246 vmcs_write(CPU_EXEC_CTRL1, ctrl_cpu[1]); 1247 } 1248 vmcs_write(CR3_TARGET_COUNT, 0); 1249 vmcs_write(VPID, ++vpid_cnt); 1250 } 1251 1252 static void init_vmcs_host(void) 1253 { 1254 /* 26.2 CHECKS ON VMX CONTROLS AND HOST-STATE AREA */ 1255 /* 26.2.1.2 */ 1256 vmcs_write(HOST_EFER, rdmsr(MSR_EFER)); 1257 1258 /* 26.2.1.3 */ 1259 vmcs_write(ENT_CONTROLS, ctrl_enter); 1260 vmcs_write(EXI_CONTROLS, ctrl_exit); 1261 1262 /* 26.2.2 */ 1263 vmcs_write(HOST_CR0, read_cr0()); 1264 vmcs_write(HOST_CR3, read_cr3()); 1265 vmcs_write(HOST_CR4, read_cr4()); 1266 vmcs_write(HOST_SYSENTER_EIP, (u64)(&entry_sysenter)); 1267 vmcs_write(HOST_SYSENTER_CS, KERNEL_CS); 1268 1269 /* 26.2.3 */ 1270 vmcs_write(HOST_SEL_CS, KERNEL_CS); 1271 vmcs_write(HOST_SEL_SS, KERNEL_DS); 1272 vmcs_write(HOST_SEL_DS, KERNEL_DS); 1273 vmcs_write(HOST_SEL_ES, KERNEL_DS); 1274 vmcs_write(HOST_SEL_FS, KERNEL_DS); 1275 vmcs_write(HOST_SEL_GS, KERNEL_DS); 1276 vmcs_write(HOST_SEL_TR, TSS_MAIN); 1277 vmcs_write(HOST_BASE_TR, get_gdt_entry_base(get_tss_descr())); 1278 vmcs_write(HOST_BASE_GDTR, gdt_descr.base); 1279 vmcs_write(HOST_BASE_IDTR, idt_descr.base); 1280 vmcs_write(HOST_BASE_FS, 0); 1281 vmcs_write(HOST_BASE_GS, 0); 1282 1283 /* Set other vmcs area */ 1284 vmcs_write(PF_ERROR_MASK, 0); 1285 vmcs_write(PF_ERROR_MATCH, 0); 1286 vmcs_write(VMCS_LINK_PTR, ~0ul); 1287 vmcs_write(VMCS_LINK_PTR_HI, ~0ul); 1288 vmcs_write(HOST_RIP, (u64)(&vmx_return)); 1289 } 1290 1291 static void init_vmcs_guest(void) 1292 { 1293 gdt_entry_t *tss_descr = get_tss_descr(); 1294 1295 /* 26.3 CHECKING AND LOADING GUEST STATE */ 1296 ulong guest_cr0, guest_cr4, guest_cr3; 1297 /* 26.3.1.1 */ 1298 guest_cr0 = read_cr0(); 1299 guest_cr4 = read_cr4(); 1300 guest_cr3 = read_cr3(); 1301 if (ctrl_enter & ENT_GUEST_64) { 1302 guest_cr0 |= X86_CR0_PG; 1303 guest_cr4 |= X86_CR4_PAE; 1304 } 1305 if ((ctrl_enter & ENT_GUEST_64) == 0) 1306 guest_cr4 &= (~X86_CR4_PCIDE); 1307 if (guest_cr0 & X86_CR0_PG) 1308 guest_cr0 |= X86_CR0_PE; 1309 vmcs_write(GUEST_CR0, guest_cr0); 1310 vmcs_write(GUEST_CR3, guest_cr3); 1311 vmcs_write(GUEST_CR4, guest_cr4); 1312 vmcs_write(GUEST_SYSENTER_CS, KERNEL_CS); 1313 vmcs_write(GUEST_SYSENTER_ESP, 1314 (u64)(guest_syscall_stack + PAGE_SIZE - 1)); 1315 vmcs_write(GUEST_SYSENTER_EIP, (u64)(&entry_sysenter)); 1316 vmcs_write(GUEST_DR7, 0); 1317 vmcs_write(GUEST_EFER, rdmsr(MSR_EFER)); 1318 1319 /* 26.3.1.2 */ 1320 vmcs_write(GUEST_SEL_CS, KERNEL_CS); 1321 vmcs_write(GUEST_SEL_SS, KERNEL_DS); 1322 vmcs_write(GUEST_SEL_DS, KERNEL_DS); 1323 vmcs_write(GUEST_SEL_ES, KERNEL_DS); 1324 vmcs_write(GUEST_SEL_FS, KERNEL_DS); 1325 vmcs_write(GUEST_SEL_GS, KERNEL_DS); 1326 vmcs_write(GUEST_SEL_TR, TSS_MAIN); 1327 vmcs_write(GUEST_SEL_LDTR, 0); 1328 1329 vmcs_write(GUEST_BASE_CS, 0); 1330 vmcs_write(GUEST_BASE_ES, 0); 1331 vmcs_write(GUEST_BASE_SS, 0); 1332 vmcs_write(GUEST_BASE_DS, 0); 1333 vmcs_write(GUEST_BASE_FS, 0); 1334 vmcs_write(GUEST_BASE_GS, 0); 1335 vmcs_write(GUEST_BASE_TR, get_gdt_entry_base(tss_descr)); 1336 vmcs_write(GUEST_BASE_LDTR, 0); 1337 1338 vmcs_write(GUEST_LIMIT_CS, 0xFFFFFFFF); 1339 vmcs_write(GUEST_LIMIT_DS, 0xFFFFFFFF); 1340 vmcs_write(GUEST_LIMIT_ES, 0xFFFFFFFF); 1341 vmcs_write(GUEST_LIMIT_SS, 0xFFFFFFFF); 1342 vmcs_write(GUEST_LIMIT_FS, 0xFFFFFFFF); 1343 vmcs_write(GUEST_LIMIT_GS, 0xFFFFFFFF); 1344 vmcs_write(GUEST_LIMIT_LDTR, 0xffff); 1345 vmcs_write(GUEST_LIMIT_TR, get_gdt_entry_limit(tss_descr)); 1346 1347 vmcs_write(GUEST_AR_CS, 0xa09b); 1348 vmcs_write(GUEST_AR_DS, 0xc093); 1349 vmcs_write(GUEST_AR_ES, 0xc093); 1350 vmcs_write(GUEST_AR_FS, 0xc093); 1351 vmcs_write(GUEST_AR_GS, 0xc093); 1352 vmcs_write(GUEST_AR_SS, 0xc093); 1353 vmcs_write(GUEST_AR_LDTR, 0x82); 1354 vmcs_write(GUEST_AR_TR, 0x8b); 1355 1356 /* 26.3.1.3 */ 1357 vmcs_write(GUEST_BASE_GDTR, gdt_descr.base); 1358 vmcs_write(GUEST_BASE_IDTR, idt_descr.base); 1359 vmcs_write(GUEST_LIMIT_GDTR, gdt_descr.limit); 1360 vmcs_write(GUEST_LIMIT_IDTR, idt_descr.limit); 1361 1362 /* 26.3.1.4 */ 1363 vmcs_write(GUEST_RIP, (u64)(&guest_entry)); 1364 vmcs_write(GUEST_RSP, (u64)(guest_stack + PAGE_SIZE - 1)); 1365 vmcs_write(GUEST_RFLAGS, X86_EFLAGS_FIXED); 1366 1367 /* 26.3.1.5 */ 1368 vmcs_write(GUEST_ACTV_STATE, ACTV_ACTIVE); 1369 vmcs_write(GUEST_INTR_STATE, 0); 1370 } 1371 1372 int init_vmcs(struct vmcs **vmcs) 1373 { 1374 *vmcs = alloc_page(); 1375 (*vmcs)->hdr.revision_id = basic.revision; 1376 /* vmclear first to init vmcs */ 1377 if (vmcs_clear(*vmcs)) { 1378 printf("%s : vmcs_clear error\n", __func__); 1379 return 1; 1380 } 1381 1382 if (make_vmcs_current(*vmcs)) { 1383 printf("%s : make_vmcs_current error\n", __func__); 1384 return 1; 1385 } 1386 1387 /* All settings to pin/exit/enter/cpu 1388 control fields should be placed here */ 1389 ctrl_pin |= PIN_EXTINT | PIN_NMI | PIN_VIRT_NMI; 1390 ctrl_exit = EXI_LOAD_EFER | EXI_HOST_64; 1391 ctrl_enter = (ENT_LOAD_EFER | ENT_GUEST_64); 1392 /* DIsable IO instruction VMEXIT now */ 1393 ctrl_cpu[0] &= (~(CPU_IO | CPU_IO_BITMAP)); 1394 ctrl_cpu[1] = 0; 1395 1396 ctrl_pin = (ctrl_pin | ctrl_pin_rev.set) & ctrl_pin_rev.clr; 1397 ctrl_enter = (ctrl_enter | ctrl_enter_rev.set) & ctrl_enter_rev.clr; 1398 ctrl_exit = (ctrl_exit | ctrl_exit_rev.set) & ctrl_exit_rev.clr; 1399 ctrl_cpu[0] = (ctrl_cpu[0] | ctrl_cpu_rev[0].set) & ctrl_cpu_rev[0].clr; 1400 1401 init_vmcs_ctrl(); 1402 init_vmcs_host(); 1403 init_vmcs_guest(); 1404 return 0; 1405 } 1406 1407 void enable_vmx(void) 1408 { 1409 bool vmx_enabled = 1410 rdmsr(MSR_IA32_FEATURE_CONTROL) & 1411 FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX; 1412 1413 if (!vmx_enabled) { 1414 wrmsr(MSR_IA32_FEATURE_CONTROL, 1415 FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX | 1416 FEATURE_CONTROL_LOCKED); 1417 } 1418 } 1419 1420 static void init_vmx_caps(void) 1421 { 1422 basic.val = rdmsr(MSR_IA32_VMX_BASIC); 1423 ctrl_pin_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_PIN 1424 : MSR_IA32_VMX_PINBASED_CTLS); 1425 ctrl_exit_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_EXIT 1426 : MSR_IA32_VMX_EXIT_CTLS); 1427 ctrl_enter_rev.val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_ENTRY 1428 : MSR_IA32_VMX_ENTRY_CTLS); 1429 ctrl_cpu_rev[0].val = rdmsr(basic.ctrl ? MSR_IA32_VMX_TRUE_PROC 1430 : MSR_IA32_VMX_PROCBASED_CTLS); 1431 if ((ctrl_cpu_rev[0].clr & CPU_SECONDARY) != 0) 1432 ctrl_cpu_rev[1].val = rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2); 1433 else 1434 ctrl_cpu_rev[1].val = 0; 1435 if ((ctrl_cpu_rev[1].clr & (CPU_EPT | CPU_VPID)) != 0) 1436 ept_vpid.val = rdmsr(MSR_IA32_VMX_EPT_VPID_CAP); 1437 else 1438 ept_vpid.val = 0; 1439 } 1440 1441 void init_vmx(u64 *vmxon_region) 1442 { 1443 ulong fix_cr0_set, fix_cr0_clr; 1444 ulong fix_cr4_set, fix_cr4_clr; 1445 1446 fix_cr0_set = rdmsr(MSR_IA32_VMX_CR0_FIXED0); 1447 fix_cr0_clr = rdmsr(MSR_IA32_VMX_CR0_FIXED1); 1448 fix_cr4_set = rdmsr(MSR_IA32_VMX_CR4_FIXED0); 1449 fix_cr4_clr = rdmsr(MSR_IA32_VMX_CR4_FIXED1); 1450 1451 write_cr0((read_cr0() & fix_cr0_clr) | fix_cr0_set); 1452 write_cr4((read_cr4() & fix_cr4_clr) | fix_cr4_set | X86_CR4_VMXE); 1453 1454 *vmxon_region = basic.revision; 1455 } 1456 1457 static void alloc_bsp_vmx_pages(void) 1458 { 1459 bsp_vmxon_region = alloc_page(); 1460 guest_stack = alloc_page(); 1461 guest_syscall_stack = alloc_page(); 1462 vmcs_root = alloc_page(); 1463 } 1464 1465 static void init_bsp_vmx(void) 1466 { 1467 init_vmx_caps(); 1468 alloc_bsp_vmx_pages(); 1469 init_vmx(bsp_vmxon_region); 1470 } 1471 1472 static void do_vmxon_off(void *data) 1473 { 1474 vmx_on(); 1475 vmx_off(); 1476 } 1477 1478 static void do_write_feature_control(void *data) 1479 { 1480 wrmsr(MSR_IA32_FEATURE_CONTROL, 0); 1481 } 1482 1483 static int test_vmx_feature_control(void) 1484 { 1485 u64 ia32_feature_control; 1486 bool vmx_enabled; 1487 bool feature_control_locked; 1488 1489 ia32_feature_control = rdmsr(MSR_IA32_FEATURE_CONTROL); 1490 vmx_enabled = 1491 ia32_feature_control & FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX; 1492 feature_control_locked = 1493 ia32_feature_control & FEATURE_CONTROL_LOCKED; 1494 1495 if (vmx_enabled && feature_control_locked) { 1496 printf("VMX enabled and locked by BIOS\n"); 1497 return 0; 1498 } else if (feature_control_locked) { 1499 printf("ERROR: VMX locked out by BIOS!?\n"); 1500 return 1; 1501 } 1502 1503 wrmsr(MSR_IA32_FEATURE_CONTROL, 0); 1504 report(test_for_exception(GP_VECTOR, &do_vmxon_off, NULL), 1505 "test vmxon with FEATURE_CONTROL cleared"); 1506 1507 wrmsr(MSR_IA32_FEATURE_CONTROL, FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX); 1508 report(test_for_exception(GP_VECTOR, &do_vmxon_off, NULL), 1509 "test vmxon without FEATURE_CONTROL lock"); 1510 1511 wrmsr(MSR_IA32_FEATURE_CONTROL, 1512 FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX | 1513 FEATURE_CONTROL_LOCKED); 1514 1515 ia32_feature_control = rdmsr(MSR_IA32_FEATURE_CONTROL); 1516 vmx_enabled = 1517 ia32_feature_control & FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX; 1518 report(vmx_enabled, "test enable VMX in FEATURE_CONTROL"); 1519 1520 report(test_for_exception(GP_VECTOR, &do_write_feature_control, NULL), 1521 "test FEATURE_CONTROL lock bit"); 1522 1523 return !vmx_enabled; 1524 } 1525 1526 static int test_vmxon(void) 1527 { 1528 int ret, ret1; 1529 u64 *vmxon_region; 1530 int width = cpuid_maxphyaddr(); 1531 1532 /* Unaligned page access */ 1533 vmxon_region = (u64 *)((intptr_t)bsp_vmxon_region + 1); 1534 ret1 = _vmx_on(vmxon_region); 1535 report(ret1, "test vmxon with unaligned vmxon region"); 1536 if (!ret1) { 1537 ret = 1; 1538 goto out; 1539 } 1540 1541 /* gpa bits beyond physical address width are set*/ 1542 vmxon_region = (u64 *)((intptr_t)bsp_vmxon_region | ((u64)1 << (width+1))); 1543 ret1 = _vmx_on(vmxon_region); 1544 report(ret1, "test vmxon with bits set beyond physical address width"); 1545 if (!ret1) { 1546 ret = 1; 1547 goto out; 1548 } 1549 1550 /* invalid revision indentifier */ 1551 *bsp_vmxon_region = 0xba9da9; 1552 ret1 = vmx_on(); 1553 report(ret1, "test vmxon with invalid revision identifier"); 1554 if (!ret1) { 1555 ret = 1; 1556 goto out; 1557 } 1558 1559 /* and finally a valid region */ 1560 *bsp_vmxon_region = basic.revision; 1561 ret = vmx_on(); 1562 report(!ret, "test vmxon with valid vmxon region"); 1563 1564 out: 1565 return ret; 1566 } 1567 1568 static void test_vmptrld(void) 1569 { 1570 struct vmcs *vmcs, *tmp_root; 1571 int width = cpuid_maxphyaddr(); 1572 1573 vmcs = alloc_page(); 1574 vmcs->hdr.revision_id = basic.revision; 1575 1576 /* Unaligned page access */ 1577 tmp_root = (struct vmcs *)((intptr_t)vmcs + 1); 1578 report(make_vmcs_current(tmp_root) == 1, 1579 "test vmptrld with unaligned vmcs"); 1580 1581 /* gpa bits beyond physical address width are set*/ 1582 tmp_root = (struct vmcs *)((intptr_t)vmcs | 1583 ((u64)1 << (width+1))); 1584 report(make_vmcs_current(tmp_root) == 1, 1585 "test vmptrld with vmcs address bits set beyond physical address width"); 1586 1587 /* Pass VMXON region */ 1588 assert(!vmcs_clear(vmcs)); 1589 assert(!make_vmcs_current(vmcs)); 1590 tmp_root = (struct vmcs *)bsp_vmxon_region; 1591 report(make_vmcs_current(tmp_root) == 1, 1592 "test vmptrld with vmxon region"); 1593 report(vmcs_read(VMX_INST_ERROR) == VMXERR_VMPTRLD_VMXON_POINTER, 1594 "test vmptrld with vmxon region vm-instruction error"); 1595 1596 report(make_vmcs_current(vmcs) == 0, 1597 "test vmptrld with valid vmcs region"); 1598 } 1599 1600 static void test_vmptrst(void) 1601 { 1602 int ret; 1603 struct vmcs *vmcs1, *vmcs2; 1604 1605 vmcs1 = alloc_page(); 1606 init_vmcs(&vmcs1); 1607 ret = vmcs_save(&vmcs2); 1608 report((!ret) && (vmcs1 == vmcs2), "test vmptrst"); 1609 } 1610 1611 struct vmx_ctl_msr { 1612 const char *name; 1613 u32 index, true_index; 1614 u32 default1; 1615 } vmx_ctl_msr[] = { 1616 { "MSR_IA32_VMX_PINBASED_CTLS", MSR_IA32_VMX_PINBASED_CTLS, 1617 MSR_IA32_VMX_TRUE_PIN, 0x16 }, 1618 { "MSR_IA32_VMX_PROCBASED_CTLS", MSR_IA32_VMX_PROCBASED_CTLS, 1619 MSR_IA32_VMX_TRUE_PROC, 0x401e172 }, 1620 { "MSR_IA32_VMX_PROCBASED_CTLS2", MSR_IA32_VMX_PROCBASED_CTLS2, 1621 MSR_IA32_VMX_PROCBASED_CTLS2, 0 }, 1622 { "MSR_IA32_VMX_EXIT_CTLS", MSR_IA32_VMX_EXIT_CTLS, 1623 MSR_IA32_VMX_TRUE_EXIT, 0x36dff }, 1624 { "MSR_IA32_VMX_ENTRY_CTLS", MSR_IA32_VMX_ENTRY_CTLS, 1625 MSR_IA32_VMX_TRUE_ENTRY, 0x11ff }, 1626 }; 1627 1628 static void test_vmx_caps(void) 1629 { 1630 u64 val, default1, fixed0, fixed1; 1631 union vmx_ctrl_msr ctrl, true_ctrl; 1632 unsigned int n; 1633 bool ok; 1634 1635 printf("\nTest suite: VMX capability reporting\n"); 1636 1637 report((basic.revision & (1ul << 31)) == 0 && 1638 basic.size > 0 && basic.size <= 4096 && 1639 (basic.type == 0 || basic.type == 6) && 1640 basic.reserved1 == 0 && basic.reserved2 == 0, 1641 "MSR_IA32_VMX_BASIC"); 1642 1643 val = rdmsr(MSR_IA32_VMX_MISC); 1644 report((!(ctrl_cpu_rev[1].clr & CPU_URG) || val & (1ul << 5)) && 1645 ((val >> 16) & 0x1ff) <= 256 && 1646 (val & 0x80007e00) == 0, 1647 "MSR_IA32_VMX_MISC"); 1648 1649 for (n = 0; n < ARRAY_SIZE(vmx_ctl_msr); n++) { 1650 ctrl.val = rdmsr(vmx_ctl_msr[n].index); 1651 default1 = vmx_ctl_msr[n].default1; 1652 ok = (ctrl.set & default1) == default1; 1653 ok = ok && (ctrl.set & ~ctrl.clr) == 0; 1654 if (ok && basic.ctrl) { 1655 true_ctrl.val = rdmsr(vmx_ctl_msr[n].true_index); 1656 ok = ctrl.clr == true_ctrl.clr; 1657 ok = ok && ctrl.set == (true_ctrl.set | default1); 1658 } 1659 report(ok, "%s", vmx_ctl_msr[n].name); 1660 } 1661 1662 fixed0 = rdmsr(MSR_IA32_VMX_CR0_FIXED0); 1663 fixed1 = rdmsr(MSR_IA32_VMX_CR0_FIXED1); 1664 report(((fixed0 ^ fixed1) & ~fixed1) == 0, 1665 "MSR_IA32_VMX_IA32_VMX_CR0_FIXED0/1"); 1666 1667 fixed0 = rdmsr(MSR_IA32_VMX_CR4_FIXED0); 1668 fixed1 = rdmsr(MSR_IA32_VMX_CR4_FIXED1); 1669 report(((fixed0 ^ fixed1) & ~fixed1) == 0, 1670 "MSR_IA32_VMX_IA32_VMX_CR4_FIXED0/1"); 1671 1672 val = rdmsr(MSR_IA32_VMX_VMCS_ENUM); 1673 report((val & VMCS_FIELD_INDEX_MASK) >= 0x2a && 1674 (val & 0xfffffffffffffc01Ull) == 0, 1675 "MSR_IA32_VMX_VMCS_ENUM"); 1676 1677 fixed0 = -1ull; 1678 fixed0 &= ~(EPT_CAP_WT | 1679 EPT_CAP_PWL4 | 1680 EPT_CAP_PWL5 | 1681 EPT_CAP_UC | 1682 EPT_CAP_WB | 1683 EPT_CAP_2M_PAGE | 1684 EPT_CAP_1G_PAGE | 1685 EPT_CAP_INVEPT | 1686 EPT_CAP_AD_FLAG | 1687 EPT_CAP_ADV_EPT_INFO | 1688 EPT_CAP_INVEPT_SINGLE | 1689 EPT_CAP_INVEPT_ALL | 1690 VPID_CAP_INVVPID | 1691 VPID_CAP_INVVPID_ADDR | 1692 VPID_CAP_INVVPID_CXTGLB | 1693 VPID_CAP_INVVPID_ALL | 1694 VPID_CAP_INVVPID_CXTLOC); 1695 1696 val = rdmsr(MSR_IA32_VMX_EPT_VPID_CAP); 1697 report((val & fixed0) == 0, 1698 "MSR_IA32_VMX_EPT_VPID_CAP"); 1699 } 1700 1701 /* This function can only be called in guest */ 1702 void __attribute__((__used__)) hypercall(u32 hypercall_no) 1703 { 1704 u64 val = 0; 1705 val = (hypercall_no & HYPERCALL_MASK) | HYPERCALL_BIT; 1706 hypercall_field = val; 1707 asm volatile("vmcall\n\t"); 1708 } 1709 1710 static bool is_hypercall(union exit_reason exit_reason) 1711 { 1712 return exit_reason.basic == VMX_VMCALL && 1713 (hypercall_field & HYPERCALL_BIT); 1714 } 1715 1716 static int handle_hypercall(void) 1717 { 1718 ulong hypercall_no; 1719 1720 hypercall_no = hypercall_field & HYPERCALL_MASK; 1721 hypercall_field = 0; 1722 switch (hypercall_no) { 1723 case HYPERCALL_VMEXIT: 1724 return VMX_TEST_VMEXIT; 1725 case HYPERCALL_VMABORT: 1726 return VMX_TEST_VMABORT; 1727 case HYPERCALL_VMSKIP: 1728 return VMX_TEST_VMSKIP; 1729 default: 1730 printf("ERROR : Invalid hypercall number : %ld\n", hypercall_no); 1731 } 1732 return VMX_TEST_EXIT; 1733 } 1734 1735 static void continue_abort(void) 1736 { 1737 assert(!in_guest); 1738 printf("Host was here when guest aborted:\n"); 1739 dump_stack(); 1740 longjmp(abort_target, 1); 1741 abort(); 1742 } 1743 1744 void __abort_test(void) 1745 { 1746 if (in_guest) 1747 hypercall(HYPERCALL_VMABORT); 1748 else 1749 longjmp(abort_target, 1); 1750 abort(); 1751 } 1752 1753 static void continue_skip(void) 1754 { 1755 assert(!in_guest); 1756 longjmp(abort_target, 1); 1757 abort(); 1758 } 1759 1760 void test_skip(const char *msg) 1761 { 1762 printf("%s skipping test: %s\n", in_guest ? "Guest" : "Host", msg); 1763 if (in_guest) 1764 hypercall(HYPERCALL_VMABORT); 1765 else 1766 longjmp(abort_target, 1); 1767 abort(); 1768 } 1769 1770 static int exit_handler(union exit_reason exit_reason) 1771 { 1772 int ret; 1773 1774 current->exits++; 1775 regs.rflags = vmcs_read(GUEST_RFLAGS); 1776 if (is_hypercall(exit_reason)) 1777 ret = handle_hypercall(); 1778 else 1779 ret = current->exit_handler(exit_reason); 1780 vmcs_write(GUEST_RFLAGS, regs.rflags); 1781 1782 return ret; 1783 } 1784 1785 /* 1786 * Tries to enter the guest, populates @result with VM-Fail, VM-Exit, entered, 1787 * etc... 1788 */ 1789 static noinline void vmx_enter_guest(struct vmentry_result *result) 1790 { 1791 memset(result, 0, sizeof(*result)); 1792 1793 in_guest = 1; 1794 asm volatile ( 1795 "mov %[HOST_RSP], %%rdi\n\t" 1796 "vmwrite %%rsp, %%rdi\n\t" 1797 LOAD_GPR_C 1798 "cmpb $0, %[launched]\n\t" 1799 "jne 1f\n\t" 1800 "vmlaunch\n\t" 1801 "jmp 2f\n\t" 1802 "1: " 1803 "vmresume\n\t" 1804 "2: " 1805 SAVE_GPR_C 1806 "pushf\n\t" 1807 "pop %%rdi\n\t" 1808 "mov %%rdi, %[vm_fail_flags]\n\t" 1809 "movl $1, %[vm_fail]\n\t" 1810 "jmp 3f\n\t" 1811 "vmx_return:\n\t" 1812 SAVE_GPR_C 1813 "3: \n\t" 1814 : [vm_fail]"+m"(result->vm_fail), 1815 [vm_fail_flags]"=m"(result->flags) 1816 : [launched]"m"(launched), [HOST_RSP]"i"(HOST_RSP) 1817 : "rdi", "memory", "cc" 1818 ); 1819 in_guest = 0; 1820 1821 result->vmlaunch = !launched; 1822 result->instr = launched ? "vmresume" : "vmlaunch"; 1823 result->exit_reason.full = result->vm_fail ? 0xdead : 1824 vmcs_read(EXI_REASON); 1825 result->entered = !result->vm_fail && 1826 !result->exit_reason.failed_vmentry; 1827 } 1828 1829 static int vmx_run(void) 1830 { 1831 struct vmentry_result result; 1832 u32 ret; 1833 1834 while (1) { 1835 vmx_enter_guest(&result); 1836 if (result.entered) { 1837 /* 1838 * VMCS isn't in "launched" state if there's been any 1839 * entry failure (early or otherwise). 1840 */ 1841 launched = 1; 1842 ret = exit_handler(result.exit_reason); 1843 } else if (current->entry_failure_handler) { 1844 ret = current->entry_failure_handler(&result); 1845 } else { 1846 ret = VMX_TEST_EXIT; 1847 } 1848 1849 switch (ret) { 1850 case VMX_TEST_RESUME: 1851 continue; 1852 case VMX_TEST_VMEXIT: 1853 guest_finished = 1; 1854 return 0; 1855 case VMX_TEST_EXIT: 1856 break; 1857 default: 1858 printf("ERROR : Invalid %s_handler return val %d.\n", 1859 result.entered ? "exit" : "entry_failure", 1860 ret); 1861 break; 1862 } 1863 1864 if (result.entered) 1865 print_vmexit_info(result.exit_reason); 1866 else 1867 print_vmentry_failure_info(&result); 1868 abort(); 1869 } 1870 } 1871 1872 static void run_teardown_step(struct test_teardown_step *step) 1873 { 1874 step->func(step->data); 1875 } 1876 1877 static int test_run(struct vmx_test *test) 1878 { 1879 int r; 1880 1881 /* Validate V2 interface. */ 1882 if (test->v2) { 1883 int ret = 0; 1884 if (test->init || test->guest_main || test->exit_handler || 1885 test->syscall_handler) { 1886 report_fail("V2 test cannot specify V1 callbacks."); 1887 ret = 1; 1888 } 1889 if (ret) 1890 return ret; 1891 } 1892 1893 if (test->name == NULL) 1894 test->name = "(no name)"; 1895 if (vmx_on()) { 1896 printf("%s : vmxon failed.\n", __func__); 1897 return 1; 1898 } 1899 1900 init_vmcs(&(test->vmcs)); 1901 /* Directly call test->init is ok here, init_vmcs has done 1902 vmcs init, vmclear and vmptrld*/ 1903 if (test->init && test->init(test->vmcs) != VMX_TEST_START) 1904 goto out; 1905 teardown_count = 0; 1906 v2_guest_main = NULL; 1907 test->exits = 0; 1908 current = test; 1909 regs = test->guest_regs; 1910 vmcs_write(GUEST_RFLAGS, regs.rflags | X86_EFLAGS_FIXED); 1911 launched = 0; 1912 guest_finished = 0; 1913 printf("\nTest suite: %s\n", test->name); 1914 1915 r = setjmp(abort_target); 1916 if (r) { 1917 assert(!in_guest); 1918 goto out; 1919 } 1920 1921 1922 if (test->v2) 1923 test->v2(); 1924 else 1925 vmx_run(); 1926 1927 while (teardown_count > 0) 1928 run_teardown_step(&teardown_steps[--teardown_count]); 1929 1930 if (launched && !guest_finished) 1931 report_fail("Guest didn't run to completion."); 1932 1933 out: 1934 if (vmx_off()) { 1935 printf("%s : vmxoff failed.\n", __func__); 1936 return 1; 1937 } 1938 return 0; 1939 } 1940 1941 /* 1942 * Add a teardown step. Executed after the test's main function returns. 1943 * Teardown steps executed in reverse order. 1944 */ 1945 void test_add_teardown(test_teardown_func func, void *data) 1946 { 1947 struct test_teardown_step *step; 1948 1949 TEST_ASSERT_MSG(teardown_count < MAX_TEST_TEARDOWN_STEPS, 1950 "There are already %d teardown steps.", 1951 teardown_count); 1952 step = &teardown_steps[teardown_count++]; 1953 step->func = func; 1954 step->data = data; 1955 } 1956 1957 /* 1958 * Set the target of the first enter_guest call. Can only be called once per 1959 * test. Must be called before first enter_guest call. 1960 */ 1961 void test_set_guest(test_guest_func func) 1962 { 1963 assert(current->v2); 1964 TEST_ASSERT_MSG(!v2_guest_main, "Already set guest func."); 1965 v2_guest_main = func; 1966 } 1967 1968 static void check_for_guest_termination(union exit_reason exit_reason) 1969 { 1970 if (is_hypercall(exit_reason)) { 1971 int ret; 1972 1973 ret = handle_hypercall(); 1974 switch (ret) { 1975 case VMX_TEST_VMEXIT: 1976 guest_finished = 1; 1977 break; 1978 case VMX_TEST_VMABORT: 1979 continue_abort(); 1980 break; 1981 case VMX_TEST_VMSKIP: 1982 continue_skip(); 1983 break; 1984 default: 1985 printf("ERROR : Invalid handle_hypercall return %d.\n", 1986 ret); 1987 abort(); 1988 } 1989 } 1990 } 1991 1992 /* 1993 * Enters the guest (or launches it for the first time). Error to call once the 1994 * guest has returned (i.e., run past the end of its guest() function). 1995 */ 1996 void __enter_guest(u8 abort_flag, struct vmentry_result *result) 1997 { 1998 TEST_ASSERT_MSG(v2_guest_main, 1999 "Never called test_set_guest_func!"); 2000 2001 TEST_ASSERT_MSG(!guest_finished, 2002 "Called enter_guest() after guest returned."); 2003 2004 vmx_enter_guest(result); 2005 2006 if (result->vm_fail) { 2007 if (abort_flag & ABORT_ON_EARLY_VMENTRY_FAIL) 2008 goto do_abort; 2009 return; 2010 } 2011 if (result->exit_reason.failed_vmentry) { 2012 if ((abort_flag & ABORT_ON_INVALID_GUEST_STATE) || 2013 result->exit_reason.basic != VMX_FAIL_STATE) 2014 goto do_abort; 2015 return; 2016 } 2017 2018 launched = 1; 2019 check_for_guest_termination(result->exit_reason); 2020 return; 2021 2022 do_abort: 2023 print_vmentry_failure_info(result); 2024 abort(); 2025 } 2026 2027 void enter_guest_with_bad_controls(void) 2028 { 2029 struct vmentry_result result; 2030 2031 TEST_ASSERT_MSG(v2_guest_main, 2032 "Never called test_set_guest_func!"); 2033 2034 TEST_ASSERT_MSG(!guest_finished, 2035 "Called enter_guest() after guest returned."); 2036 2037 __enter_guest(ABORT_ON_INVALID_GUEST_STATE, &result); 2038 report(result.vm_fail, "VM-Fail occurred as expected"); 2039 report((result.flags & VMX_ENTRY_FLAGS) == X86_EFLAGS_ZF, 2040 "FLAGS set correctly on VM-Fail"); 2041 report(vmcs_read(VMX_INST_ERROR) == VMXERR_ENTRY_INVALID_CONTROL_FIELD, 2042 "VM-Inst Error # is %d (VM entry with invalid control field(s))", 2043 VMXERR_ENTRY_INVALID_CONTROL_FIELD); 2044 } 2045 2046 void enter_guest(void) 2047 { 2048 struct vmentry_result result; 2049 2050 __enter_guest(ABORT_ON_EARLY_VMENTRY_FAIL | 2051 ABORT_ON_INVALID_GUEST_STATE, &result); 2052 } 2053 2054 extern struct vmx_test vmx_tests[]; 2055 2056 static bool 2057 test_wanted(const char *name, const char *filters[], int filter_count) 2058 { 2059 int i; 2060 bool positive = false; 2061 bool match = false; 2062 char clean_name[strlen(name) + 1]; 2063 char *c; 2064 const char *n; 2065 2066 printf("filter = %s, test = %s\n", filters[0], name); 2067 2068 /* Replace spaces with underscores. */ 2069 n = name; 2070 c = &clean_name[0]; 2071 do *c++ = (*n == ' ') ? '_' : *n; 2072 while (*n++); 2073 2074 for (i = 0; i < filter_count; i++) { 2075 const char *filter = filters[i]; 2076 2077 if (filter[0] == '-') { 2078 if (simple_glob(clean_name, filter + 1)) 2079 return false; 2080 } else { 2081 positive = true; 2082 match |= simple_glob(clean_name, filter); 2083 } 2084 } 2085 2086 if (!positive || match) { 2087 matched++; 2088 return true; 2089 } else { 2090 return false; 2091 } 2092 } 2093 2094 int main(int argc, const char *argv[]) 2095 { 2096 int i = 0; 2097 2098 setup_vm(); 2099 hypercall_field = 0; 2100 2101 /* We want xAPIC mode to test MMIO passthrough from L1 (us) to L2. */ 2102 smp_reset_apic(); 2103 2104 argv++; 2105 argc--; 2106 2107 if (!this_cpu_has(X86_FEATURE_VMX)) { 2108 printf("WARNING: vmx not supported, add '-cpu host'\n"); 2109 goto exit; 2110 } 2111 init_bsp_vmx(); 2112 if (test_wanted("test_vmx_feature_control", argv, argc)) { 2113 /* Sets MSR_IA32_FEATURE_CONTROL to 0x5 */ 2114 if (test_vmx_feature_control() != 0) 2115 goto exit; 2116 } else { 2117 enable_vmx(); 2118 } 2119 2120 if (test_wanted("test_vmxon", argv, argc)) { 2121 /* Enables VMX */ 2122 if (test_vmxon() != 0) 2123 goto exit; 2124 } else { 2125 if (vmx_on()) { 2126 report_fail("vmxon"); 2127 goto exit; 2128 } 2129 } 2130 2131 if (test_wanted("test_vmptrld", argv, argc)) 2132 test_vmptrld(); 2133 if (test_wanted("test_vmclear", argv, argc)) 2134 test_vmclear(); 2135 if (test_wanted("test_vmptrst", argv, argc)) 2136 test_vmptrst(); 2137 if (test_wanted("test_vmwrite_vmread", argv, argc)) 2138 test_vmwrite_vmread(); 2139 if (test_wanted("test_vmcs_high", argv, argc)) 2140 test_vmcs_high(); 2141 if (test_wanted("test_vmcs_lifecycle", argv, argc)) 2142 test_vmcs_lifecycle(); 2143 if (test_wanted("test_vmx_caps", argv, argc)) 2144 test_vmx_caps(); 2145 if (test_wanted("test_vmread_flags_touch", argv, argc)) 2146 test_vmread_flags_touch(); 2147 if (test_wanted("test_vmwrite_flags_touch", argv, argc)) 2148 test_vmwrite_flags_touch(); 2149 2150 /* Balance vmxon from test_vmxon. */ 2151 vmx_off(); 2152 2153 for (; vmx_tests[i].name != NULL; i++) { 2154 if (!test_wanted(vmx_tests[i].name, argv, argc)) 2155 continue; 2156 if (test_run(&vmx_tests[i])) 2157 goto exit; 2158 } 2159 2160 if (!matched) 2161 report(matched, "command line didn't match any tests!"); 2162 2163 exit: 2164 return report_summary(); 2165 } 2166